diff options
author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-14 13:11:03 +0000 |
---|---|---|
committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-14 13:11:03 +0000 |
commit | cc537e567a207d4d5a78e2438d9d459b2ae55428 (patch) | |
tree | d29ac5325a000a7cb26a309ffe28b2c9a8999531 /opcodes | |
parent | 7a5f87ce9bd0d5facacd10424c26deb0af041630 (diff) | |
download | gdb-cc537e567a207d4d5a78e2438d9d459b2ae55428.zip gdb-cc537e567a207d4d5a78e2438d9d459b2ae55428.tar.gz gdb-cc537e567a207d4d5a78e2438d9d459b2ae55428.tar.bz2 |
include/opcode/
* mips.h: Document MIPS16 "I" opcode.
opcodes/
* mips16-opc.c (mips16_opcodes): Use "I" for immediate operands
in macros.
gas/
* config/tc-mips.c (mips16_ip): Handle "I".
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/mips16-opc.c | 28 |
2 files changed, 19 insertions, 14 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 6478052..aa4d0f4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> + * mips16-opc.c (mips16_opcodes): Use "I" for immediate operands + in macros. + +2013-07-14 Richard Sandiford <rdsandiford@googlemail.com> + * mips-opc.c (mips_builtin_opcodes): Use "S,T" rather than "V,T" for ADDA.S, MULA.S and SUBA.S. diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c index 357fcc1..1e03402 100644 --- a/opcodes/mips16-opc.c +++ b/opcodes/mips16-opc.c @@ -89,26 +89,26 @@ const struct mips_opcode mips16_opcodes[] = {"and", "x,y", 0xe80c, 0xf81f, WR_x|RD_x|RD_y, 0, I1 }, {"b", "q", 0x1000, 0xf800, UBR, 0, I1 }, {"beq", "x,y,p", 0, (int) M_BEQ, INSN_MACRO, 0, I1 }, -{"beq", "x,U,p", 0, (int) M_BEQ_I, INSN_MACRO, 0, I1 }, +{"beq", "x,I,p", 0, (int) M_BEQ_I, INSN_MACRO, 0, I1 }, {"beqz", "x,p", 0x2000, 0xf800, CBR|RD_x, 0, I1 }, {"bge", "x,y,p", 0, (int) M_BGE, INSN_MACRO, 0, I1 }, -{"bge", "x,8,p", 0, (int) M_BGE_I, INSN_MACRO, 0, I1 }, +{"bge", "x,I,p", 0, (int) M_BGE_I, INSN_MACRO, 0, I1 }, {"bgeu", "x,y,p", 0, (int) M_BGEU, INSN_MACRO, 0, I1 }, -{"bgeu", "x,8,p", 0, (int) M_BGEU_I, INSN_MACRO, 0, I1 }, +{"bgeu", "x,I,p", 0, (int) M_BGEU_I, INSN_MACRO, 0, I1 }, {"bgt", "x,y,p", 0, (int) M_BGT, INSN_MACRO, 0, I1 }, -{"bgt", "x,8,p", 0, (int) M_BGT_I, INSN_MACRO, 0, I1 }, +{"bgt", "x,I,p", 0, (int) M_BGT_I, INSN_MACRO, 0, I1 }, {"bgtu", "x,y,p", 0, (int) M_BGTU, INSN_MACRO, 0, I1 }, -{"bgtu", "x,8,p", 0, (int) M_BGTU_I, INSN_MACRO, 0, I1 }, +{"bgtu", "x,I,p", 0, (int) M_BGTU_I, INSN_MACRO, 0, I1 }, {"ble", "x,y,p", 0, (int) M_BLE, INSN_MACRO, 0, I1 }, -{"ble", "x,8,p", 0, (int) M_BLE_I, INSN_MACRO, 0, I1 }, +{"ble", "x,I,p", 0, (int) M_BLE_I, INSN_MACRO, 0, I1 }, {"bleu", "x,y,p", 0, (int) M_BLEU, INSN_MACRO, 0, I1 }, -{"bleu", "x,8,p", 0, (int) M_BLEU_I, INSN_MACRO, 0, I1 }, +{"bleu", "x,I,p", 0, (int) M_BLEU_I, INSN_MACRO, 0, I1 }, {"blt", "x,y,p", 0, (int) M_BLT, INSN_MACRO, 0, I1 }, -{"blt", "x,8,p", 0, (int) M_BLT_I, INSN_MACRO, 0, I1 }, +{"blt", "x,I,p", 0, (int) M_BLT_I, INSN_MACRO, 0, I1 }, {"bltu", "x,y,p", 0, (int) M_BLTU, INSN_MACRO, 0, I1 }, -{"bltu", "x,8,p", 0, (int) M_BLTU_I, INSN_MACRO, 0, I1 }, +{"bltu", "x,I,p", 0, (int) M_BLTU_I, INSN_MACRO, 0, I1 }, {"bne", "x,y,p", 0, (int) M_BNE, INSN_MACRO, 0, I1 }, -{"bne", "x,U,p", 0, (int) M_BNE_I, INSN_MACRO, 0, I1 }, +{"bne", "x,I,p", 0, (int) M_BNE_I, INSN_MACRO, 0, I1 }, {"bnez", "x,p", 0x2800, 0xf800, CBR|RD_x, 0, I1 }, {"break", "6", 0xe805, 0xf81f, TRAP, 0, I1 }, {"bteqz", "p", 0x6000, 0xff00, CBR|RD_T, 0, I1 }, @@ -155,8 +155,8 @@ const struct mips_opcode mips16_opcodes[] = {"dsrl", "y,]", 0xe808, 0xf81f, WR_y|RD_y, 0, I3 }, {"dsrl", "y,x", 0xe816, 0xf81f, WR_y|RD_y|RD_x, 0, I3 }, {"dsubu", "z,v,y", 0xe002, 0xf803, WR_z|RD_x|RD_y, 0, I3 }, -{"dsubu", "y,x,4", 0, (int) M_DSUBU_I, INSN_MACRO, 0, I1 }, -{"dsubu", "y,j", 0, (int) M_DSUBU_I_2, INSN_MACRO, 0, I1 }, +{"dsubu", "y,x,I", 0, (int) M_DSUBU_I, INSN_MACRO, 0, I1 }, +{"dsubu", "y,I", 0, (int) M_DSUBU_I_2, INSN_MACRO, 0, I1 }, {"exit", "L", 0xed09, 0xff1f, TRAP, 0, I1 }, {"exit", "L", 0xee09, 0xff1f, TRAP, 0, I1 }, {"exit", "", 0xef09, 0xffff, TRAP, 0, I1 }, @@ -230,8 +230,8 @@ const struct mips_opcode mips16_opcodes[] = {"srl", "x,w,<", 0x3002, 0xf803, WR_x|RD_y, 0, I1 }, {"srl", "y,x", 0xe806, 0xf81f, WR_y|RD_y|RD_x, 0, I1 }, {"subu", "z,v,y", 0xe003, 0xf803, WR_z|RD_x|RD_y, 0, I1 }, -{"subu", "y,x,4", 0, (int) M_SUBU_I, INSN_MACRO, 0, I1 }, -{"subu", "x,k", 0, (int) M_SUBU_I_2, INSN_MACRO,0, I1 }, +{"subu", "y,x,I", 0, (int) M_SUBU_I, INSN_MACRO, 0, I1 }, +{"subu", "x,I", 0, (int) M_SUBU_I_2, INSN_MACRO,0, I1 }, {"sw", "y,W(x)", 0xd800, 0xf800, RD_y|RD_x, 0, I1 }, {"sw", "x,V(S)", 0xd000, 0xf800, RD_x|RD_SP, 0, I1 }, {"sw", "R,V(S)", 0x6200, 0xff00, RD_31|RD_SP, 0, I1 }, |