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| author | Yoshinori Sato <ysato@users.sourceforge.jp> | 2022-10-31 10:46:37 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2022-10-31 10:46:37 +0000 |
| commit | de1fbe7889eb4f363b979c14735b8fd51131621b (patch) | |
| tree | c0634fd5aba0e0c81a0a95e2b0aecadd31520ba8 /opcodes | |
| parent | 18bf56434d1adabbd82fa6a33d08a60ef2d71001 (diff) | |
| download | gdb-de1fbe7889eb4f363b979c14735b8fd51131621b.zip gdb-de1fbe7889eb4f363b979c14735b8fd51131621b.tar.gz gdb-de1fbe7889eb4f363b979c14735b8fd51131621b.tar.bz2 | |
RX assembler: switch arguments of thw MVTACGU insn.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/rx-decode.c | 12 | ||||
| -rw-r--r-- | opcodes/rx-decode.opc | 4 |
3 files changed, 13 insertions, 8 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index bbd3544..5bddae5 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2022-10-31 Yoshinori Sato <ysato@users.sourceforge.jp> + + * rx-decode.opc: Switch arguments of the MVTACGU insn. + * rx-decode.c: Regenerate. + 2022-09-22 Yoshinori Sato <ysato@users.sourceforge.jp> * sh-dis.c (print_insn_sh): Enforce bit7 of LDC Rm,Rn_BANK and STC diff --git a/opcodes/rx-decode.c b/opcodes/rx-decode.c index 17fbcfc..8ccb126 100644 --- a/opcodes/rx-decode.c +++ b/opcodes/rx-decode.c @@ -12476,22 +12476,22 @@ rx_decode_opcode (unsigned long pc AU, break; case 0x30: { - /** 1111 1101 0001 0111 a011 rdst mvtacgu %0, %1 */ + /** 1111 1101 0001 0111 a011 rsrc mvtacgu %1, %0 */ #line 1110 "rx-decode.opc" int a AU = (op[2] >> 7) & 0x01; #line 1110 "rx-decode.opc" - int rdst AU = op[2] & 0x0f; + int rsrc AU = op[2] & 0x0f; if (trace) { printf ("\033[33m%s\033[0m %02x %02x %02x\n", - "/** 1111 1101 0001 0111 a011 rdst mvtacgu %0, %1 */", + "/** 1111 1101 0001 0111 a011 rsrc mvtacgu %1, %0 */", op[0], op[1], op[2]); printf (" a = 0x%x,", a); - printf (" rdst = 0x%x\n", rdst); + printf (" rsrc = 0x%x\n", rsrc); } - SYNTAX("mvtacgu %0, %1"); + SYNTAX("mvtacgu %1, %0"); #line 1110 "rx-decode.opc" - ID(mvtacgu); DR(a+32); SR(rdst); F_____; + ID(mvtacgu); SR(rsrc); DR(a+32); F_____; } break; diff --git a/opcodes/rx-decode.opc b/opcodes/rx-decode.opc index 86effc3..1b303ed 100644 --- a/opcodes/rx-decode.opc +++ b/opcodes/rx-decode.opc @@ -1106,8 +1106,8 @@ rx_decode_opcode (unsigned long pc AU, /** 1111 1101 0001 111i a m11 rdst mvfacgu #%2, %1, %0 */ ID(mvfacgu); S2C(((i^1)<<1)|m); SR(a+32); DR(rdst); F_____; -/** 1111 1101 0001 0111 a011 rdst mvtacgu %0, %1 */ - ID(mvtacgu); DR(a+32); SR(rdst); F_____; +/** 1111 1101 0001 0111 a011 rsrc mvtacgu %1, %0 */ + ID(mvtacgu); SR(rsrc); DR(a+32); F_____; /** 1111 1101 0001 1001 a00i 0000 racl #%1, %0 */ ID(racl); SC(i+1); DR(a+32); F_____; |