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authorDoug Evans <dje@google.com>1998-11-30 23:41:55 +0000
committerDoug Evans <dje@google.com>1998-11-30 23:41:55 +0000
commit86dc452e25064ad7c855adb19b074f498d581bda (patch)
tree1681a3abe22dd9459099a307f7c0a4dfc71bb454 /opcodes
parent60babd1a362da01d0baa7e1871bc3c1e2b31e23a (diff)
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* cgen-dis.c (hash_insn_array): CGEN_INSN_VALUE ->
CGEN_INSN_BASE_VALUE. * cgen-asm.in (insert_normal): Change start,length to unsigned int. New args word_offset, word_length. Rewrite. (FLD): Define. (insert_1): Fix lsb0 case. * cgen-dis.in (extract_normal): Change start,length to unsigned int. New args word_offset, word_length. Rewrite. (FLD): Define. (extract_1): Fix lsb0 case. * cgen-opc.in (FLD): Define. * m32r-opc.c,m32r-opc.h,m32r-asm.c,m32r-dis.c: Regenerate. * fr30-opc.c,fr30-opc.h,fr30-asm.c,fr30-dis.c: Regenerate.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/cgen-opc.in6
1 files changed, 5 insertions, 1 deletions
diff --git a/opcodes/cgen-opc.in b/opcodes/cgen-opc.in
index 2bb47a1..44a187d 100644
--- a/opcodes/cgen-opc.in
+++ b/opcodes/cgen-opc.in
@@ -30,6 +30,9 @@ along with this program; if not, write to the Free Software Foundation, Inc.,
#include "@prefix@-opc.h"
#include "opintl.h"
+/* Used by the ifield rtx function. */
+#define FLD(f) (fields->f)
+
/* The hash functions are recorded here to help keep assembler code out of
the disassembler and vice versa. */
@@ -98,7 +101,8 @@ const CGEN_INSN *
/* Basic bit mask must be correct. */
/* ??? May wish to allow target to defer this check until the
extract handler. */
- if ((base_insn & CGEN_INSN_MASK (insn)) == CGEN_INSN_VALUE (insn))
+ if ((base_insn & CGEN_INSN_BASE_MASK (insn))
+ == CGEN_INSN_BASE_VALUE (insn))
{
/* ??? 0 is passed for `pc' */
int elength = (*CGEN_EXTRACT_FN (insn)) (od, insn, info,