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author | nobody <> | 2004-07-09 19:29:57 +0000 |
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committer | nobody <> | 2004-07-09 19:29:57 +0000 |
commit | 301f3fd37b9e4d23a8b2c780587ba26b145efbe4 (patch) | |
tree | 9fe8e70459b527d63f05726dac9cf3f58235df8c /opcodes | |
parent | 58d880d7dc46ef22215df77fa468d76cad99a900 (diff) | |
download | gdb-301f3fd37b9e4d23a8b2c780587ba26b145efbe4.zip gdb-301f3fd37b9e4d23a8b2c780587ba26b145efbe4.tar.gz gdb-301f3fd37b9e4d23a8b2c780587ba26b145efbe4.tar.bz2 |
This commit was manufactured by cvs2svn to create branch 'gdb_6_2-branch'.gdb_6_2-2004-07-10-gmt-branchpoint
Sprout from ezannoni_pie-20040323-branch 2004-03-23 23:05:53 UTC nobody 'This commit was manufactured by cvs2svn to create branch'
Cherrypick from master 2004-07-09 19:29:56 UTC Paul N. Hilfinger <hilfinger@adacore.com> 'Remove ARI problems:':
ChangeLog
MAINTAINERS
Makefile.def
Makefile.in
Makefile.tpl
bfd/ChangeLog
bfd/Makefile.am
bfd/Makefile.in
bfd/aix386-core.c
bfd/aix5ppc-core.c
bfd/aout-adobe.c
bfd/aout-target.h
bfd/aout-tic30.c
bfd/aoutf1.h
bfd/aoutx.h
bfd/archive.c
bfd/archures.c
bfd/bfd-in.h
bfd/bfd-in2.h
bfd/bfd.c
bfd/bfdio.c
bfd/binary.c
bfd/bout.c
bfd/cache.c
bfd/cisco-core.c
bfd/coff-alpha.c
bfd/coff-arm.c
bfd/coff-h8300.c
bfd/coff-i386.c
bfd/coff-mips.c
bfd/coff-ppc.c
bfd/coff-rs6000.c
bfd/coff-sh.c
bfd/coff64-rs6000.c
bfd/coffcode.h
bfd/coffgen.c
bfd/cofflink.c
bfd/config.bfd
bfd/configure
bfd/configure.in
bfd/cpu-arm.c
bfd/cpu-cr16c.c
bfd/cpu-crx.c
bfd/cpu-h8300.c
bfd/cpu-m68k.c
bfd/cpu-ns32k.c
bfd/cpu-sh.c
bfd/doc/ChangeLog
bfd/doc/Makefile.in
bfd/doc/bfdint.texi
bfd/dwarf1.c
bfd/dwarf2.c
bfd/ecoff.c
bfd/ecofflink.c
bfd/ecoffswap.h
bfd/elf-bfd.h
bfd/elf-eh-frame.c
bfd/elf-hppa.h
bfd/elf-m10200.c
bfd/elf-m10300.c
bfd/elf.c
bfd/elf32-arm.h
bfd/elf32-cr16c.c
bfd/elf32-cris.c
bfd/elf32-crx.c
bfd/elf32-d10v.c
bfd/elf32-d30v.c
bfd/elf32-dlx.c
bfd/elf32-fr30.c
bfd/elf32-frv.c
bfd/elf32-gen.c
bfd/elf32-h8300.c
bfd/elf32-hppa.c
bfd/elf32-i370.c
bfd/elf32-i386.c
bfd/elf32-i860.c
bfd/elf32-ip2k.c
bfd/elf32-iq2000.c
bfd/elf32-m32r.c
bfd/elf32-m68hc11.c
bfd/elf32-m68hc12.c
bfd/elf32-m68hc1x.c
bfd/elf32-m68hc1x.h
bfd/elf32-m68k.c
bfd/elf32-mcore.c
bfd/elf32-mips.c
bfd/elf32-openrisc.c
bfd/elf32-or32.c
bfd/elf32-ppc.c
bfd/elf32-s390.c
bfd/elf32-sh-symbian.c
bfd/elf32-sh.c
bfd/elf32-sh64-com.c
bfd/elf32-sh64.c
bfd/elf32-sparc.c
bfd/elf32-v850.c
bfd/elf32-vax.c
bfd/elf32-xstormy16.c
bfd/elf32-xtensa.c
bfd/elf64-alpha.c
bfd/elf64-gen.c
bfd/elf64-hppa.c
bfd/elf64-mips.c
bfd/elf64-mmix.c
bfd/elf64-ppc.c
bfd/elf64-s390.c
bfd/elf64-sh64.c
bfd/elf64-sparc.c
bfd/elf64-x86-64.c
bfd/elfarm-nabi.c
bfd/elfcode.h
bfd/elflink.c
bfd/elfn32-mips.c
bfd/elfxx-ia64.c
bfd/elfxx-mips.c
bfd/elfxx-mips.h
bfd/elfxx-target.h
bfd/hash.c
bfd/hp300hpux.c
bfd/hppabsd-core.c
bfd/hpux-core.c
bfd/i386linux.c
bfd/i386msdos.c
bfd/i386os9k.c
bfd/ieee.c
bfd/ihex.c
bfd/irix-core.c
bfd/libaout.h
bfd/libbfd-in.h
bfd/libbfd.c
bfd/libbfd.h
bfd/libcoff-in.h
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bfd/libecoff.h
bfd/linker.c
bfd/lynx-core.c
bfd/m68klinux.c
bfd/m88kopenbsd.c
bfd/mach-o.c
bfd/merge.c
bfd/mmo.c
bfd/netbsd-core.c
bfd/nlm-target.h
bfd/nlm32-alpha.c
bfd/nlm32-ppc.c
bfd/nlm32-sparc.c
bfd/nlmcode.h
bfd/oasys.c
bfd/opncls.c
bfd/osf-core.c
bfd/pdp11.c
bfd/pe-i386.c
bfd/pe-mips.c
bfd/peXXigen.c
bfd/pef.c
bfd/pei-i386.c
bfd/po/SRC-POTFILES.in
bfd/po/bfd.pot
bfd/po/fr.po
bfd/ppcboot.c
bfd/ptrace-core.c
bfd/reloc.c
bfd/reloc16.c
bfd/riscix.c
bfd/rs6000-core.c
bfd/sco5-core.c
bfd/section.c
bfd/simple.c
bfd/som.c
bfd/som.h
bfd/sparclinux.c
bfd/srec.c
bfd/stabs.c
bfd/sunos.c
bfd/syms.c
bfd/targets.c
bfd/tekhex.c
bfd/trad-core.c
bfd/versados.c
bfd/version.h
bfd/vms-gsd.c
bfd/vms-misc.c
bfd/vms-tir.c
bfd/vms.c
bfd/xcofflink.c
bfd/xsym.c
config-ml.in
config.sub
config/ChangeLog
config/acx.m4
configure
configure.in
cpu/ChangeLog
cpu/iq2000.opc
cpu/m32r.opc
gdb/ChangeLog
gdb/ChangeLog-2002
gdb/MAINTAINERS
gdb/Makefile.in
gdb/NEWS
gdb/PROBLEMS
gdb/acconfig.h
gdb/acinclude.m4
gdb/aclocal.m4
gdb/ada-exp.y
gdb/ada-lang.c
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gdb/ada-lex.l
gdb/ada-typeprint.c
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gdb/aix-thread.c
gdb/alpha-linux-tdep.c
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gdb/testsuite/gdb.java/jmain.exp
gdb/testsuite/gdb.java/jmain.java
gdb/testsuite/gdb.java/jmisc.exp
gdb/testsuite/gdb.java/jmisc1.exp
gdb/testsuite/gdb.mi/mi-file.exp
gdb/testsuite/gdb.mi/mi2-file.exp
gdb/testsuite/gdb.stabs/exclfwd.exp
gdb/testsuite/gdb.stabs/exclfwd.h
gdb/testsuite/gdb.stabs/exclfwd1.c
gdb/testsuite/gdb.stabs/exclfwd2.c
gdb/testsuite/gdb.stabs/weird.exp
gdb/testsuite/gdb.threads/manythreads.c
gdb/testsuite/gdb.threads/manythreads.exp
gdb/testsuite/gdb.threads/pthread_cond_wait.c
gdb/testsuite/gdb.threads/pthread_cond_wait.exp
gdb/testsuite/gdb.threads/pthreads.exp
gdb/testsuite/lib/ada.exp
gdb/testsuite/lib/compiler.c
gdb/testsuite/lib/compiler.cc
gdb/testsuite/lib/gdb.exp
gdb/thread-db.c
gdb/thread.c
gdb/top.c
gdb/tracepoint.c
gdb/tracepoint.h
gdb/trad-frame.h
gdb/tramp-frame.c
gdb/tramp-frame.h
gdb/tui/tui-hooks.c
gdb/tui/tui-io.c
gdb/tui/tui-regs.c
gdb/tui/tui.c
gdb/utils.c
gdb/uw-thread.c
gdb/v850-tdep.c
gdb/v850ice.c
gdb/valarith.c
gdb/valops.c
gdb/value.h
gdb/values.c
gdb/varobj.c
gdb/vax-tdep.c
gdb/vax-tdep.h
gdb/vaxbsd-nat.c
gdb/vaxnbsd-tdep.c
gdb/version.in
gdb/win32-nat.c
gdb/wince.c
gdb/xcoffsolib.c
gdb/xstormy16-tdep.c
include/ChangeLog
include/bfdlink.h
include/coff/ChangeLog
include/coff/ecoff.h
include/coff/internal.h
include/coff/mips.h
include/demangle.h
include/dis-asm.h
include/elf/ChangeLog
include/elf/common.h
include/elf/cr16c.h
include/elf/crx.h
include/elf/m32r.h
include/elf/mips.h
include/elf/sh.h
include/gdb/ChangeLog
include/gdb/callback.h
include/hashtab.h
include/opcode/ChangeLog
include/opcode/crx.h
include/opcode/i386.h
include/opcode/m68k.h
include/splay-tree.h
libiberty/ChangeLog
libiberty/Makefile.in
libiberty/config.in
libiberty/configure
libiberty/configure.ac
libiberty/cp-demangle.c
libiberty/cp-demangle.h
libiberty/hashtab.c
libiberty/lrealpath.c
libiberty/mkstemps.c
libiberty/pex-win32.c
libiberty/strerror.c
libiberty/testsuite/demangle-expected
opcodes/ChangeLog
opcodes/Makefile.am
opcodes/Makefile.in
opcodes/arc-ext.c
opcodes/configure
opcodes/configure.in
opcodes/crx-dis.c
opcodes/crx-opc.c
opcodes/disassemble.c
opcodes/h8300-dis.c
opcodes/i386-dis.c
opcodes/ia64-asmtab.c
opcodes/ia64-gen.c
opcodes/ia64-opc-a.c
opcodes/m32r-asm.c
opcodes/m68k-dis.c
opcodes/m68k-opc.c
opcodes/po/fr.po
opcodes/ppc-opc.c
opcodes/s390-opc.txt
opcodes/sh-dis.c
opcodes/sh-opc.h
opcodes/sparc-opc.c
sim/arm/ChangeLog
sim/arm/armemu.c
sim/common/ChangeLog
sim/common/callback.c
sim/common/dv-glue.c
sim/common/run.c
sim/common/sim-basics.h
sim/common/sim-load.c
sim/common/syscall.c
sim/d10v/ChangeLog
sim/d10v/interp.c
sim/h8300/ChangeLog
sim/h8300/compile.c
sim/m32r/ChangeLog
sim/m32r/Makefile.in
sim/m68hc11/ChangeLog
sim/m68hc11/interp.c
sim/mips/ChangeLog
sim/mips/configure
sim/mips/configure.in
sim/mips/interp.c
sim/mips/mips.igen
sim/mips/sb1.igen
sim/mips/sim-main.h
sim/mn10200/ChangeLog
sim/mn10200/interp.c
sim/mn10300/ChangeLog
sim/mn10300/Makefile.in
sim/mn10300/am33-2.igen
sim/mn10300/am33.igen
sim/mn10300/configure.in
sim/mn10300/interp.c
sim/mn10300/mn10300.igen
sim/mn10300/mn10300_sim.h
sim/mn10300/op_utils.c
sim/ppc/ChangeLog
sim/ppc/Makefile.in
sim/ppc/configure
sim/ppc/configure.in
sim/ppc/e500_registers.h
sim/ppc/hw_htab.c
sim/ppc/hw_init.c
sim/testsuite/ChangeLog
sim/testsuite/lib/sim-defs.exp
sim/testsuite/sim/h8300/ChangeLog
sim/testsuite/sim/h8300/band.s
sim/testsuite/sim/h8300/biand.s
sim/testsuite/sim/h8300/bset.s
sim/testsuite/sim/h8300/div.s
sim/testsuite/sim/h8300/mul.s
sim/testsuite/sim/mips/ChangeLog
sim/testsuite/sim/mips/basic.exp
sim/testsuite/sim/mips/fpu64-ps-sb1.s
sim/testsuite/sim/mips/fpu64-ps.s
sim/testsuite/sim/mips/hilo-hazard-1.s
sim/testsuite/sim/mips/hilo-hazard-2.s
sim/testsuite/sim/mips/hilo-hazard-3.s
sim/testsuite/sim/mips/mdmx-ob-sb1.s
sim/testsuite/sim/mips/mdmx-ob.s
sim/testsuite/sim/mips/utils-fpu.inc
sim/testsuite/sim/mips/utils-mdmx.inc
src-release
Delete:
bfd/elflink.h
bfd/mpw-config.in
bfd/mpw-make.sed
gdb/ada-tasks.c
gdb/config/i386/embed.mt
gdb/config/i386/go32.mt
gdb/config/i386/i386aout.mt
gdb/config/i386/i386nw.mt
gdb/config/i386/i386v.mt
gdb/config/i386/interix.mh
gdb/config/i386/interix.mt
gdb/config/i386/nm-interix.h
gdb/config/i386/tm-go32.h
gdb/config/i386/tm-i386.h
gdb/config/m68k/3b1.mh
gdb/config/m68k/3b1.mt
gdb/config/m68k/delta68.mh
gdb/config/m68k/delta68.mt
gdb/config/m68k/dpx2.mh
gdb/config/m68k/dpx2.mt
gdb/config/m68k/m68klynx.mh
gdb/config/m68k/m68klynx.mt
gdb/config/m68k/m68kv4.mh
gdb/config/m68k/m68kv4.mt
gdb/config/m68k/nbsdaout.mt
gdb/config/m68k/nm-delta68.h
gdb/config/m68k/nm-dpx2.h
gdb/config/m68k/nm-m68klynx.h
gdb/config/m68k/nm-sun2.h
gdb/config/m68k/nm-sun3.h
gdb/config/m68k/nm-sysv4.h
gdb/config/m68k/sun2os3.mh
gdb/config/m68k/sun2os3.mt
gdb/config/m68k/sun2os4.mh
gdb/config/m68k/sun2os4.mt
gdb/config/m68k/sun3os3.mh
gdb/config/m68k/sun3os3.mt
gdb/config/m68k/sun3os4.mh
gdb/config/m68k/sun3os4.mt
gdb/config/m68k/tm-3b1.h
gdb/config/m68k/tm-delta68.h
gdb/config/m68k/tm-dpx2.h
gdb/config/m68k/tm-m68klynx.h
gdb/config/m68k/tm-m68kv4.h
gdb/config/m68k/tm-sun2.h
gdb/config/m68k/tm-sun2os4.h
gdb/config/m68k/tm-sun3.h
gdb/config/m68k/tm-sun3os4.h
gdb/config/m68k/xm-3b1.h
gdb/config/m68k/xm-delta68.h
gdb/config/m68k/xm-dpx2.h
gdb/config/m68k/xm-m68kv4.h
gdb/config/m68k/xm-nbsd.h
gdb/config/m68k/xm-sun2.h
gdb/config/m68k/xm-sun3.h
gdb/config/m68k/xm-sun3os4.h
gdb/config/mips/decstation.mh
gdb/config/mips/littlemips.mh
gdb/config/mips/mipsv4.mh
gdb/config/mips/mipsv4.mt
gdb/config/mips/news-mips.mh
gdb/config/mips/nm-mips.h
gdb/config/mips/nm-news-mips.h
gdb/config/mips/nm-riscos.h
gdb/config/mips/riscos.mh
gdb/config/mips/tm-mipsv4.h
gdb/config/mips/xm-mips.h
gdb/config/mips/xm-mipsv4.h
gdb/config/mips/xm-riscos.h
gdb/config/sparc/tm-nbsd64.h
gdb/config/tm-sunos.h
gdb/delta68-nat.c
gdb/dpx2-nat.c
gdb/i386-interix-nat.c
gdb/i386-interix-tdep.c
gdb/m68knbsd-nat.c
gdb/m68knbsd-tdep.c
gdb/observer.h
gdb/sun3-nat.c
gdb/testsuite/gdb.base/gdb1476.c
gdb/testsuite/gdb.base/gdb1476.exp
gdb/testsuite/gdb.cp/pr-1553.cc
gdb/testsuite/gdb.cp/pr-1553.exp
gdb/testsuite/gdb.java/jmisc2.exp
gdb/xmodem.c
gdb/xmodem.h
include/mpw/ChangeLog
include/mpw/README
include/mpw/dir.h
include/mpw/dirent.h
include/mpw/fcntl.h
include/mpw/grp.h
include/mpw/mpw.h
include/mpw/pwd.h
include/mpw/spin.h
include/mpw/stat.h
include/mpw/sys/file.h
include/mpw/sys/param.h
include/mpw/sys/resource.h
include/mpw/sys/stat.h
include/mpw/sys/time.h
include/mpw/sys/types.h
include/mpw/utime.h
include/mpw/varargs.h
mpw-README
mpw-build.in
mpw-config.in
mpw-configure
mpw-install
opcodes/mpw-config.in
opcodes/mpw-make.sed
sim/mn10300/gencode.c
sim/mn10300/simops.c
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 170 | ||||
-rw-r--r-- | opcodes/Makefile.am | 7 | ||||
-rw-r--r-- | opcodes/Makefile.in | 15 | ||||
-rw-r--r-- | opcodes/arc-ext.c | 4 | ||||
-rwxr-xr-x | opcodes/configure | 377 | ||||
-rw-r--r-- | opcodes/configure.in | 1 | ||||
-rw-r--r-- | opcodes/crx-dis.c | 700 | ||||
-rw-r--r-- | opcodes/crx-opc.c | 674 | ||||
-rw-r--r-- | opcodes/disassemble.c | 9 | ||||
-rw-r--r-- | opcodes/h8300-dis.c | 11 | ||||
-rw-r--r-- | opcodes/i386-dis.c | 131 | ||||
-rw-r--r-- | opcodes/ia64-asmtab.c | 4460 | ||||
-rw-r--r-- | opcodes/ia64-gen.c | 8 | ||||
-rw-r--r-- | opcodes/ia64-opc-a.c | 3 | ||||
-rw-r--r-- | opcodes/m32r-asm.c | 7 | ||||
-rw-r--r-- | opcodes/m68k-dis.c | 565 | ||||
-rw-r--r-- | opcodes/m68k-opc.c | 4140 | ||||
-rw-r--r-- | opcodes/mpw-config.in | 27 | ||||
-rw-r--r-- | opcodes/mpw-make.sed | 25 | ||||
-rw-r--r-- | opcodes/po/fr.po | 5 | ||||
-rw-r--r-- | opcodes/ppc-opc.c | 75 | ||||
-rw-r--r-- | opcodes/s390-opc.txt | 18 | ||||
-rw-r--r-- | opcodes/sh-dis.c | 51 | ||||
-rw-r--r-- | opcodes/sh-opc.h | 159 | ||||
-rw-r--r-- | opcodes/sparc-opc.c | 164 |
25 files changed, 6844 insertions, 4962 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 947ee4f..94a54aa 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,173 @@ +2004-07-09 Andreas Schwab <schwab@suse.de> + + * m68k-dis.c (m68k_valid_ea): Check validity of all codes. + +2004-07-07 Tomer Levi <Tomer.Levi@nsc.com> + + * Makefile.am (CFILES): Add crx-dis.c, crx-opc.c. + (ALL_MACHINES): Add crx-dis.lo, crx-opc.lo. + (crx-dis.lo): New target. + (crx-opc.lo): Likewise. + * Makefile.in: Regenerate. + * configure.in: Handle bfd_crx_arch. + * configure: Regenerate. + * crx-dis.c: New file. + * crx-opc.c: New file. + * disassemble.c (ARCH_crx): Define. + (disassembler): Handle ARCH_crx. + +2004-06-29 James E Wilson <wilson@specifixinc.com> + + * ia64-opc-a.c (ia64_opcodes_a): Delete mov immediate pseudo for adds. + * ia64-asmtab.c: Regnerate. + +2004-06-28 Alan Modra <amodra@bigpond.net.au> + + * ppc-opc.c (insert_fxm): Handle mfocrf and mtocrf. + (extract_fxm): Don't test dialect. + (XFXFXM_MASK): Include the power4 bit. + (XFXM): Add p4 param. + (powerpc_opcodes): Add mfocrf and mtocrf. Adjust mtcr. + +2004-06-27 Alexandre Oliva <aoliva@redhat.com> + + 2003-07-21 Richard Sandiford <rsandifo@redhat.com> + * disassemble.c (disassembler): Handle bfd_mach_h8300sxn. + +2004-06-26 Alan Modra <amodra@bigpond.net.au> + + * ppc-opc.c (BH, XLBH_MASK): Define. + (powerpc_opcodes): Allow BH field on bclr, bclrl, bcctr, bcctrl. + +2004-06-24 Alan Modra <amodra@bigpond.net.au> + + * i386-dis.c (x_mode): Comment. + (two_source_ops): File scope. + (float_mem): Correct fisttpll and fistpll. + (float_mem_mode): New table. + (dofloat): Use it. + (OP_E): Correct intel mode PTR output. + (ptr_reg): Use open_char and close_char. + (PNI_Fixup): Handle possible suffix on sidt. Use op1out etc. for + operands. Set two_source_ops. + +2004-06-15 Alan Modra <amodra@bigpond.net.au> + + * arc-ext.c (build_ARC_extmap): Use bfd_get_section_size + instead of _raw_size. + +2004-06-08 Jakub Jelinek <jakub@redhat.com> + + * ia64-gen.c (in_iclass): Handle more postinc st + and ld variants. + * ia64-asmtab.c: Rebuilt. + +2004-06-01 Martin Schwidefsky <schwidefsky@de.ibm.com> + + * s390-opc.txt: Correct architecture mask for some opcodes. + lrv, lrvh, strv, ml, dl, alc, slb rll and mvclu are available + in the esa mode as well. + +2004-05-28 Andrew Stubbs <andrew.stubbs@superh.com> + + * sh-dis.c (target_arch): Make unsigned. + (print_insn_sh): Replace (most of) switch with a call to + sh_get_arch_from_bfd_mach(). Also use new architecture flags system. + * sh-opc.h: Redefine architecture flags values. + Add sh3-nommu architecture. + Reorganise <arch>_up macros so they make more visual sense. + (SH_MERGE_ARCH_SET): Define new macro. + (SH_VALID_BASE_ARCH_SET): Likewise. + (SH_VALID_MMU_ARCH_SET): Likewise. + (SH_VALID_CO_ARCH_SET): Likewise. + (SH_VALID_ARCH_SET): Likewise. + (SH_MERGE_ARCH_SET_VALID): Likewise. + (SH_ARCH_SET_HAS_FPU): Likewise. + (SH_ARCH_SET_HAS_DSP): Likewise. + (SH_ARCH_UNKNOWN_ARCH): Likewise. + (sh_get_arch_from_bfd_mach): Add prototype. + (sh_get_arch_up_from_bfd_mach): Likewise. + (sh_get_bfd_mach_from_arch_set): Likewise. + (sh_merge_bfd_arc): Likewise. + +2004-05-24 Peter Barada <peter@the-baradas.com> + + * m68k-dis.c(print_insn_m68k): Strip body of diassembly out + into new match_insn_m68k function. Loop over canidate + matches and select first that completely matches. + * m68k-dis.c(print_insn_arg): Fix 'g' case to only extract 1 bit. + * m68k-dis.c(print_insn_arg): Call new function m68k_valid_ea + to verify addressing for MAC/EMAC. + * m68k-dis.c(print_insn_arg): Use reg_half_names for MAC/EMAC + reigster halves since 'fpu' and 'spl' look misleading. + * m68k-dis.c(fetch_arg): Fix 'G', 'H', 'I', 'f', 'M', 'N' cases. + * m68k-opc.c: Rearragne mac/emac cases to use longest for + first, tighten up match masks. + * m68k-opc.c: Add 'size' field to struct m68k_opcode. Produce + 'size' from special case code in print_insn_m68k to + determine decode size of insns. + +2004-05-19 Alan Modra <amodra@bigpond.net.au> + + * ppc-opc.c (insert_fxm): Enable two operand mfcr when -many as + well as when -mpower4. + +2004-05-13 Nick Clifton <nickc@redhat.com> + + * po/fr.po: Updated French translation. + +2004-05-05 Peter Barada <peter@the-baradas.com> + + * m68k-dis.c(print_insn_m68k): Add new chips, use core + variants in arch_mask. Only set m68881/68851 for 68k chips. + * m68k-op.c: Switch from ColdFire chips to core variants. + +2004-05-05 Alan Modra <amodra@bigpond.net.au> + + PR 147. + * ppc-opc.c (PPCVEC): Remove PPC_OPCODE_PPC. + +2004-04-29 Ben Elliston <bje@au.ibm.com> + + * ppc-opc.c (XCMPL): Renmame to XOPL. Update users. + (powerpc_opcodes): Add "dbczl" instruction for PPC970. + +2004-04-22 Kaz Kojima <kkojima@rr.iij4u.or.jp> + + * sh-dis.c (print_insn_sh): Print the value in constant pool + as a symbol if it looks like a symbol. + +2004-04-22 Peter Barada <peter@the-baradas.com> + + * m68k-dis.c(print_insn_m68k): Set mfcmac/mcfemac on + appropriate ColdFire architectures. + (print_insn_m68k): Handle EMAC, MAC/EMAC scalefactor, and MAC/EMAC + mask addressing. + Add EMAC instructions, fix MAC instructions. Remove + macmw/macml/msacmw/msacml instructions since mask addressing now + supported. + +2004-04-20 Jakub Jelinek <jakub@redhat.com> + + * sparc-opc.c (fmoviccx, fmovfccx, fmovccx): Define. + (fmovicc, fmovfcc, fmovcc): Remove fpsize argument, change opcode to + suffix. Use fmov*x macros, create all 3 fpsize variants in one + macro. Adjust all users. + +2004-04-15 Anil Paranjpe <anilp1@kpitcummins.com> + + * h8300-dis.c (bfd_h8_disassemble) : Treat "adds" & "subs" + separately. + +2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com> + + * m32r-asm.c: Regenerate. + +2004-03-29 Stan Shebs <shebs@apple.com> + + * mpw-config.in, mpw-make.sed: Remove MPW support files, no longer + used. + 2004-03-19 Alan Modra <amodra@bigpond.net.au> * aclocal.m4: Regenerate. diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am index ea621f2..5c28971 100644 --- a/opcodes/Makefile.am +++ b/opcodes/Makefile.am @@ -57,6 +57,8 @@ CFILES = \ cgen-opc.c \ cris-dis.c \ cris-opc.c \ + crx-dis.c \ + crx-opc.c \ d10v-dis.c \ d10v-opc.c \ d30v-dis.c \ @@ -179,6 +181,8 @@ ALL_MACHINES = \ cgen-opc.lo \ cris-dis.lo \ cris-opc.lo \ + crx-dis.lo \ + crx-opc.lo \ d10v-dis.lo \ d10v-opc.lo \ d30v-dis.lo \ @@ -548,6 +552,9 @@ cris-dis.lo: cris-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \ $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h +crx-dis.lo: crx-dis.c $(INCDIR)/opcode/crx.h \ + $(INCDIR)/dis-asm.h sysdep.h $(INCDIR)/ansidecl.h +crx-opc.lo: crx-opc.c $(INCDIR)/opcode/crx.h d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/symcat.h diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in index 559194d..c0d0ad8 100644 --- a/opcodes/Makefile.in +++ b/opcodes/Makefile.in @@ -1,6 +1,6 @@ -# Makefile.in generated automatically by automake 1.4 from Makefile.am +# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am -# Copyright (C) 1994, 1995-8, 1999 Free Software Foundation, Inc. +# Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc. # This Makefile.in is free software; the Free Software Foundation # gives unlimited permission to copy and/or distribute it, # with or without modifications, as long as this notice is preserved. @@ -168,6 +168,8 @@ CFILES = \ cgen-opc.c \ cris-dis.c \ cris-opc.c \ + crx-dis.c \ + crx-opc.c \ d10v-dis.c \ d10v-opc.c \ d30v-dis.c \ @@ -291,6 +293,8 @@ ALL_MACHINES = \ cgen-opc.lo \ cris-dis.lo \ cris-opc.lo \ + crx-dis.lo \ + crx-opc.lo \ d10v-dis.lo \ d10v-opc.lo \ d30v-dis.lo \ @@ -473,7 +477,7 @@ acinclude.m4 aclocal.m4 config.in configure configure.in DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST) -TAR = tar +TAR = gtar GZIP_ENV = --best SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES) OBJECTS = libopcodes.a.$(OBJEXT) $(libopcodes_la_OBJECTS) @@ -622,7 +626,7 @@ maintainer-clean-recursive: dot_seen=no; \ rev=''; list='$(SUBDIRS)'; for subdir in $$list; do \ rev="$$subdir $$rev"; \ - test "$$subdir" = "." && dot_seen=yes; \ + test "$$subdir" != "." || dot_seen=yes; \ done; \ test "$$dot_seen" = "no" && rev=". $$rev"; \ target=`echo $@ | sed s/-recursive//`; \ @@ -1044,6 +1048,9 @@ cris-dis.lo: cris-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \ $(INCDIR)/opcode/cris.h $(INCDIR)/libiberty.h cris-opc.lo: cris-opc.c $(INCDIR)/opcode/cris.h +crx-dis.lo: crx-dis.c $(INCDIR)/opcode/crx.h \ + $(INCDIR)/dis-asm.h sysdep.h $(INCDIR)/ansidecl.h +crx-opc.lo: crx-opc.c $(INCDIR)/opcode/crx.h d10v-dis.lo: d10v-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \ $(INCDIR)/opcode/d10v.h $(INCDIR)/dis-asm.h $(BFD_H) \ $(INCDIR)/symcat.h diff --git a/opcodes/arc-ext.c b/opcodes/arc-ext.c index fd43d29..6634534 100644 --- a/opcodes/arc-ext.c +++ b/opcodes/arc-ext.c @@ -1,5 +1,5 @@ /* ARC target-dependent stuff. Extension structure access functions - Copyright 1995, 1997, 2000, 2001 Free Software Foundation, Inc. + Copyright 1995, 1997, 2000, 2001, 2004 Free Software Foundation, Inc. This file is part of GDB. @@ -248,7 +248,7 @@ build_ARC_extmap (text_bfd) for (p = text_bfd->sections; p != NULL; p = p->next) if (!strcmp (p->name, ".arcextmap")) { - count = p->_raw_size; + count = bfd_get_section_size (p); arcExtMap = (char *) xmalloc (count); if (bfd_get_section_contents (text_bfd, p, (PTR) arcExtMap, 0, count)) { diff --git a/opcodes/configure b/opcodes/configure index 6cff4e7..b33d646 100755 --- a/opcodes/configure +++ b/opcodes/configure @@ -57,6 +57,7 @@ program_suffix=NONE program_transform_name=s,x,x, silent= site= +sitefile= srcdir= target=NONE verbose= @@ -171,6 +172,7 @@ Configuration: --help print this message --no-create do not create output files --quiet, --silent do not print \`checking...' messages + --site-file=FILE use FILE as the site file --version print the version of autoconf that created configure Directory and file names: --prefix=PREFIX install architecture-independent files in PREFIX @@ -341,6 +343,11 @@ EOF -site=* | --site=* | --sit=*) site="$ac_optarg" ;; + -site-file | --site-file | --site-fil | --site-fi | --site-f) + ac_prev=sitefile ;; + -site-file=* | --site-file=* | --site-fil=* | --site-fi=* | --site-f=*) + sitefile="$ac_optarg" ;; + -srcdir | --srcdir | --srcdi | --srcd | --src | --sr) ac_prev=srcdir ;; -srcdir=* | --srcdir=* | --srcdi=* | --srcd=* | --src=* | --sr=*) @@ -506,12 +513,16 @@ fi srcdir=`echo "${srcdir}" | sed 's%\([^/]\)/*$%\1%'` # Prefer explicitly selected file to automatically selected ones. -if test -z "$CONFIG_SITE"; then - if test "x$prefix" != xNONE; then - CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" - else - CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" +if test -z "$sitefile"; then + if test -z "$CONFIG_SITE"; then + if test "x$prefix" != xNONE; then + CONFIG_SITE="$prefix/share/config.site $prefix/etc/config.site" + else + CONFIG_SITE="$ac_default_prefix/share/config.site $ac_default_prefix/etc/config.site" + fi fi +else + CONFIG_SITE="$sitefile" fi for ac_site_file in $CONFIG_SITE; do if test -r "$ac_site_file"; then @@ -550,12 +561,12 @@ else fi echo $ac_n "checking for Cygwin environment""... $ac_c" 1>&6 -echo "configure:554: checking for Cygwin environment" >&5 +echo "configure:565: checking for Cygwin environment" >&5 if eval "test \"`echo '$''{'ac_cv_cygwin'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 559 "configure" +#line 570 "configure" #include "confdefs.h" int main() { @@ -566,7 +577,7 @@ int main() { return __CYGWIN__; ; return 0; } EOF -if { (eval echo configure:570: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:581: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_cygwin=yes else @@ -583,19 +594,19 @@ echo "$ac_t""$ac_cv_cygwin" 1>&6 CYGWIN= test "$ac_cv_cygwin" = yes && CYGWIN=yes echo $ac_n "checking for mingw32 environment""... $ac_c" 1>&6 -echo "configure:587: checking for mingw32 environment" >&5 +echo "configure:598: checking for mingw32 environment" >&5 if eval "test \"`echo '$''{'ac_cv_mingw32'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 592 "configure" +#line 603 "configure" #include "confdefs.h" int main() { return __MINGW32__; ; return 0; } EOF -if { (eval echo configure:599: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:610: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_mingw32=yes else @@ -660,7 +671,7 @@ else { echo "configure: error: can not run $ac_config_sub" 1>&2; exit 1; } fi echo $ac_n "checking host system type""... $ac_c" 1>&6 -echo "configure:664: checking host system type" >&5 +echo "configure:675: checking host system type" >&5 host_alias=$host case "$host_alias" in @@ -681,7 +692,7 @@ host_os=`echo $host | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$host" 1>&6 echo $ac_n "checking target system type""... $ac_c" 1>&6 -echo "configure:685: checking target system type" >&5 +echo "configure:696: checking target system type" >&5 target_alias=$target case "$target_alias" in @@ -699,7 +710,7 @@ target_os=`echo $target | sed 's/^\([^-]*\)-\([^-]*\)-\(.*\)$/\3/'` echo "$ac_t""$target" 1>&6 echo $ac_n "checking build system type""... $ac_c" 1>&6 -echo "configure:703: checking build system type" >&5 +echo "configure:714: checking build system type" >&5 build_alias=$build case "$build_alias" in @@ -723,7 +734,7 @@ test "$host_alias" != "$target_alias" && echo $ac_n "checking for strerror in -lcposix""... $ac_c" 1>&6 -echo "configure:727: checking for strerror in -lcposix" >&5 +echo "configure:738: checking for strerror in -lcposix" >&5 ac_lib_var=`echo cposix'_'strerror | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -731,7 +742,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lcposix $LIBS" cat > conftest.$ac_ext <<EOF -#line 735 "configure" +#line 746 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -742,7 +753,7 @@ int main() { strerror() ; return 0; } EOF -if { (eval echo configure:746: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:757: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -783,7 +794,7 @@ am__api_version="1.4" # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 -echo "configure:787: checking for a BSD compatible install" >&5 +echo "configure:798: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -836,7 +847,7 @@ test -z "$INSTALL_SCRIPT" && INSTALL_SCRIPT='${INSTALL_PROGRAM}' test -z "$INSTALL_DATA" && INSTALL_DATA='${INSTALL} -m 644' echo $ac_n "checking whether build environment is sane""... $ac_c" 1>&6 -echo "configure:840: checking whether build environment is sane" >&5 +echo "configure:851: checking whether build environment is sane" >&5 # Just in case sleep 1 echo timestamp > conftestfile @@ -893,7 +904,7 @@ test "$program_suffix" != NONE && test "$program_transform_name" = "" && program_transform_name="s,x,x," echo $ac_n "checking whether ${MAKE-make} sets \${MAKE}""... $ac_c" 1>&6 -echo "configure:897: checking whether ${MAKE-make} sets \${MAKE}" >&5 +echo "configure:908: checking whether ${MAKE-make} sets \${MAKE}" >&5 set dummy ${MAKE-make}; ac_make=`echo "$2" | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_prog_make_${ac_make}_set'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -939,7 +950,7 @@ EOF missing_dir=`cd $ac_aux_dir && pwd` echo $ac_n "checking for working aclocal-${am__api_version}""... $ac_c" 1>&6 -echo "configure:943: checking for working aclocal-${am__api_version}" >&5 +echo "configure:954: checking for working aclocal-${am__api_version}" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. @@ -952,7 +963,7 @@ else fi echo $ac_n "checking for working autoconf""... $ac_c" 1>&6 -echo "configure:956: checking for working autoconf" >&5 +echo "configure:967: checking for working autoconf" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. @@ -965,7 +976,7 @@ else fi echo $ac_n "checking for working automake-${am__api_version}""... $ac_c" 1>&6 -echo "configure:969: checking for working automake-${am__api_version}" >&5 +echo "configure:980: checking for working automake-${am__api_version}" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. @@ -978,7 +989,7 @@ else fi echo $ac_n "checking for working autoheader""... $ac_c" 1>&6 -echo "configure:982: checking for working autoheader" >&5 +echo "configure:993: checking for working autoheader" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. @@ -991,7 +1002,7 @@ else fi echo $ac_n "checking for working makeinfo""... $ac_c" 1>&6 -echo "configure:995: checking for working makeinfo" >&5 +echo "configure:1006: checking for working makeinfo" >&5 # Run test in a subshell; some versions of sh will print an error if # an executable is not found, even if stderr is redirected. # Redirect stdin to placate older versions of autoconf. Sigh. @@ -1014,7 +1025,7 @@ fi # Extract the first word of "${ac_tool_prefix}ar", so it can be a program name with args. set dummy ${ac_tool_prefix}ar; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1018: checking for $ac_word" >&5 +echo "configure:1029: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_AR'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1046,7 +1057,7 @@ fi # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1050: checking for $ac_word" >&5 +echo "configure:1061: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1078,7 +1089,7 @@ if test -n "$ac_tool_prefix"; then # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1082: checking for $ac_word" >&5 +echo "configure:1093: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1184,7 +1195,7 @@ fi # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1188: checking for $ac_word" >&5 +echo "configure:1199: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1214,7 +1225,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1218: checking for $ac_word" >&5 +echo "configure:1229: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1265,7 +1276,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1269: checking for $ac_word" >&5 +echo "configure:1280: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1297,7 +1308,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:1301: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:1312: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -1308,12 +1319,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 1312 "configure" +#line 1323 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:1317: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:1328: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -1339,12 +1350,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:1343: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:1354: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:1348: checking whether we are using GNU C" >&5 +echo "configure:1359: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1353,7 +1364,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1357: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:1368: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -1372,7 +1383,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:1376: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:1387: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1415,7 +1426,7 @@ ac_prog=ld if test "$GCC" = yes; then # Check if gcc -print-prog-name=ld gives a path. echo $ac_n "checking for ld used by GCC""... $ac_c" 1>&6 -echo "configure:1419: checking for ld used by GCC" >&5 +echo "configure:1430: checking for ld used by GCC" >&5 case $host in *-*-mingw*) # gcc leaves a trailing carriage return which upsets mingw @@ -1445,10 +1456,10 @@ echo "configure:1419: checking for ld used by GCC" >&5 esac elif test "$with_gnu_ld" = yes; then echo $ac_n "checking for GNU ld""... $ac_c" 1>&6 -echo "configure:1449: checking for GNU ld" >&5 +echo "configure:1460: checking for GNU ld" >&5 else echo $ac_n "checking for non-GNU ld""... $ac_c" 1>&6 -echo "configure:1452: checking for non-GNU ld" >&5 +echo "configure:1463: checking for non-GNU ld" >&5 fi if eval "test \"`echo '$''{'lt_cv_path_LD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -1483,7 +1494,7 @@ else fi test -z "$LD" && { echo "configure: error: no acceptable ld found in \$PATH" 1>&2; exit 1; } echo $ac_n "checking if the linker ($LD) is GNU ld""... $ac_c" 1>&6 -echo "configure:1487: checking if the linker ($LD) is GNU ld" >&5 +echo "configure:1498: checking if the linker ($LD) is GNU ld" >&5 if eval "test \"`echo '$''{'lt_cv_prog_gnu_ld'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1500,7 +1511,7 @@ with_gnu_ld=$lt_cv_prog_gnu_ld echo $ac_n "checking for $LD option to reload object files""... $ac_c" 1>&6 -echo "configure:1504: checking for $LD option to reload object files" >&5 +echo "configure:1515: checking for $LD option to reload object files" >&5 if eval "test \"`echo '$''{'lt_cv_ld_reload_flag'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1512,7 +1523,7 @@ reload_flag=$lt_cv_ld_reload_flag test -n "$reload_flag" && reload_flag=" $reload_flag" echo $ac_n "checking for BSD-compatible nm""... $ac_c" 1>&6 -echo "configure:1516: checking for BSD-compatible nm" >&5 +echo "configure:1527: checking for BSD-compatible nm" >&5 if eval "test \"`echo '$''{'lt_cv_path_NM'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1550,7 +1561,7 @@ NM="$lt_cv_path_NM" echo "$ac_t""$NM" 1>&6 echo $ac_n "checking whether ln -s works""... $ac_c" 1>&6 -echo "configure:1554: checking whether ln -s works" >&5 +echo "configure:1565: checking whether ln -s works" >&5 if eval "test \"`echo '$''{'ac_cv_prog_LN_S'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1571,7 +1582,7 @@ else fi echo $ac_n "checking how to recognise dependant libraries""... $ac_c" 1>&6 -echo "configure:1575: checking how to recognise dependant libraries" >&5 +echo "configure:1586: checking how to recognise dependant libraries" >&5 if eval "test \"`echo '$''{'lt_cv_deplibs_check_method'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1744,13 +1755,13 @@ file_magic_cmd=$lt_cv_file_magic_cmd deplibs_check_method=$lt_cv_deplibs_check_method echo $ac_n "checking for object suffix""... $ac_c" 1>&6 -echo "configure:1748: checking for object suffix" >&5 +echo "configure:1759: checking for object suffix" >&5 if eval "test \"`echo '$''{'ac_cv_objext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else rm -f conftest* echo 'int i = 1;' > conftest.$ac_ext -if { (eval echo configure:1754: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:1765: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then for ac_file in conftest.*; do case $ac_file in *.c) ;; @@ -1770,7 +1781,7 @@ ac_objext=$ac_cv_objext echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:1774: checking for executable suffix" >&5 +echo "configure:1785: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1780,10 +1791,10 @@ else rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= - if { (eval echo configure:1784: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + if { (eval echo configure:1795: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in - *.c | *.o | *.obj) ;; + *.c | *.o | *.obj | *.ilk | *.pdb) ;; *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; esac done @@ -1807,7 +1818,7 @@ case $deplibs_check_method in file_magic*) if test "$file_magic_cmd" = '$MAGIC_CMD'; then echo $ac_n "checking for ${ac_tool_prefix}file""... $ac_c" 1>&6 -echo "configure:1811: checking for ${ac_tool_prefix}file" >&5 +echo "configure:1822: checking for ${ac_tool_prefix}file" >&5 if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1869,7 +1880,7 @@ fi if test -z "$lt_cv_path_MAGIC_CMD"; then if test -n "$ac_tool_prefix"; then echo $ac_n "checking for file""... $ac_c" 1>&6 -echo "configure:1873: checking for file" >&5 +echo "configure:1884: checking for file" >&5 if eval "test \"`echo '$''{'lt_cv_path_MAGIC_CMD'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1940,7 +1951,7 @@ esac # Extract the first word of "${ac_tool_prefix}ranlib", so it can be a program name with args. set dummy ${ac_tool_prefix}ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1944: checking for $ac_word" >&5 +echo "configure:1955: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -1972,7 +1983,7 @@ if test -n "$ac_tool_prefix"; then # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:1976: checking for $ac_word" >&5 +echo "configure:1987: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2007,7 +2018,7 @@ fi # Extract the first word of "${ac_tool_prefix}strip", so it can be a program name with args. set dummy ${ac_tool_prefix}strip; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2011: checking for $ac_word" >&5 +echo "configure:2022: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2039,7 +2050,7 @@ if test -n "$ac_tool_prefix"; then # Extract the first word of "strip", so it can be a program name with args. set dummy strip; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2043: checking for $ac_word" >&5 +echo "configure:2054: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_STRIP'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2106,8 +2117,8 @@ test x"$pic_mode" = xno && libtool_flags="$libtool_flags --prefer-non-pic" case $host in *-*-irix6*) # Find out which ABI we are using. - echo '#line 2110 "configure"' > conftest.$ac_ext - if { (eval echo configure:2111: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + echo '#line 2121 "configure"' > conftest.$ac_ext + if { (eval echo configure:2122: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then if test "$lt_cv_prog_gnu_ld" = yes; then case `/usr/bin/file conftest.$ac_objext` in *32-bit*) @@ -2140,7 +2151,7 @@ case $host in ia64-*-hpux*) # Find out which ABI we are using. echo 'int i;' > conftest.$ac_ext - if { (eval echo configure:2144: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then + if { (eval echo configure:2155: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then case "`/usr/bin/file conftest.o`" in *ELF-32*) HPUX_IA64_MODE="32" @@ -2158,7 +2169,7 @@ ia64-*-hpux*) SAVE_CFLAGS="$CFLAGS" CFLAGS="$CFLAGS -belf" echo $ac_n "checking whether the C compiler needs -belf""... $ac_c" 1>&6 -echo "configure:2162: checking whether the C compiler needs -belf" >&5 +echo "configure:2173: checking whether the C compiler needs -belf" >&5 if eval "test \"`echo '$''{'lt_cv_cc_needs_belf'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2171,14 +2182,14 @@ ac_link='${CC-cc} -o conftest${ac_exeext} $CFLAGS $CPPFLAGS $LDFLAGS conftest.$a cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext <<EOF -#line 2175 "configure" +#line 2186 "configure" #include "confdefs.h" int main() { ; return 0; } EOF -if { (eval echo configure:2182: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2193: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* lt_cv_cc_needs_belf=yes else @@ -2346,7 +2357,7 @@ if test -z "$target" ; then fi echo $ac_n "checking whether to enable maintainer-specific portions of Makefiles""... $ac_c" 1>&6 -echo "configure:2350: checking whether to enable maintainer-specific portions of Makefiles" >&5 +echo "configure:2361: checking whether to enable maintainer-specific portions of Makefiles" >&5 # Check whether --enable-maintainer-mode or --disable-maintainer-mode was given. if test "${enable_maintainer_mode+set}" = set; then enableval="$enable_maintainer_mode" @@ -2369,7 +2380,7 @@ fi echo $ac_n "checking whether to install libbfd""... $ac_c" 1>&6 -echo "configure:2373: checking whether to install libbfd" >&5 +echo "configure:2384: checking whether to install libbfd" >&5 # Check whether --enable-install-libbfd or --disable-install-libbfd was given. if test "${enable_install_libbfd+set}" = set; then enableval="$enable_install_libbfd" @@ -2406,7 +2417,7 @@ fi echo $ac_n "checking for executable suffix""... $ac_c" 1>&6 -echo "configure:2410: checking for executable suffix" >&5 +echo "configure:2421: checking for executable suffix" >&5 if eval "test \"`echo '$''{'ac_cv_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2416,10 +2427,10 @@ else rm -f conftest* echo 'int main () { return 0; }' > conftest.$ac_ext ac_cv_exeext= - if { (eval echo configure:2420: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then + if { (eval echo configure:2431: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; }; then for file in conftest.*; do case $file in - *.c | *.o | *.obj) ;; + *.c | *.o | *.obj | *.ilk | *.pdb) ;; *) ac_cv_exeext=`echo $file | sed -e s/conftest//` ;; esac done @@ -2442,7 +2453,7 @@ ac_exeext=$EXEEXT # Extract the first word of "gcc", so it can be a program name with args. set dummy gcc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2446: checking for $ac_word" >&5 +echo "configure:2457: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2472,7 +2483,7 @@ if test -z "$CC"; then # Extract the first word of "cc", so it can be a program name with args. set dummy cc; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2476: checking for $ac_word" >&5 +echo "configure:2487: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2523,7 +2534,7 @@ fi # Extract the first word of "cl", so it can be a program name with args. set dummy cl; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2527: checking for $ac_word" >&5 +echo "configure:2538: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_CC'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2555,7 +2566,7 @@ fi fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works""... $ac_c" 1>&6 -echo "configure:2559: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 +echo "configure:2570: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) works" >&5 ac_ext=c # CFLAGS is not in ac_cpp because -g, -O, etc. are not valid cpp options. @@ -2566,12 +2577,12 @@ cross_compiling=$ac_cv_prog_cc_cross cat > conftest.$ac_ext << EOF -#line 2570 "configure" +#line 2581 "configure" #include "confdefs.h" main(){return(0);} EOF -if { (eval echo configure:2575: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:2586: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then ac_cv_prog_cc_works=yes # If we can't run a trivial program, we are probably using a cross compiler. if (./conftest; exit) 2>/dev/null; then @@ -2597,12 +2608,12 @@ if test $ac_cv_prog_cc_works = no; then { echo "configure: error: installation or configuration problem: C compiler cannot create executables." 1>&2; exit 1; } fi echo $ac_n "checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler""... $ac_c" 1>&6 -echo "configure:2601: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 +echo "configure:2612: checking whether the C compiler ($CC $CFLAGS $LDFLAGS) is a cross-compiler" >&5 echo "$ac_t""$ac_cv_prog_cc_cross" 1>&6 cross_compiling=$ac_cv_prog_cc_cross echo $ac_n "checking whether we are using GNU C""... $ac_c" 1>&6 -echo "configure:2606: checking whether we are using GNU C" >&5 +echo "configure:2617: checking whether we are using GNU C" >&5 if eval "test \"`echo '$''{'ac_cv_prog_gcc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2611,7 +2622,7 @@ else yes; #endif EOF -if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:2615: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then +if { ac_try='${CC-cc} -E conftest.c'; { (eval echo configure:2626: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; }; } | egrep yes >/dev/null 2>&1; then ac_cv_prog_gcc=yes else ac_cv_prog_gcc=no @@ -2630,7 +2641,7 @@ ac_test_CFLAGS="${CFLAGS+set}" ac_save_CFLAGS="$CFLAGS" CFLAGS= echo $ac_n "checking whether ${CC-cc} accepts -g""... $ac_c" 1>&6 -echo "configure:2634: checking whether ${CC-cc} accepts -g" >&5 +echo "configure:2645: checking whether ${CC-cc} accepts -g" >&5 if eval "test \"`echo '$''{'ac_cv_prog_cc_g'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2664,7 +2675,7 @@ fi ALL_LINGUAS="fr sv tr es da de id pt_BR ro nl" echo $ac_n "checking how to run the C preprocessor""... $ac_c" 1>&6 -echo "configure:2668: checking how to run the C preprocessor" >&5 +echo "configure:2679: checking how to run the C preprocessor" >&5 # On Suns, sometimes $CPP names a directory. if test -n "$CPP" && test -d "$CPP"; then CPP= @@ -2679,13 +2690,13 @@ else # On the NeXT, cc -E runs the code through the compiler's parser, # not just through cpp. cat > conftest.$ac_ext <<EOF -#line 2683 "configure" +#line 2694 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2689: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2700: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -2696,13 +2707,13 @@ else rm -rf conftest* CPP="${CC-cc} -E -traditional-cpp" cat > conftest.$ac_ext <<EOF -#line 2700 "configure" +#line 2711 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2706: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2717: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -2713,13 +2724,13 @@ else rm -rf conftest* CPP="${CC-cc} -nologo -E" cat > conftest.$ac_ext <<EOF -#line 2717 "configure" +#line 2728 "configure" #include "confdefs.h" #include <assert.h> Syntax Error EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2723: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2734: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then : @@ -2746,7 +2757,7 @@ echo "$ac_t""$CPP" 1>&6 # Extract the first word of "ranlib", so it can be a program name with args. set dummy ranlib; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:2750: checking for $ac_word" >&5 +echo "configure:2761: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_prog_RANLIB'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -2774,12 +2785,12 @@ else fi echo $ac_n "checking for ANSI C header files""... $ac_c" 1>&6 -echo "configure:2778: checking for ANSI C header files" >&5 +echo "configure:2789: checking for ANSI C header files" >&5 if eval "test \"`echo '$''{'ac_cv_header_stdc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2783 "configure" +#line 2794 "configure" #include "confdefs.h" #include <stdlib.h> #include <stdarg.h> @@ -2787,7 +2798,7 @@ else #include <float.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:2791: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:2802: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -2804,7 +2815,7 @@ rm -f conftest* if test $ac_cv_header_stdc = yes; then # SunOS 4.x string.h does not declare mem*, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 2808 "configure" +#line 2819 "configure" #include "confdefs.h" #include <string.h> EOF @@ -2822,7 +2833,7 @@ fi if test $ac_cv_header_stdc = yes; then # ISC 2.0.2 stdlib.h does not declare free, contrary to ANSI. cat > conftest.$ac_ext <<EOF -#line 2826 "configure" +#line 2837 "configure" #include "confdefs.h" #include <stdlib.h> EOF @@ -2843,7 +2854,7 @@ if test "$cross_compiling" = yes; then : else cat > conftest.$ac_ext <<EOF -#line 2847 "configure" +#line 2858 "configure" #include "confdefs.h" #include <ctype.h> #define ISLOWER(c) ('a' <= (c) && (c) <= 'z') @@ -2854,7 +2865,7 @@ if (XOR (islower (i), ISLOWER (i)) || toupper (i) != TOUPPER (i)) exit(2); exit (0); } EOF -if { (eval echo configure:2858: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:2869: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then : else @@ -2878,12 +2889,12 @@ EOF fi echo $ac_n "checking for working const""... $ac_c" 1>&6 -echo "configure:2882: checking for working const" >&5 +echo "configure:2893: checking for working const" >&5 if eval "test \"`echo '$''{'ac_cv_c_const'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 2887 "configure" +#line 2898 "configure" #include "confdefs.h" int main() { @@ -2932,7 +2943,7 @@ ccp = (char const *const *) p; ; return 0; } EOF -if { (eval echo configure:2936: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:2947: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_const=yes else @@ -2953,21 +2964,21 @@ EOF fi echo $ac_n "checking for inline""... $ac_c" 1>&6 -echo "configure:2957: checking for inline" >&5 +echo "configure:2968: checking for inline" >&5 if eval "test \"`echo '$''{'ac_cv_c_inline'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else ac_cv_c_inline=no for ac_kw in inline __inline__ __inline; do cat > conftest.$ac_ext <<EOF -#line 2964 "configure" +#line 2975 "configure" #include "confdefs.h" int main() { } $ac_kw foo() { ; return 0; } EOF -if { (eval echo configure:2971: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then +if { (eval echo configure:2982: \"$ac_compile\") 1>&5; (eval $ac_compile) 2>&5; }; then rm -rf conftest* ac_cv_c_inline=$ac_kw; break else @@ -2993,12 +3004,12 @@ EOF esac echo $ac_n "checking for off_t""... $ac_c" 1>&6 -echo "configure:2997: checking for off_t" >&5 +echo "configure:3008: checking for off_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_off_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3002 "configure" +#line 3013 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -3026,12 +3037,12 @@ EOF fi echo $ac_n "checking for size_t""... $ac_c" 1>&6 -echo "configure:3030: checking for size_t" >&5 +echo "configure:3041: checking for size_t" >&5 if eval "test \"`echo '$''{'ac_cv_type_size_t'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3035 "configure" +#line 3046 "configure" #include "confdefs.h" #include <sys/types.h> #if STDC_HEADERS @@ -3061,19 +3072,19 @@ fi # The Ultrix 4.2 mips builtin alloca declared by alloca.h only works # for constant arguments. Useless! echo $ac_n "checking for working alloca.h""... $ac_c" 1>&6 -echo "configure:3065: checking for working alloca.h" >&5 +echo "configure:3076: checking for working alloca.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_alloca_h'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3070 "configure" +#line 3081 "configure" #include "confdefs.h" #include <alloca.h> int main() { char *p = alloca(2 * sizeof(int)); ; return 0; } EOF -if { (eval echo configure:3077: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3088: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_header_alloca_h=yes else @@ -3094,12 +3105,12 @@ EOF fi echo $ac_n "checking for alloca""... $ac_c" 1>&6 -echo "configure:3098: checking for alloca" >&5 +echo "configure:3109: checking for alloca" >&5 if eval "test \"`echo '$''{'ac_cv_func_alloca_works'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3103 "configure" +#line 3114 "configure" #include "confdefs.h" #ifdef __GNUC__ @@ -3127,7 +3138,7 @@ int main() { char *p = (char *) alloca(1); ; return 0; } EOF -if { (eval echo configure:3131: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3142: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* ac_cv_func_alloca_works=yes else @@ -3159,12 +3170,12 @@ EOF echo $ac_n "checking whether alloca needs Cray hooks""... $ac_c" 1>&6 -echo "configure:3163: checking whether alloca needs Cray hooks" >&5 +echo "configure:3174: checking whether alloca needs Cray hooks" >&5 if eval "test \"`echo '$''{'ac_cv_os_cray'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3168 "configure" +#line 3179 "configure" #include "confdefs.h" #if defined(CRAY) && ! defined(CRAY2) webecray @@ -3189,12 +3200,12 @@ echo "$ac_t""$ac_cv_os_cray" 1>&6 if test $ac_cv_os_cray = yes; then for ac_func in _getb67 GETB67 getb67; do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3193: checking for $ac_func" >&5 +echo "configure:3204: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3198 "configure" +#line 3209 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3217,7 +3228,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3221: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3232: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3244,7 +3255,7 @@ done fi echo $ac_n "checking stack direction for C alloca""... $ac_c" 1>&6 -echo "configure:3248: checking stack direction for C alloca" >&5 +echo "configure:3259: checking stack direction for C alloca" >&5 if eval "test \"`echo '$''{'ac_cv_c_stack_direction'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3252,7 +3263,7 @@ else ac_cv_c_stack_direction=0 else cat > conftest.$ac_ext <<EOF -#line 3256 "configure" +#line 3267 "configure" #include "confdefs.h" find_stack_direction () { @@ -3271,7 +3282,7 @@ main () exit (find_stack_direction() < 0); } EOF -if { (eval echo configure:3275: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3286: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_c_stack_direction=1 else @@ -3292,21 +3303,21 @@ EOF fi -for ac_hdr in stdlib.h unistd.h sys/stat.h sys/types.h +for ac_hdr in unistd.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3300: checking for $ac_hdr" >&5 +echo "configure:3311: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3305 "configure" +#line 3316 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3310: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3321: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3335,12 +3346,12 @@ done for ac_func in getpagesize do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3339: checking for $ac_func" >&5 +echo "configure:3350: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3344 "configure" +#line 3355 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3363,7 +3374,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3367: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3378: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3388,7 +3399,7 @@ fi done echo $ac_n "checking for working mmap""... $ac_c" 1>&6 -echo "configure:3392: checking for working mmap" >&5 +echo "configure:3403: checking for working mmap" >&5 if eval "test \"`echo '$''{'ac_cv_func_mmap_fixed_mapped'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3396,7 +3407,7 @@ else ac_cv_func_mmap_fixed_mapped=no else cat > conftest.$ac_ext <<EOF -#line 3400 "configure" +#line 3411 "configure" #include "confdefs.h" /* Thanks to Mike Haertel and Jim Avera for this test. @@ -3424,24 +3435,11 @@ else #include <fcntl.h> #include <sys/mman.h> -#if HAVE_SYS_TYPES_H -# include <sys/types.h> -#endif - -#if HAVE_STDLIB_H -# include <stdlib.h> -#endif - -#if HAVE_SYS_STAT_H -# include <sys/stat.h> -#endif - -#if HAVE_UNISTD_H -# include <unistd.h> -#endif - /* This mess was copied from the GNU getpagesize.h. */ #ifndef HAVE_GETPAGESIZE +# ifdef HAVE_UNISTD_H +# include <unistd.h> +# endif /* Assume that all systems that can run configure have sys/param.h. */ # ifndef HAVE_SYS_PARAM_H @@ -3549,7 +3547,7 @@ main() } EOF -if { (eval echo configure:3553: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null +if { (eval echo configure:3551: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext} && (./conftest; exit) 2>/dev/null then ac_cv_func_mmap_fixed_mapped=yes else @@ -3577,17 +3575,17 @@ unistd.h values.h sys/param.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:3581: checking for $ac_hdr" >&5 +echo "configure:3579: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3586 "configure" +#line 3584 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3591: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3589: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3617,12 +3615,12 @@ done __argz_count __argz_stringify __argz_next do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3621: checking for $ac_func" >&5 +echo "configure:3619: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3626 "configure" +#line 3624 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3645,7 +3643,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3649: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3647: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3674,12 +3672,12 @@ done for ac_func in stpcpy do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3678: checking for $ac_func" >&5 +echo "configure:3676: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3683 "configure" +#line 3681 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -3702,7 +3700,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:3706: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3704: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -3736,19 +3734,19 @@ EOF if test $ac_cv_header_locale_h = yes; then echo $ac_n "checking for LC_MESSAGES""... $ac_c" 1>&6 -echo "configure:3740: checking for LC_MESSAGES" >&5 +echo "configure:3738: checking for LC_MESSAGES" >&5 if eval "test \"`echo '$''{'am_cv_val_LC_MESSAGES'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3745 "configure" +#line 3743 "configure" #include "confdefs.h" #include <locale.h> int main() { return LC_MESSAGES ; return 0; } EOF -if { (eval echo configure:3752: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3750: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* am_cv_val_LC_MESSAGES=yes else @@ -3769,7 +3767,7 @@ EOF fi fi echo $ac_n "checking whether NLS is requested""... $ac_c" 1>&6 -echo "configure:3773: checking whether NLS is requested" >&5 +echo "configure:3771: checking whether NLS is requested" >&5 # Check whether --enable-nls or --disable-nls was given. if test "${enable_nls+set}" = set; then enableval="$enable_nls" @@ -3789,7 +3787,7 @@ fi EOF echo $ac_n "checking whether included gettext is requested""... $ac_c" 1>&6 -echo "configure:3793: checking whether included gettext is requested" >&5 +echo "configure:3791: checking whether included gettext is requested" >&5 # Check whether --with-included-gettext or --without-included-gettext was given. if test "${with_included_gettext+set}" = set; then withval="$with_included_gettext" @@ -3808,17 +3806,17 @@ fi ac_safe=`echo "libintl.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for libintl.h""... $ac_c" 1>&6 -echo "configure:3812: checking for libintl.h" >&5 +echo "configure:3810: checking for libintl.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3817 "configure" +#line 3815 "configure" #include "confdefs.h" #include <libintl.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:3822: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:3820: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -3835,19 +3833,19 @@ fi if eval "test \"`echo '$ac_cv_header_'$ac_safe`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libc""... $ac_c" 1>&6 -echo "configure:3839: checking for gettext in libc" >&5 +echo "configure:3837: checking for gettext in libc" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libc'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3844 "configure" +#line 3842 "configure" #include "confdefs.h" #include <libintl.h> int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:3851: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3849: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libc=yes else @@ -3863,7 +3861,7 @@ echo "$ac_t""$gt_cv_func_gettext_libc" 1>&6 if test "$gt_cv_func_gettext_libc" != "yes"; then echo $ac_n "checking for bindtextdomain in -lintl""... $ac_c" 1>&6 -echo "configure:3867: checking for bindtextdomain in -lintl" >&5 +echo "configure:3865: checking for bindtextdomain in -lintl" >&5 ac_lib_var=`echo intl'_'bindtextdomain | sed 'y%./+-%__p_%'` if eval "test \"`echo '$''{'ac_cv_lib_$ac_lib_var'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -3871,7 +3869,7 @@ else ac_save_LIBS="$LIBS" LIBS="-lintl $LIBS" cat > conftest.$ac_ext <<EOF -#line 3875 "configure" +#line 3873 "configure" #include "confdefs.h" /* Override any gcc2 internal prototype to avoid an error. */ /* We use char because int might match the return type of a gcc2 @@ -3882,7 +3880,7 @@ int main() { bindtextdomain() ; return 0; } EOF -if { (eval echo configure:3886: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3884: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_lib_$ac_lib_var=yes" else @@ -3898,19 +3896,19 @@ fi if eval "test \"`echo '$ac_cv_lib_'$ac_lib_var`\" = yes"; then echo "$ac_t""yes" 1>&6 echo $ac_n "checking for gettext in libintl""... $ac_c" 1>&6 -echo "configure:3902: checking for gettext in libintl" >&5 +echo "configure:3900: checking for gettext in libintl" >&5 if eval "test \"`echo '$''{'gt_cv_func_gettext_libintl'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3907 "configure" +#line 3905 "configure" #include "confdefs.h" int main() { return (int) gettext ("") ; return 0; } EOF -if { (eval echo configure:3914: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:3912: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* gt_cv_func_gettext_libintl=yes else @@ -3938,7 +3936,7 @@ EOF # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:3942: checking for $ac_word" >&5 +echo "configure:3940: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -3972,12 +3970,12 @@ fi for ac_func in dcgettext do echo $ac_n "checking for $ac_func""... $ac_c" 1>&6 -echo "configure:3976: checking for $ac_func" >&5 +echo "configure:3974: checking for $ac_func" >&5 if eval "test \"`echo '$''{'ac_cv_func_$ac_func'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 3981 "configure" +#line 3979 "configure" #include "confdefs.h" /* System header to define __stub macros and hopefully few prototypes, which can conflict with char $ac_func(); below. */ @@ -4000,7 +3998,7 @@ $ac_func(); ; return 0; } EOF -if { (eval echo configure:4004: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4002: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* eval "ac_cv_func_$ac_func=yes" else @@ -4027,7 +4025,7 @@ done # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4031: checking for $ac_word" >&5 +echo "configure:4029: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4063,7 +4061,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4067: checking for $ac_word" >&5 +echo "configure:4065: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4095,7 +4093,7 @@ else fi cat > conftest.$ac_ext <<EOF -#line 4099 "configure" +#line 4097 "configure" #include "confdefs.h" int main() { @@ -4103,7 +4101,7 @@ extern int _nl_msg_cat_cntr; return _nl_msg_cat_cntr ; return 0; } EOF -if { (eval echo configure:4107: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then +if { (eval echo configure:4105: \"$ac_link\") 1>&5; (eval $ac_link) 2>&5; } && test -s conftest${ac_exeext}; then rm -rf conftest* CATOBJEXT=.gmo DATADIRNAME=share @@ -4135,7 +4133,7 @@ fi # Extract the first word of "msgfmt", so it can be a program name with args. set dummy msgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4139: checking for $ac_word" >&5 +echo "configure:4137: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_MSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4169,7 +4167,7 @@ fi # Extract the first word of "gmsgfmt", so it can be a program name with args. set dummy gmsgfmt; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4173: checking for $ac_word" >&5 +echo "configure:4171: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_GMSGFMT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4205,7 +4203,7 @@ fi # Extract the first word of "xgettext", so it can be a program name with args. set dummy xgettext; ac_word=$2 echo $ac_n "checking for $ac_word""... $ac_c" 1>&6 -echo "configure:4209: checking for $ac_word" >&5 +echo "configure:4207: checking for $ac_word" >&5 if eval "test \"`echo '$''{'ac_cv_path_XGETTEXT'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4295,7 +4293,7 @@ fi LINGUAS= else echo $ac_n "checking for catalogs to be installed""... $ac_c" 1>&6 -echo "configure:4299: checking for catalogs to be installed" >&5 +echo "configure:4297: checking for catalogs to be installed" >&5 NEW_LINGUAS= for lang in ${LINGUAS=$ALL_LINGUAS}; do case "$ALL_LINGUAS" in @@ -4323,17 +4321,17 @@ echo "configure:4299: checking for catalogs to be installed" >&5 if test "$CATOBJEXT" = ".cat"; then ac_safe=`echo "linux/version.h" | sed 'y%./+-%__p_%'` echo $ac_n "checking for linux/version.h""... $ac_c" 1>&6 -echo "configure:4327: checking for linux/version.h" >&5 +echo "configure:4325: checking for linux/version.h" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4332 "configure" +#line 4330 "configure" #include "confdefs.h" #include <linux/version.h> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4337: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4335: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4411,7 +4409,7 @@ if test "x$cross_compiling" = "xno"; then EXEEXT_FOR_BUILD='$(EXEEXT)' else echo $ac_n "checking for build system executable suffix""... $ac_c" 1>&6 -echo "configure:4415: checking for build system executable suffix" >&5 +echo "configure:4413: checking for build system executable suffix" >&5 if eval "test \"`echo '$''{'bfd_cv_build_exeext'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else @@ -4448,7 +4446,7 @@ fi # SVR4 /usr/ucb/install, which tries to use the nonexistent group "staff" # ./install, which can be erroneously created by make from ./install.sh. echo $ac_n "checking for a BSD compatible install""... $ac_c" 1>&6 -echo "configure:4452: checking for a BSD compatible install" >&5 +echo "configure:4450: checking for a BSD compatible install" >&5 if test -z "$INSTALL"; then if eval "test \"`echo '$''{'ac_cv_path_install'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 @@ -4505,17 +4503,17 @@ for ac_hdr in string.h strings.h stdlib.h do ac_safe=`echo "$ac_hdr" | sed 'y%./+-%__p_%'` echo $ac_n "checking for $ac_hdr""... $ac_c" 1>&6 -echo "configure:4509: checking for $ac_hdr" >&5 +echo "configure:4507: checking for $ac_hdr" >&5 if eval "test \"`echo '$''{'ac_cv_header_$ac_safe'+set}'`\" = set"; then echo $ac_n "(cached) $ac_c" 1>&6 else cat > conftest.$ac_ext <<EOF -#line 4514 "configure" +#line 4512 "configure" #include "confdefs.h" #include <$ac_hdr> EOF ac_try="$ac_cpp conftest.$ac_ext >/dev/null 2>conftest.out" -{ (eval echo configure:4519: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } +{ (eval echo configure:4517: \"$ac_try\") 1>&5; (eval $ac_try) 2>&5; } ac_err=`grep -v '^ *+' conftest.out | grep -v "^conftest.${ac_ext}\$"` if test -z "$ac_err"; then rm -rf conftest* @@ -4639,6 +4637,7 @@ if test x${all_targets} = xfalse ; then bfd_avr_arch) ta="$ta avr-dis.lo" ;; bfd_convex_arch) ;; bfd_cris_arch) ta="$ta cris-dis.lo cris-opc.lo" ;; + bfd_crx_arch) ta="$ta crx-dis.lo crx-opc.lo" ;; bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;; bfd_d30v_arch) ta="$ta d30v-dis.lo d30v-opc.lo" ;; bfd_dlx_arch) ta="$ta dlx-dis.lo" ;; diff --git a/opcodes/configure.in b/opcodes/configure.in index 8919924..677ead2 100644 --- a/opcodes/configure.in +++ b/opcodes/configure.in @@ -177,6 +177,7 @@ if test x${all_targets} = xfalse ; then bfd_avr_arch) ta="$ta avr-dis.lo" ;; bfd_convex_arch) ;; bfd_cris_arch) ta="$ta cris-dis.lo cris-opc.lo" ;; + bfd_crx_arch) ta="$ta crx-dis.lo crx-opc.lo" ;; bfd_d10v_arch) ta="$ta d10v-dis.lo d10v-opc.lo" ;; bfd_d30v_arch) ta="$ta d30v-dis.lo d30v-opc.lo" ;; bfd_dlx_arch) ta="$ta dlx-dis.lo" ;; diff --git a/opcodes/crx-dis.c b/opcodes/crx-dis.c new file mode 100644 index 0000000..5796a2e --- /dev/null +++ b/opcodes/crx-dis.c @@ -0,0 +1,700 @@ +/* Disassembler code for CRX. + Copyright 2004 Free Software Foundation, Inc. + Contributed by Tomer Levi, NSC, Israel. + Written by Tomer Levi. + + This file is part of the GNU binutils and GDB, the GNU debugger. + + This program is free software; you can redistribute it and/or modify it under + the terms of the GNU General Public License as published by the Free + Software Foundation; either version 2, or (at your option) + any later version. + + This program is distributed in the hope that it will be useful, but WITHOUT + ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or + FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for + more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include "dis-asm.h" +#include "sysdep.h" +#include "opcode/crx.h" + +/* String to print when opcode was not matched. */ +#define ILLEGAL "illegal" + /* Escape to 16-bit immediate. */ +#define ESCAPE_16_BIT 0xE + +/* Extract 'n_bits' from 'a' starting from offset 'offs'. */ +#define EXTRACT(a, offs, n_bits) \ + (n_bits == 32 ? (((a) >> (offs)) & ~0L) \ + : (((a) >> (offs)) & ((1 << (n_bits)) -1))) + +/* Set Bit Mask - a mask to set all bits starting from offset 'offs'. */ +#define SBM(offs) ((((1 << (32 - offs)) -1) << (offs))) + +typedef unsigned long dwordU; +typedef unsigned short wordU; + +typedef struct +{ + dwordU val; + int nbits; +} parameter; + +/* Structure to hold valid 'cinv' instruction options. */ + +typedef struct + { + /* Cinv printed string. */ + char *str; + /* Value corresponding to the string. */ + unsigned int value; + } +cinv_entry; + +/* CRX 'cinv' options. */ +const cinv_entry crx_cinvs[] = +{ + {"[i]", 2}, {"[i,u]", 3}, {"[d]", 4}, + {"[d,u]", 5}, {"[d,i]", 6}, {"[d,i,u]", 7} +}; + +/* Number of valid 'cinv' instruction options. */ +int NUMCINVS = ((sizeof crx_cinvs)/(sizeof crx_cinvs[0])); +/* Current opcode table entry we're disassembling. */ +const inst *instruction; +/* Current instruction we're disassembling. */ +ins currInsn; +/* The current instruction is read into 3 consecutive words. */ +wordU words[3]; +/* Contains all words in appropriate order. */ +ULONGLONG allWords; +/* Holds the current processed argument number. */ +int processing_argument_number; +/* Nonzero means a CST4 instruction. */ +int cst4flag; +/* Nonzero means the instruction's original size is + incremented (escape sequence is used). */ +int size_changed; + +static int get_number_of_operands (void); +static argtype getargtype (operand_type); +static int getbits (operand_type); +static char *getregname (reg); +static char *getcopregname (copreg, reg_type); +static char * getprocregname (int); +static char *gettrapstring (unsigned); +static char *getcinvstring (unsigned); +static void getregliststring (int, char *, int); +static wordU get_word_at_PC (bfd_vma, struct disassemble_info *); +static void get_words_at_PC (bfd_vma, struct disassemble_info *); +static unsigned long build_mask (void); +static int powerof2 (int); +static int match_opcode (void); +static void make_instruction (void); +static void print_arguments (ins *, struct disassemble_info *); +static void print_arg (argument *, struct disassemble_info *); + +/* Retrieve the number of operands for the current assembled instruction. */ + +static int +get_number_of_operands (void) +{ + int i; + + for (i = 0; instruction->operands[i].op_type && i < MAX_OPERANDS; i++) + ; + + return i; +} + +/* Return the bit size for a given operand. */ + +static int +getbits (operand_type op) +{ + if (op < MAX_OPRD) + return crx_optab[op].bit_size; + else + return 0; +} + +/* Return the argument type of a given operand. */ + +static argtype +getargtype (operand_type op) +{ + if (op < MAX_OPRD) + return crx_optab[op].arg_type; + else + return nullargs; +} + +/* Given the trap index in dispatch table, return its name. + This routine is used when disassembling the 'excp' instruction. */ + +static char * +gettrapstring (unsigned int index) +{ + const trap_entry *trap; + + for (trap = crx_traps; trap < crx_traps + NUMTRAPS; trap++) + if (trap->entry == index) + return trap->name; + + return ILLEGAL; +} + +/* Given a 'cinv' instruction constant operand, return its corresponding string. + This routine is used when disassembling the 'cinv' instruction. */ + +static char * +getcinvstring (unsigned int num) +{ + const cinv_entry *cinv; + + for (cinv = crx_cinvs; cinv < (crx_cinvs + NUMCINVS); cinv++) + if (cinv->value == num) + return cinv->str; + + return ILLEGAL; +} + +/* Given a register enum value, retrieve its name. */ + +char * +getregname (reg r) +{ + const reg_entry *reg = &crx_regtab[r]; + + if (reg->type != CRX_R_REGTYPE) + return ILLEGAL; + else + return reg->name; +} + +/* Given a coprocessor register enum value, retrieve its name. */ + +char * +getcopregname (copreg r, reg_type type) +{ + const reg_entry *reg; + + if (type == CRX_C_REGTYPE) + reg = &crx_copregtab[r]; + else if (type == CRX_CS_REGTYPE) + reg = &crx_copregtab[r+(cs0-c0)]; + else + return ILLEGAL; + + return reg->name; +} + + +/* Getting a processor register name. */ + +static char * +getprocregname (int index) +{ + const reg_entry *r; + + for (r = crx_regtab; r < crx_regtab + NUMREGS; r++) + if (r->image == index) + return r->name; + + return "ILLEGAL REGISTER"; +} + +/* Get the power of two for a given integer. */ + +static int +powerof2 (int x) +{ + int product, i; + + for (i = 0, product = 1; i < x; i++) + product *= 2; + + return product; +} + +/* Transform a register bit mask to a register list. */ + +void +getregliststring (int trap, char *string, int core_cop) +{ + char temp_string[5]; + int i; + + string[0] = '{'; + string[1] = '\0'; + + for (i = 0; i < 16; i++) + { + if (trap & 0x1) + { + if (core_cop) + sprintf (temp_string, "r%d", i); + else + sprintf (temp_string, "c%d", i); + strcat (string, temp_string); + if (trap & 0xfffe) + strcat (string, ","); + } + trap = trap >> 1; + } + + strcat (string, "}"); +} + +/* START and END are relating 'allWords' struct, which is 48 bits size. + + START|--------|END + +---------+---------+---------+---------+ + | | V | A | L | + +---------+---------+---------+---------+ + 0 16 32 48 + words [0] [1] [2] */ + +static parameter +makelongparameter (ULONGLONG val, int start, int end) +{ + parameter p; + + p.val = (dwordU) EXTRACT(val, 48 - end, end - start); + p.nbits = end - start; + return p; +} + +/* Build a mask of the instruction's 'constant' opcode, + based on the instruction's printing flags. */ + +static unsigned long +build_mask (void) +{ + unsigned int print_flags; + unsigned long mask; + + print_flags = instruction->flags & FMT_CRX; + switch (print_flags) + { + case FMT_1: + mask = 0xF0F00000; + break; + case FMT_2: + mask = 0xFFF0FF00; + break; + case FMT_3: + mask = 0xFFF00F00; + break; + case FMT_4: + mask = 0xFFF0F000; + break; + case FMT_5: + mask = 0xFFF0FFF0; + break; + default: + mask = SBM(instruction->match_bits); + break; + } + + return mask; +} + +/* Search for a matching opcode. Return 1 for success, 0 for failure. */ + +static int +match_opcode (void) +{ + unsigned long mask; + + /* The instruction 'constant' opcode doewsn't exceed 32 bits. */ + unsigned long doubleWord = words[1] + (words[0] << 16); + + /* Start searching from end of instruction table. */ + instruction = &crx_instruction[NUMOPCODES - 2]; + + /* Loop over instruction table until a full match is found. */ + while (instruction >= crx_instruction) + { + mask = build_mask (); + if ((doubleWord & mask) == BIN(instruction->match, instruction->match_bits)) + return 1; + else + instruction--; + } + return 0; +} + +/* Set the proper parameter value for different type of arguments. */ + +static void +make_argument (argument * a, int start_bits) +{ + int inst_bit_size, total_size; + parameter p; + + if ((instruction->size == 3) && a->size >= 16) + inst_bit_size = 48; + else + inst_bit_size = 32; + + switch (a->type) + { + case arg_copr: + case arg_copsr: + p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), + inst_bit_size - start_bits); + a->cr = p.val; + break; + + case arg_r: + p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), + inst_bit_size - start_bits); + a->r = p.val; + break; + + case arg_ic: + p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), + inst_bit_size - start_bits); + + if ((p.nbits == 4) && cst4flag) + { + if (IS_INSN_TYPE (CMPBR_INS) && (p.val == ESCAPE_16_BIT)) + { + /* A special case, where the value is actually stored + in the last 4 bits. */ + p = makelongparameter (allWords, 44, 48); + /* The size of the instruction should be incremented. */ + size_changed = 1; + } + + if (p.val == 6) + p.val = -1; + else if (p.val == 13) + p.val = 48; + else if (p.val == 5) + p.val = -4; + else if (p.val == 10) + p.val = 32; + else if (p.val == 11) + p.val = 20; + else if (p.val == 9) + p.val = 16; + } + + a->constant = p.val; + break; + + case arg_icr: + a->scale = 0; + total_size = a->size + 10; /* sizeof(rbase + ridx + scl2) = 10. */ + p = makelongparameter (allWords, inst_bit_size - total_size, + inst_bit_size - (total_size - 4)); + a->r = p.val; + p = makelongparameter (allWords, inst_bit_size - (total_size - 4), + inst_bit_size - (total_size - 8)); + a->i_r = p.val; + p = makelongparameter (allWords, inst_bit_size - (total_size - 8), + inst_bit_size - (total_size - 10)); + a->scale = p.val; + p = makelongparameter (allWords, inst_bit_size - (total_size - 10), + inst_bit_size); + a->constant = p.val; + break; + + case arg_rbase: + p = makelongparameter (allWords, inst_bit_size - (start_bits + 4), + inst_bit_size - start_bits); + a->r = p.val; + break; + + case arg_cr: + if (a->size <= 8) + { + p = makelongparameter (allWords, inst_bit_size - (start_bits + 4), + inst_bit_size - start_bits); + a->r = p.val; + /* Case for opc4 r dispu rbase. */ + p = makelongparameter (allWords, inst_bit_size - (start_bits + 8), + inst_bit_size - (start_bits + 4)); + } + else + { + /* The 'rbase' start_bits is always relative to a 32-bit data type. */ + p = makelongparameter (allWords, 32 - (start_bits + 4), + 32 - start_bits); + a->r = p.val; + p = makelongparameter (allWords, 32 - start_bits, + inst_bit_size); + } + if ((p.nbits == 4) && cst4flag) + { + if (instruction->flags & DISPUW4) + p.val *= 2; + else if (instruction->flags & DISPUD4) + p.val *= 4; + } + a->constant = p.val; + break; + + case arg_c: + p = makelongparameter (allWords, inst_bit_size - (start_bits + a->size), + inst_bit_size - start_bits); + a->constant = p.val; + break; + default: + break; + } +} + +/* Print a single argument. */ + +static void +print_arg (argument *a, struct disassemble_info *info) +{ + LONGLONG longdisp, mask; + char sign_flag; + int op_index = 0; + char string[200]; + PTR stream = info->stream; + fprintf_ftype func = info->fprintf_func; + + switch (a->type) + { + case arg_copr: + func (stream, "%s", getcopregname (a->cr, CRX_C_REGTYPE)); + break; + + case arg_copsr: + func (stream, "%s", getcopregname (a->cr, CRX_CS_REGTYPE)); + break; + + case arg_r: + if (IS_INSN_MNEMONIC ("mtpr") || IS_INSN_MNEMONIC ("mfpr")) + func (stream, "%s", getprocregname (a->r)); + else + func (stream, "%s", getregname (a->r)); + break; + + case arg_ic: + if (IS_INSN_MNEMONIC ("excp")) + func (stream, "%s", gettrapstring (a->constant)); + + else if (IS_INSN_MNEMONIC ("cinv")) + func (stream, "%s", getcinvstring (a->constant)); + + else if (INST_HAS_REG_LIST) + { + if (!IS_INSN_TYPE (COP_REG_INS)) + { + getregliststring (a->constant, string, 1); + func (stream, "%s", string); + } + else + { + /* Check for proper argument number. */ + if (processing_argument_number == 2) + { + getregliststring (a->constant, string, 0); + func (stream, "%s", string); + } + else + func (stream, "$0x%x", a->constant); + } + } + else + func (stream, "$0x%x", a->constant); + break; + + case arg_icr: + func (stream, "0x%x(%s,%s,%d)", a->constant, getregname (a->r), + getregname (a->i_r), powerof2 (a->scale)); + break; + + case arg_rbase: + func (stream, "(%s)", getregname (a->r)); + break; + + case arg_cr: + func (stream, "0x%x(%s)", a->constant, getregname (a->r)); + + if (IS_INSN_TYPE (LD_STOR_INS_INC)) + func (stream, "+"); + break; + + case arg_c: + /* Removed the *2 part as because implicit zeros are no more required. + Have to fix this as this needs a bit of extension in terms of branchins. + Have to add support for cmp and branch instructions. */ + if (IS_INSN_TYPE (BRANCH_INS) || IS_INSN_MNEMONIC ("bal") + || IS_INSN_TYPE (CMPBR_INS) || IS_INSN_TYPE (DCR_BRANCH_INS) + || IS_INSN_TYPE (COP_BRANCH_INS)) + { + func (stream, "%c", '*'); + longdisp = a->constant; + longdisp <<= 1; + sign_flag = '+'; + + switch (a->size) + { + case 8: + case 16: + case 24: + case 32: + mask = ((LONGLONG)1 << a->size) - 1; + if (longdisp & ((LONGLONG)1 << a->size)) + { + sign_flag = '-'; + longdisp = ~(longdisp) + 1; + } + a->constant = (unsigned long int) (longdisp & mask); + break; + default: + func (stream, + "Wrong offset used in branch/bal instruction"); + break; + } + + func (stream, "%c", sign_flag); + } + /* For branch Neq instruction it is 2*offset + 2. */ + if (IS_INSN_TYPE (BRANCH_NEQ_INS)) + a->constant = 2 * a->constant + 2; + if (IS_INSN_TYPE (LD_STOR_INS_INC) + || IS_INSN_TYPE (LD_STOR_INS) + || IS_INSN_TYPE (STOR_IMM_INS) + || IS_INSN_TYPE (CSTBIT_INS)) + { + op_index = instruction->flags & REVERSE_MATCH ? 0 : 1; + if (instruction->operands[op_index].op_type == abs16) + a->constant |= 0xFFFF0000; + } + func (stream, "0x%x", a->constant); + break; + default: + break; + } +} + +/* Print all the arguments of CURRINSN instruction. */ + +static void +print_arguments (ins *currInsn, struct disassemble_info *info) +{ + int i; + + for (i = 0; i < currInsn->nargs; i++) + { + processing_argument_number = i; + + print_arg (&currInsn->arg[i], info); + + if (i != currInsn->nargs - 1) + info->fprintf_func (info->stream, ", "); + } +} + +/* Build the instruction's arguments. */ + +static void +make_instruction (void) +{ + int i; + unsigned int temp_value, shift; + argument a; + + for (i = 0; i < currInsn.nargs; i++) + { + a.type = getargtype (instruction->operands[i].op_type); + if (instruction->operands[i].op_type == cst4 + || instruction->operands[i].op_type == rbase_cst4) + cst4flag = 1; + a.size = getbits (instruction->operands[i].op_type); + shift = instruction->operands[i].shift; + + make_argument (&a, shift); + currInsn.arg[i] = a; + } + + /* Calculate instruction size (in bytes). */ + currInsn.size = instruction->size + (size_changed ? 1 : 0); + currInsn.size *= 2; + + /* Swapping first and second arguments. */ + if (IS_INSN_TYPE (COP_BRANCH_INS)) + { + temp_value = currInsn.arg[0].constant; + currInsn.arg[0].constant = currInsn.arg[1].constant; + currInsn.arg[1].constant = temp_value; + } +} + +/* Retrieve a single word from a given memory address. */ + +static wordU +get_word_at_PC (bfd_vma memaddr, struct disassemble_info *info) +{ + bfd_byte buffer[4]; + int status; + wordU insn = 0; + + status = info->read_memory_func (memaddr, buffer, 2, info); + + if (status == 0) + insn = (wordU) bfd_getl16 (buffer); + + return insn; +} + +/* Retrieve multiple words (3) from a given memory address. */ + +static void +get_words_at_PC (bfd_vma memaddr, struct disassemble_info *info) +{ + int i; + bfd_vma mem; + + for (i = 0, mem = memaddr; i < 3; i++, mem += 2) + words[i] = get_word_at_PC (mem, info); + + allWords = + ((ULONGLONG) words[0] << 32) + ((unsigned long) words[1] << 16) + words[2]; +} + +/* Prints the instruction by calling print_arguments after proper matching. */ + +int +print_insn_crx (memaddr, info) + bfd_vma memaddr; + struct disassemble_info *info; +{ + int is_decoded; /* Nonzero means instruction has a match. */ + + /* Initialize global variables. */ + cst4flag = 0; + size_changed = 0; + + /* Retrieve the encoding from current memory location. */ + get_words_at_PC (memaddr, info); + /* Find a matching opcode in table. */ + is_decoded = match_opcode (); + /* If found, print the instruction's mnemonic and arguments. */ + if (is_decoded > 0 && (words[0] << 16 || words[1]) != 0) + { + info->fprintf_func (info->stream, "%s", instruction->mnemonic); + if ((currInsn.nargs = get_number_of_operands ()) != 0) + info->fprintf_func (info->stream, "\t"); + make_instruction (); + print_arguments (&currInsn, info); + return currInsn.size; + } + + /* No match found. */ + info->fprintf_func (info->stream,"%s ",ILLEGAL); + return 2; +} diff --git a/opcodes/crx-opc.c b/opcodes/crx-opc.c new file mode 100644 index 0000000..da1e322 --- /dev/null +++ b/opcodes/crx-opc.c @@ -0,0 +1,674 @@ +/* crx-opc.c -- Table of opcodes for the CRX processor. + Copyright 2004 Free Software Foundation, Inc. + Contributed by Tomer Levi NSC, Israel. + Originally written for GAS 2.12 by Tomer Levi. + + This file is part of GAS, GDB and the GNU binutils. + + GAS, GDB, and GNU binutils is free software; you can redistribute it + and/or modify it under the terms of the GNU General Public License as + published by the Free Software Foundation; either version 2, or (at your + option) any later version. + + GAS, GDB, and GNU binutils are distributed in the hope that they will be + useful, but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; if not, write to the Free Software + Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ + +#include <stdio.h> +#include "libiberty.h" +#include "symcat.h" +#include "opcode/crx.h" + +const inst crx_instruction[] = +{ +/* Create an arithmetic instruction - INST[bw]. */ +#define ARITH_BYTE_INST(NAME, OPC) \ + /* opc8 cst4 r */ \ + {NAME, 1, OPC, 24, ARITH_BYTE_INS, {{cst4,20}, {regr,16}}}, \ + /* opc8 i16 r */ \ + {NAME, 2, (OPC<<4)+0xE, 20, ARITH_BYTE_INS, {{i16,0}, {regr,16}}}, \ + /* opc8 r r */ \ + {NAME, 1, OPC+0x40, 24, ARITH_BYTE_INS, {{regr,20}, {regr,16}}} + + ARITH_BYTE_INST ("addub", 0x0), + ARITH_BYTE_INST ("addb", 0x1), + ARITH_BYTE_INST ("addcb", 0x2), + ARITH_BYTE_INST ("andb", 0x3), + ARITH_BYTE_INST ("cmpb", 0x4), + ARITH_BYTE_INST ("movb", 0x5), + ARITH_BYTE_INST ("orb", 0x6), + ARITH_BYTE_INST ("subb", 0x7), + ARITH_BYTE_INST ("subcb", 0x8), + ARITH_BYTE_INST ("xorb", 0x9), + ARITH_BYTE_INST ("mulb", 0xA), + + ARITH_BYTE_INST ("adduw", 0x10), + ARITH_BYTE_INST ("addw", 0x11), + ARITH_BYTE_INST ("addcw", 0x12), + ARITH_BYTE_INST ("andw", 0x13), + ARITH_BYTE_INST ("cmpw", 0x14), + ARITH_BYTE_INST ("movw", 0x15), + ARITH_BYTE_INST ("orw", 0x16), + ARITH_BYTE_INST ("subw", 0x17), + ARITH_BYTE_INST ("subcw", 0x18), + ARITH_BYTE_INST ("xorw", 0x19), + ARITH_BYTE_INST ("mulw", 0x1A), + +/* Create an arithmetic instruction - INST[d]. */ +#define ARITH_INST(NAME, OPC) \ + /* opc8 cst4 r */ \ + {NAME, 1, OPC, 24, ARITH_INS, {{cst4,20}, {regr,16}}}, \ + /* opc8 i16 r */ \ + {NAME, 2, (OPC<<4)+0xE, 20, ARITH_INS, {{i16,0}, {regr,16}}}, \ + /* opc8 i32 r */ \ + {NAME, 3, (OPC<<4)+0xF, 20, ARITH_INS, {{i32,0}, {regr,16}}}, \ + /* opc8 r r */ \ + {NAME, 1, OPC+0x40, 24, ARITH_INS, {{regr,20}, {regr,16}}} + + ARITH_INST ("addud", 0x20), + ARITH_INST ("addd", 0x21), + ARITH_INST ("addcd", 0x22), + ARITH_INST ("andd", 0x23), + ARITH_INST ("cmpd", 0x24), + ARITH_INST ("movd", 0x25), + ARITH_INST ("ord", 0x26), + ARITH_INST ("subd", 0x27), + ARITH_INST ("subcd", 0x28), + ARITH_INST ("xord", 0x29), + ARITH_INST ("muld", 0x2A), + +/* Create a shift instruction. */ +#define SHIFT_INST(NAME, OPRD, OPC1, SHIFT1, OPC2) \ + /* OPRD=i3 -->> opc9 i3 r */ \ + /* OPRD=i4 -->> opc8 i4 r */ \ + /* OPRD=i5 -->> opc7 i5 r */ \ + {NAME, 1, OPC1, SHIFT1, SHIFT_INS, {{OPRD,20}, {regr,16}}}, \ + /* opc8 r r */ \ + {NAME, 1, OPC2, 24, SHIFT_INS, {{regr,20}, {regr,16}}} + + SHIFT_INST ("sllb", i3, 0x1F8, 23, 0x4D), + SHIFT_INST ("srlb", i3, 0x1F9, 23, 0x4E), + SHIFT_INST ("srab", i3, 0x1FA, 23, 0x4F), + + SHIFT_INST ("sllw", i4, 0xB6, 24, 0x5D), + SHIFT_INST ("srlw", i4, 0xB7, 24, 0x5E), + SHIFT_INST ("sraw", i4, 0xB8, 24, 0x5F), + + SHIFT_INST ("slld", i5, 0x78, 25, 0x6D), + SHIFT_INST ("srld", i5, 0x79, 25, 0x6E), + SHIFT_INST ("srad", i5, 0x7A, 25, 0x6F), + +/* Create a conditional branch instruction. */ +#define BRANCH_INST(NAME, OPC) \ + /* opc4 c4 dispe9 */ \ + {NAME, 1, OPC, 24, BRANCH_INS | RELAXABLE, {{d9,16}}}, \ + /* opc4 c4 disps17 */ \ + {NAME, 2, (OPC<<8)+0x7E, 16, BRANCH_INS | RELAXABLE, {{d17,0}}}, \ + /* opc4 c4 disps33 */ \ + {NAME, 3, (OPC<<8)+0x7F, 16, BRANCH_INS | RELAXABLE, {{d33,0}}} + + BRANCH_INST ("beq", 0x70), + BRANCH_INST ("bne", 0x71), + BRANCH_INST ("bcs", 0x72), + BRANCH_INST ("bcc", 0x73), + BRANCH_INST ("bhi", 0x74), + BRANCH_INST ("bls", 0x75), + BRANCH_INST ("bgt", 0x76), + BRANCH_INST ("ble", 0x77), + BRANCH_INST ("bfs", 0x78), + BRANCH_INST ("bfc", 0x79), + BRANCH_INST ("blo", 0x7A), + BRANCH_INST ("bhs", 0x7B), + BRANCH_INST ("blt", 0x7C), + BRANCH_INST ("bge", 0x7D), + BRANCH_INST ("br", 0x7E), + +/* Create a 'Branch if Equal to 0' instruction. */ +#define BRANCH_NEQ_INST(NAME, OPC) \ + /* opc8 dispu5 r */ \ + {NAME, 1, OPC, 24, BRANCH_NEQ_INS, {{regr,16}, {d5,20}}} + + BRANCH_NEQ_INST ("beq0b", 0xB0), + BRANCH_NEQ_INST ("bne0b", 0xB1), + BRANCH_NEQ_INST ("beq0w", 0xB2), + BRANCH_NEQ_INST ("bne0w", 0xB3), + BRANCH_NEQ_INST ("beq0d", 0xB4), + BRANCH_NEQ_INST ("bne0d", 0xB5), + +/* Create instruction with no operands. */ +#define NO_OP_INST(NAME, OPC) \ + /* opc16 */ \ + {NAME, 1, OPC, 16, 0, {{0, 0}}} + + NO_OP_INST ("nop", 0x3002), + NO_OP_INST ("retx", 0x3003), + NO_OP_INST ("di", 0x3004), + NO_OP_INST ("ei", 0x3005), + NO_OP_INST ("wait", 0x3006), + NO_OP_INST ("eiwait", 0x3007), + +/* Create a 'Compare & Branch' instruction. */ +#define CMPBR_INST(NAME, OPC1, OPC2, C4) \ + /* opc12 r r c4 disps9 */ \ + {NAME, 2, ((0x300+OPC1)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{regr,16}, {regr,12}, {d9,0}}}, \ + /* opc12 r r c4 disps25 */ \ + {NAME, 3, ((0x310+OPC1)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{regr,16}, {regr,12}, {d25,0}}}, \ + /* opc12 i4cst4 r c4 disps9 */ \ + {NAME, 2, ((0x300+OPC2)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{cst4,16}, {regr,12}, {d9,0}}}, \ + /* opc12 i4cst4 r c4 disps25 */ \ + {NAME, 3, ((0x310+OPC2)<<12)+C4, 8, CMPBR_INS | FMT_3 | RELAXABLE, {{cst4,16}, {regr,12}, {d25,0}}} + + CMPBR_INST ("cmpbeqb", 0x8, 0xC, 0x0), + CMPBR_INST ("cmpbneb", 0x8, 0xC, 0x1), + CMPBR_INST ("cmpbhib", 0x8, 0xC, 0x4), + CMPBR_INST ("cmpblsb", 0x8, 0xC, 0x5), + CMPBR_INST ("cmpbgtb", 0x8, 0xC, 0x6), + CMPBR_INST ("cmpbleb", 0x8, 0xC, 0x7), + CMPBR_INST ("cmpblob", 0x8, 0xC, 0xA), + CMPBR_INST ("cmpbhsb", 0x8, 0xC, 0xB), + CMPBR_INST ("cmpbltb", 0x8, 0xC, 0xC), + CMPBR_INST ("cmpbgeb", 0x8, 0xC, 0xD), + + CMPBR_INST ("cmpbeqw", 0x9, 0xD, 0x0), + CMPBR_INST ("cmpbnew", 0x9, 0xD, 0x1), + CMPBR_INST ("cmpbhiw", 0x9, 0xD, 0x4), + CMPBR_INST ("cmpblsw", 0x9, 0xD, 0x5), + CMPBR_INST ("cmpbgtw", 0x9, 0xD, 0x6), + CMPBR_INST ("cmpblew", 0x9, 0xD, 0x7), + CMPBR_INST ("cmpblow", 0x9, 0xD, 0xA), + CMPBR_INST ("cmpbhsw", 0x9, 0xD, 0xB), + CMPBR_INST ("cmpbltw", 0x9, 0xD, 0xC), + CMPBR_INST ("cmpbgew", 0x9, 0xD, 0xD), + + CMPBR_INST ("cmpbeqd", 0xA, 0xE, 0x0), + CMPBR_INST ("cmpbned", 0xA, 0xE, 0x1), + CMPBR_INST ("cmpbhid", 0xA, 0xE, 0x4), + CMPBR_INST ("cmpblsd", 0xA, 0xE, 0x5), + CMPBR_INST ("cmpbgtd", 0xA, 0xE, 0x6), + CMPBR_INST ("cmpbled", 0xA, 0xE, 0x7), + CMPBR_INST ("cmpblod", 0xA, 0xE, 0xA), + CMPBR_INST ("cmpbhsd", 0xA, 0xE, 0xB), + CMPBR_INST ("cmpbltd", 0xA, 0xE, 0xC), + CMPBR_INST ("cmpbged", 0xA, 0xE, 0xD), + +/* Create an instruction using a single register operand. */ +#define REG1_INST(NAME, OPC) \ + /* opc8 c4 r */ \ + {NAME, 1, OPC, 20, 0, {{regr,16}}} + + /* JCond instructions */ + REG1_INST ("jeq", 0xBA0), + REG1_INST ("jne", 0xBA1), + REG1_INST ("jcs", 0xBA2), + REG1_INST ("jcc", 0xBA3), + REG1_INST ("jhi", 0xBA4), + REG1_INST ("jls", 0xBA5), + REG1_INST ("jgt", 0xBA6), + REG1_INST ("jle", 0xBA7), + REG1_INST ("jfs", 0xBA8), + REG1_INST ("jfc", 0xBA9), + REG1_INST ("jlo", 0xBAA), + REG1_INST ("jhs", 0xBAB), + REG1_INST ("jlt", 0xBAC), + REG1_INST ("jge", 0xBAD), + REG1_INST ("jump", 0xBAE), + + /* SCond instructions */ + REG1_INST ("seq", 0xBB0), + REG1_INST ("sne", 0xBB1), + REG1_INST ("scs", 0xBB2), + REG1_INST ("scc", 0xBB3), + REG1_INST ("shi", 0xBB4), + REG1_INST ("sls", 0xBB5), + REG1_INST ("sgt", 0xBB6), + REG1_INST ("sle", 0xBB7), + REG1_INST ("sfs", 0xBB8), + REG1_INST ("sfc", 0xBB9), + REG1_INST ("slo", 0xBBA), + REG1_INST ("shs", 0xBBB), + REG1_INST ("slt", 0xBBC), + REG1_INST ("sge", 0xBBD), + +/* Create an instruction using two register operands. */ +#define REG2_INST(NAME, OPC) \ + /* opc24 r r OR opc20 c4 r r */ \ + {NAME, 2, 0x300800+OPC, 8, 0, {{regr,4}, {regr,0}}} + + /* MULTIPLY INSTRUCTIONS */ + REG2_INST ("macsb", 0x40), + REG2_INST ("macub", 0x41), + REG2_INST ("macqb", 0x42), + + REG2_INST ("macsw", 0x50), + REG2_INST ("macuw", 0x51), + REG2_INST ("macqw", 0x52), + + REG2_INST ("macsd", 0x60), + REG2_INST ("macud", 0x61), + REG2_INST ("macqd", 0x62), + + REG2_INST ("mullsd", 0x65), + REG2_INST ("mullud", 0x66), + + REG2_INST ("mulsbw", 0x3B), + REG2_INST ("mulubw", 0x3C), + REG2_INST ("mulswd", 0x3D), + REG2_INST ("muluwd", 0x3E), + + /* SIGNEXTEND STUFF */ + REG2_INST ("sextbw", 0x30), + REG2_INST ("sextbd", 0x31), + REG2_INST ("sextwd", 0x32), + REG2_INST ("zextbw", 0x34), + REG2_INST ("zextbd", 0x35), + REG2_INST ("zextwd", 0x36), + + REG2_INST ("bswap", 0x3F), + + REG2_INST ("maxsb", 0x80), + REG2_INST ("minsb", 0x81), + REG2_INST ("maxub", 0x82), + REG2_INST ("minub", 0x83), + REG2_INST ("absb", 0x84), + REG2_INST ("negb", 0x85), + REG2_INST ("cntl0b", 0x86), + REG2_INST ("cntl1b", 0x87), + REG2_INST ("popcntb",0x88), + REG2_INST ("rotlb", 0x89), + REG2_INST ("rotrb", 0x8A), + REG2_INST ("mulqb", 0x8B), + REG2_INST ("addqb", 0x8C), + REG2_INST ("subqb", 0x8D), + REG2_INST ("cntlsb", 0x8E), + + REG2_INST ("maxsw", 0x90), + REG2_INST ("minsw", 0x91), + REG2_INST ("maxuw", 0x92), + REG2_INST ("minuw", 0x93), + REG2_INST ("absw", 0x94), + REG2_INST ("negw", 0x95), + REG2_INST ("cntl0w", 0x96), + REG2_INST ("cntl1w", 0x97), + REG2_INST ("popcntw",0x98), + REG2_INST ("rotlw", 0x99), + REG2_INST ("rotrw", 0x9A), + REG2_INST ("mulqw", 0x9B), + REG2_INST ("addqw", 0x9C), + REG2_INST ("subqw", 0x9D), + REG2_INST ("cntlsw", 0x9E), + + REG2_INST ("maxsd", 0xA0), + REG2_INST ("minsd", 0xA1), + REG2_INST ("maxud", 0xA2), + REG2_INST ("minud", 0xA3), + REG2_INST ("absd", 0xA4), + REG2_INST ("negd", 0xA5), + REG2_INST ("cntl0d", 0xA6), + REG2_INST ("cntl1d", 0xA7), + REG2_INST ("popcntd",0xA8), + REG2_INST ("rotld", 0xA9), + REG2_INST ("rotrd", 0xAA), + REG2_INST ("mulqd", 0xAB), + REG2_INST ("addqd", 0xAC), + REG2_INST ("subqd", 0xAD), + REG2_INST ("cntlsd", 0xAE), + +/* Conditional move instructions */ + REG2_INST ("cmoveqd", 0x70), + REG2_INST ("cmovned", 0x71), + REG2_INST ("cmovcsd", 0x72), + REG2_INST ("cmovccd", 0x73), + REG2_INST ("cmovhid", 0x74), + REG2_INST ("cmovlsd", 0x75), + REG2_INST ("cmovgtd", 0x76), + REG2_INST ("cmovled", 0x77), + REG2_INST ("cmovfsd", 0x78), + REG2_INST ("cmovfcd", 0x79), + REG2_INST ("cmovlod", 0x7A), + REG2_INST ("cmovhsd", 0x7B), + REG2_INST ("cmovltd", 0x7C), + REG2_INST ("cmovged", 0x7D), + +/* Load instructions (from memory to register). */ +#define LD_REG_INST(NAME, OPC1, OPC2, DISP) \ + /* opc12 r abs16 */ \ + {NAME, 2, 0x320+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{abs16,0}, {regr,16}}}, \ + /* opc12 r abs32 */ \ + {NAME, 3, 0x330+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{abs32,0}, {regr,16}}}, \ + /* opc4 r c4 rbase */ \ + {NAME, 1, ((0x8+OPC2)<<8), 20, LD_STOR_INS | DISP | FMT_1 | REVERSE_MATCH, {{rbase,20}, {regr,24}}},\ + /* opc4 r rbase dispu[bwd]4 */ \ + {NAME, 1, 0x8+OPC2, 28, LD_STOR_INS | DISP | REVERSE_MATCH, {{rbase_cst4,16}, {regr,24}}}, \ + /* opc4 r rbase disps16 */ \ + {NAME, 2, ((0x8+OPC2)<<8)+0xE, 20, LD_STOR_INS | DISP | FMT_1 | REVERSE_MATCH, {{rbase_dispu16,16}, {regr,24}}}, \ + /* opc4 r rbase disps32 */ \ + {NAME, 3, ((0x8+OPC2)<<8)+0xF, 20, LD_STOR_INS | FMT_1 | REVERSE_MATCH, {{rbase_dispu32,16}, {regr,24}}}, \ + /* opc12 r rbase */ \ + {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC | REVERSE_MATCH, {{rbase,12}, {regr,16}}}, \ + /* opc12 r rbase disps12 */ \ + {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC | REVERSE_MATCH, {{rbase_dispu12,12}, {regr,16}}}, \ + /* opc12 r rbase ridx scl2 disps6 */ \ + {NAME, 2, 0x32C+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{rbase_ridx_scl2_dispu6,0}, {regr,16}}}, \ + /* opc12 r rbase ridx scl2 disps22 */ \ + {NAME, 3, 0x33C+OPC1, 20, LD_STOR_INS | REVERSE_MATCH, {{rbase_ridx_scl2_dispu22,0}, {regr,16}}} + + LD_REG_INST ("loadb", 0x0, 0x0, DISPUB4), + LD_REG_INST ("loadw", 0x1, 0x1, DISPUW4), + LD_REG_INST ("loadd", 0x2, 0x2, DISPUD4), + +/* Store instructions (from Register to Memory). */ +#define ST_REG_INST(NAME, OPC1, OPC2, DISP) \ + /* opc12 r abs16 */ \ + {NAME, 2, 0x320+OPC1, 20, LD_STOR_INS, {{regr,16}, {abs16,0}}}, \ + /* opc12 r abs32 */ \ + {NAME, 3, 0x330+OPC1, 20, LD_STOR_INS, {{regr,16}, {abs32,0}}}, \ + /* opc4 r c4 rbase */ \ + {NAME, 1, ((0x8+OPC2)<<8), 20, LD_STOR_INS | DISP | FMT_1, {{regr,24}, {rbase,20}}},\ + /* opc4 r rbase dispu[bwd]4 */ \ + {NAME, 1, 0x8+OPC2, 28, LD_STOR_INS | DISP, {{regr,24}, {rbase_cst4,16}}}, \ + /* opc4 r rbase disps16 */ \ + {NAME, 2, ((0x8+OPC2)<<8)+0xE, 20, LD_STOR_INS | DISP | FMT_1, {{regr,24}, {rbase_dispu16,16}}}, \ + /* opc4 r rbase disps32 */ \ + {NAME, 3, ((0x8+OPC2)<<8)+0xF, 20, LD_STOR_INS | FMT_1, {{regr,24}, {rbase_dispu32,16}}}, \ + /* opc12 r rbase */ \ + {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC, {{regr,16}, {rbase,12}}}, \ + /* opc12 r rbase disps12 */ \ + {NAME, 2, 0x328+OPC1, 20, LD_STOR_INS_INC, {{regr,16}, {rbase_dispu12,12}}}, \ + /* opc12 r rbase ridx scl2 disps6 */ \ + {NAME, 2, 0x32C+OPC1, 20, LD_STOR_INS, {{regr,16}, {rbase_ridx_scl2_dispu6,0}}}, \ + /* opc12 r rbase ridx scl2 disps22 */ \ + {NAME, 3, 0x33C+OPC1, 20, LD_STOR_INS, {{regr,16}, {rbase_ridx_scl2_dispu22,0}}} + +/* Store instructions (Immediate to Memory). */ +#define ST_I_INST(NAME, OPC) \ + /* opc12 i4 abs16 */ \ + {NAME, 2, 0x360+OPC, 20, STOR_IMM_INS, {{i4,16}, {abs16,0}}}, \ + /* opc12 i4 abs32 */ \ + {NAME, 3, 0x370+OPC, 20, STOR_IMM_INS, {{i4,16}, {abs32,0}}}, \ + /* opc12 i4 c4 rbase */ \ + {NAME, 1, 0x368+OPC, 20, LD_STOR_INS_INC, {{i4,16}, {rbase,12}}}, \ + /* opc12 i4 rbase disps12 */ \ + {NAME, 2, 0x368+OPC, 20, LD_STOR_INS_INC, {{i4,16}, {rbase_dispu12,12}}}, \ + /* opc4 i4 c4 rbase */ \ + {NAME, 1, 0x364+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase,12}}}, \ + /* opc12 i4 rbase disps12 */ \ + {NAME, 2, 0x364+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_dispu12,12}}}, \ + /* opc12 i4 rbase disps28 */ \ + {NAME, 3, 0x374+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_dispu28,12}}}, \ + /* opc12 i4 rbase ridx scl2 disps6 */ \ + {NAME, 2, 0x36C+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_ridx_scl2_dispu6,0}}},\ + /* opc12 i4 rbase ridx scl2 disps22 */ \ + {NAME, 3, 0x37C+OPC, 20, STOR_IMM_INS, {{i4,16}, {rbase_ridx_scl2_dispu22,0}}} + + ST_REG_INST ("storb", 0x20, 0x4, DISPUB4), + ST_I_INST ("storb", 0x0), + + ST_REG_INST ("storw", 0x21, 0x5, DISPUW4), + ST_I_INST ("storw", 0x1), + + ST_REG_INST ("stord", 0x22, 0x6, DISPUD4), + ST_I_INST ("stord", 0x2), + +/* Create a bit instruction. */ +#define CSTBIT_INST(NAME, OP, OPC1, DIFF, SHIFT, OPC2) \ + /* OP=i3 -->> opc13 i3 */ \ + /* OP=i4 -->> opc12 i4 */ \ + /* OP=i5 -->> opc11 i5 */ \ + \ + /* opcNN iN abs16 */ \ + {NAME, 2, OPC1+0*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {abs16,0}}}, \ + /* opcNN iN abs32 */ \ + {NAME, 3, OPC1+1*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {abs32,0}}}, \ + /* opcNN iN rbase */ \ + {NAME, 1, OPC2, SHIFT+4, CSTBIT_INS, {{OP,20}, {rbase,16}}}, \ + /* opcNN iN rbase disps12 */ \ + {NAME, 2, OPC1+2*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_dispu12,12}}}, \ + /* opcNN iN rbase disps28 */ \ + {NAME, 3, OPC1+3*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_dispu28,12}}}, \ + /* opcNN iN rbase ridx scl2 disps6 */ \ + {NAME, 2, OPC1+4*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_ridx_scl2_dispu6,0}}}, \ + /* opcNN iN rbase ridx scl2 disps22 */ \ + {NAME, 3, OPC1+5*DIFF, SHIFT, CSTBIT_INS, {{OP,16}, {rbase_ridx_scl2_dispu22,0}}} + + CSTBIT_INST ("cbitb", i3, 0x700, 0x20, 19, 0x1FC), + CSTBIT_INST ("cbitw", i4, 0x382, 0x10, 20, 0xBD), + CSTBIT_INST ("cbitd", i5, 0x1C3, 0x8, 21, 0x7B), + {"cbitd", 2, 0x300838, 8, CSTBIT_INS, {{regr,4}, {regr,0}}}, + {"cbitd", 2, 0x18047B, 9, CSTBIT_INS, {{i5,4}, {regr,0}}}, + + CSTBIT_INST ("sbitb", i3, 0x701, 0x20, 19, 0x1FD), + CSTBIT_INST ("sbitw", i4, 0x383, 0x10, 20, 0xBE), + CSTBIT_INST ("sbitd", i5, 0x1C4, 0x8, 21, 0x7C), + {"sbitd", 2, 0x300839, 8, CSTBIT_INS, {{regr,4}, {regr,0}}}, + {"sbitd", 2, 0x18047C, 9, CSTBIT_INS, {{i5,4}, {regr,0}}}, + + CSTBIT_INST ("tbitb", i3, 0x702, 0x20, 19, 0x1FE), + CSTBIT_INST ("tbitw", i4, 0x384, 0x10, 20, 0xBF), + CSTBIT_INST ("tbitd", i5, 0x1C5, 0x8, 21, 0x7D), + {"tbitd", 2, 0x30083A, 8, CSTBIT_INS, {{regr,4}, {regr,0}}}, + {"tbitd", 2, 0x18047D, 9, CSTBIT_INS, {{i5,4}, {regr,0}}}, + +/* Instructions including a register list (opcode is represented as a mask). */ +#define REGLIST_INST(NAME, OPC) \ + /* opc12 r mask16 */ \ + {NAME, 2, OPC, 20, REG_LIST, {{regr,16}, {i16,0}}} + + REG1_INST ("getrfid", 0xFF9), + REG1_INST ("setrfid", 0xFFA), + + REGLIST_INST ("push", 0x346), + REG1_INST ("push", 0xFFB), + + REGLIST_INST ("pop", 0x324), + REG1_INST ("pop", 0xFFC), + + REGLIST_INST ("popret", 0x326), + REG1_INST ("popret", 0xFFD), + + REGLIST_INST ("loadm", 0x324), + REGLIST_INST ("loadma", 0x325), + REGLIST_INST ("popma", 0x325), + + REGLIST_INST ("storm", 0x344), + REGLIST_INST ("storma", 0x345), + REGLIST_INST ("pushma", 0x345), + +/* Create a branch instruction. */ +#define BR_INST(NAME, OPC1, OPC2, INS_TYPE) \ + /* opc12 r disps17 */ \ + {NAME, 2, OPC1, 20, INS_TYPE | RELAXABLE, {{regr,16}, {d17,0}}}, \ + /* opc12 r disps33 */ \ + {NAME, 3, OPC2, 20, INS_TYPE | RELAXABLE, {{regr,16}, {d33,0}}} + + BR_INST ("bal", 0x307, 0x317, 0), + + /* Decrement and Branch instructions */ + BR_INST ("dbnzb", 0x304, 0x314, DCR_BRANCH_INS), + BR_INST ("dbnzw", 0x305, 0x315, DCR_BRANCH_INS), + BR_INST ("dbnzd", 0x306, 0x316, DCR_BRANCH_INS), + + /* Jump and link instructions */ + REG1_INST ("jal", 0xFF8), + REG2_INST ("jal", 0x37), + REG2_INST ("jalid", 0x33), + + /* opc12 c4 opc12 r mask16 */ + {"loadmcr", 3, 0x3110300, 4, COP_REG_INS | REG_LIST | FMT_5, {{i4,16}, {regr,0}, {i16,0}}}, + {"stormcr", 3, 0x3110301, 4, COP_REG_INS | REG_LIST | FMT_5, {{i4,16}, {regr,0}, {i16,0}}}, + + /* esc16 r procreg */ + {"mtpr", 2, 0x3009, 16, 0, {{regr8,8}, {regr8,0}}}, + /* esc16 procreg r */ + {"mfpr", 2, 0x300A, 16, 0, {{regr8,8}, {regr8,0}}}, + /* opc12 c4 opc8 r copreg */ + {"mtcr", 2, 0x301030, 8, COP_REG_INS | FMT_2, {{i4,16}, {regr,4}, {copregr,0}}}, + /* opc12 c4 opc8 copreg r */ + {"mfcr", 2, 0x301031, 8, COP_REG_INS | FMT_2, {{i4,16}, {copregr,4}, {regr,0}}}, + /* opc12 c4 opc8 r copsreg */ + {"mtcsr", 2, 0x301032, 8, COP_REG_INS | FMT_2, {{i4,16}, {regr,4}, {copregr,0}}}, + /* opc12 c4 opc8 copsreg r */ + {"mfcsr", 2, 0x301033, 8, COP_REG_INS | FMT_2, {{i4,16}, {copregr,4}, {regr,0}}}, + + /* CO-processor extensions */ + /* opc12 c4 opc4 i4 disps9 */ + {"bcop", 2, 0x30107, 12, COP_BRANCH_INS | FMT_4, {{i4,16}, {i4,8}, {d9,0}}}, + /* opc12 c4 opc4 i4 disps25 */ + {"bcop", 3, 0x31107, 12, COP_BRANCH_INS | FMT_4, {{i4,16}, {i4,8}, {d25,0}}}, + + /* opc12 i4 */ + {"excp", 1, 0xFFF, 20, 0, {{i4,16}}}, + /* opc28 i4 */ + {"cinv", 2, 0x3010000, 4, 0, {{i4,0}}}, + + /* opc9 i5 i5 i5 r r */ + {"ram", 2, 0x7C, 23, 0, {{i5,18}, {i5,13}, {i5,8}, {regr,4}, {regr,0}}}, + {"rim", 2, 0x7D, 23, 0, {{i5,18}, {i5,13}, {i5,8}, {regr,4}, {regr,0}}}, + + /* opc9 i3 r */ + {"rotb", 1, 0x1FB, 23, 0, {{i3,20}, {regr,16}}}, + /* opc8 i4 r */ + {"rotw", 1, 0xB9, 24, 0, {{i4,20}, {regr,16}}}, + /* opc23 i5 r */ + {"rotd", 2, 0x180478, 9, 0, {{i5,4}, {regr,0}}}, + + {NULL, 0, 0, 0, 0, {{0, 0}}} +}; + +const int crx_num_opcodes = ARRAY_SIZE (crx_instruction); + +/* Macro to build a reg_entry, which have an opcode image : + For example : + REG(u4, 0x84, CRX_U_REGTYPE) + is interpreted as : + {"u4", u4, 0x84, CRX_U_REGTYPE} */ +#define REG(NAME, N, TYPE) {STRINGX(NAME), {NAME}, N, TYPE} + +const reg_entry crx_regtab[] = +{ +/* Build a general purpose register r<N>. */ +#define REG_R(N) REG(CONCAT2(r,N), N, CRX_R_REGTYPE) + + REG_R(0), REG_R(1), REG_R(2), REG_R(3), + REG_R(4), REG_R(5), REG_R(6), REG_R(7), + REG_R(8), REG_R(9), REG_R(10), REG_R(11), + REG_R(12), REG_R(13), REG_R(14), REG_R(15), + REG(ra, 0xe, CRX_R_REGTYPE), + REG(sp, 0xf, CRX_R_REGTYPE), + +/* Build a user register ur<N>. */ +#define REG_U(N) REG(CONCAT2(u,N), 0x80 + N, CRX_U_REGTYPE) + + REG_U(0), REG_U(1), REG_U(2), REG_U(3), + REG_U(4), REG_U(5), REG_U(6), REG_U(7), + REG_U(8), REG_U(9), REG_U(10), REG_U(11), + REG_U(12), REG_U(13), REG_U(14), REG_U(15), + REG(ura, 0x8e, CRX_U_REGTYPE), + REG(usp, 0x8f, CRX_U_REGTYPE), + +/* Build a configuration register. */ +#define REG_CFG(NAME, N) REG(NAME, N, CRX_CFG_REGTYPE) + + REG_CFG(hi, 0x10), + REG_CFG(lo, 0x11), + REG_CFG(uhi, 0x90), + REG_CFG(ulo, 0x91), + REG_CFG(psr, 0x12), + REG_CFG(cfg, 0x15), + REG_CFG(cpcfg, 0x16), + REG_CFG(ccfg, 0x1b), + +/* Build a mptr register. */ +#define REG_MPTR(NAME, N) REG(NAME, N, CRX_MTPR_REGTYPE) + + REG_MPTR(intbase, 0x13), + REG_MPTR(isp, 0x14), + REG_MPTR(cen, 0x17), + +/* Build a pc register. */ +#define REG_PC(NAME, N) REG(NAME, N, CRX_PC_REGTYPE) + + REG_PC(pc, 0x0) +}; + +const int crx_num_regs = ARRAY_SIZE (crx_regtab); + +const reg_entry crx_copregtab[] = +{ +/* Build a Coprocessor register c<N>. */ +#define REG_C(N) REG(CONCAT2(c,N), N, CRX_C_REGTYPE) + + REG_C(0), REG_C(1), REG_C(2), REG_C(3), + REG_C(4), REG_C(5), REG_C(6), REG_C(7), + REG_C(8), REG_C(9), REG_C(10), REG_C(11), + REG_C(12), REG_C(13), REG_C(14), REG_C(15), + +/* Build a Coprocessor Special register c<N>. */ +#define REG_CS(N) REG(CONCAT2(cs,N), N, CRX_CS_REGTYPE) + + REG_CS(0), REG_CS(1), REG_CS(2), REG_CS(3), + REG_CS(4), REG_CS(5), REG_CS(6), REG_CS(7), + REG_CS(8), REG_CS(9), REG_CS(10), REG_CS(11), + REG_CS(12), REG_CS(13), REG_CS(14), REG_CS(15) +}; + +const int crx_num_copregs = ARRAY_SIZE (crx_copregtab); + +/* CRX operands table. */ +const operand_entry crx_optab[] = +{ + /* Index 0 is dummy, so we can count the instruction's operands. */ + {0, nullargs}, /* dummy */ + {4, arg_ic}, /* cst4 */ + {8, arg_c}, /* disps9 */ + {3, arg_ic}, /* i3 */ + {4, arg_ic}, /* i4 */ + {5, arg_ic}, /* i5 */ + {8, arg_ic}, /* i8 */ + {12, arg_ic}, /* i12 */ + {16, arg_ic}, /* i16 */ + {32, arg_ic}, /* i32 */ + {4, arg_c}, /* d5 */ + {8, arg_c}, /* d9 */ + {16, arg_c}, /* d17 */ + {24, arg_c}, /* d25 */ + {32, arg_c}, /* d33 */ + {16, arg_c}, /* abs16 */ + {32, arg_c}, /* abs32 */ + {4, arg_rbase}, /* rbase */ + {4, arg_cr}, /* rbase_cst4 */ + {8, arg_cr}, /* rbase_dispu8 */ + {12, arg_cr}, /* rbase_dispu12 */ + {16, arg_cr}, /* rbase_dispu16 */ + {28, arg_cr}, /* rbase_dispu28 */ + {32, arg_cr}, /* rbase_dispu32 */ + {6, arg_icr}, /* rbase_ridx_scl2_dispu6 */ + {22, arg_icr}, /* rbase_ridx_scl2_dispu22 */ + {4, arg_r}, /* regr */ + {8, arg_r}, /* regr8 */ + {4, arg_copr}, /* copregr */ + {8, arg_copr}, /* copregr8 */ + {4, arg_copsr} /* copsregr */ +}; + +/* CRX traps/interrupts. */ +const trap_entry crx_traps[] = +{ + {"nmi", 1}, {"svc", 5}, {"dvz", 6}, {"flg", 7}, + {"bpt", 8}, {"und", 10}, {"prv", 11}, {"iberr", 12} +}; + +const int crx_num_traps = ARRAY_SIZE (crx_traps); + +/* cst4 operand mapping. */ +const cst4_entry cst4_map[] = +{ + {0,0}, {1,1}, {2,2}, {3,3}, {4,4}, {5,-4}, {6,-1}, + {7,7}, {8,8}, {9,16}, {10,32}, {11,20}, {12,12}, {13,48} +}; + +const int cst4_maps = ARRAY_SIZE (cst4_map); diff --git a/opcodes/disassemble.c b/opcodes/disassemble.c index d5b17be..1bcd322 100644 --- a/opcodes/disassemble.c +++ b/opcodes/disassemble.c @@ -26,6 +26,7 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ #define ARCH_arm #define ARCH_avr #define ARCH_cris +#define ARCH_crx #define ARCH_d10v #define ARCH_d30v #define ARCH_dlx @@ -123,6 +124,11 @@ disassembler (abfd) disassemble = cris_get_disassembler (abfd); break; #endif +#ifdef ARCH_crx + case bfd_arch_crx: + disassemble = print_insn_crx; + break; +#endif #ifdef ARCH_d10v case bfd_arch_d10v: disassemble = print_insn_d10v; @@ -146,7 +152,8 @@ disassembler (abfd) disassemble = print_insn_h8300h; else if (bfd_get_mach (abfd) == bfd_mach_h8300s || bfd_get_mach (abfd) == bfd_mach_h8300sn - || bfd_get_mach (abfd) == bfd_mach_h8300sx) + || bfd_get_mach (abfd) == bfd_mach_h8300sx + || bfd_get_mach (abfd) == bfd_mach_h8300sxn) disassemble = print_insn_h8300s; else disassemble = print_insn_h8300; diff --git a/opcodes/h8300-dis.c b/opcodes/h8300-dis.c index 895a9ef..2587919 100644 --- a/opcodes/h8300-dis.c +++ b/opcodes/h8300-dis.c @@ -716,6 +716,17 @@ bfd_h8_disassemble (addr, info, mach) int hadone = 0; int nargs; + /* Special case handling for the adds and subs instructions + since in H8 mode thay can only take the r0-r7 registers but + in other (higher) modes they can take the er0-er7 registers + as well. */ + if (strcmp (qi->opcode->name, "adds") == 0 + || strcmp (qi->opcode->name, "subs") == 0) + { + outfn (stream, "#%d,%s", cst[0], pregnames[regno[1] & 0x7]); + return qi->length; + } + for (nargs = 0; nargs < 3 && args[nargs] != (op_type) E; nargs++) diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c index a71eb0c..0bcd107 100644 --- a/opcodes/i386-dis.c +++ b/opcodes/i386-dis.c @@ -312,7 +312,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr) #define w_mode 3 /* word operand */ #define d_mode 4 /* double word operand */ #define q_mode 5 /* quad word operand */ -#define x_mode 6 +#define x_mode 6 /* 80 bit float operand */ #define m_mode 7 /* d_mode in 32bit, q_mode in 64bit mode. */ #define cond_jump_mode 8 #define loop_jcxz_mode 9 @@ -1881,6 +1881,7 @@ prefix_name (int pref, int sizeflag) static char op1out[100], op2out[100], op3out[100]; static int op_ad, op_index[3]; +static int two_source_ops; static bfd_vma op_address[3]; static bfd_vma op_riprel[3]; static bfd_vma start_pc; @@ -1932,7 +1933,6 @@ print_insn (bfd_vma pc, disassemble_info *info) { const struct dis386 *dp; int i; - int two_source_ops; char *first, *second, *third; int needcomma; unsigned char uses_SSE_prefix; @@ -2364,7 +2364,7 @@ static const char *float_mem[] = { "fdivr{l||l|}", /* dd */ "fld{l||l|}", - "fisttpll", + "fisttp{ll||ll|}", "fst{l||l|}", "fstp{l||l|}", "frstor", @@ -2388,7 +2388,82 @@ static const char *float_mem[] = { "fbld", "fild{ll||ll|}", "fbstp", - "fistpll", + "fistp{ll||ll|}", +}; + +static const unsigned char float_mem_mode[] = { + /* d8 */ + d_mode, + d_mode, + d_mode, + d_mode, + d_mode, + d_mode, + d_mode, + d_mode, + /* d9 */ + d_mode, + 0, + d_mode, + d_mode, + 0, + w_mode, + 0, + w_mode, + /* da */ + d_mode, + d_mode, + d_mode, + d_mode, + d_mode, + d_mode, + d_mode, + d_mode, + /* db */ + d_mode, + d_mode, + d_mode, + d_mode, + 0, + x_mode, + 0, + x_mode, + /* dc */ + q_mode, + q_mode, + q_mode, + q_mode, + q_mode, + q_mode, + q_mode, + q_mode, + /* dd */ + q_mode, + q_mode, + q_mode, + q_mode, + 0, + 0, + 0, + w_mode, + /* de */ + w_mode, + w_mode, + w_mode, + w_mode, + w_mode, + w_mode, + w_mode, + w_mode, + /* df */ + w_mode, + w_mode, + w_mode, + w_mode, + x_mode, + q_mode, + x_mode, + q_mode }; #define ST OP_ST, 0 @@ -2567,14 +2642,11 @@ dofloat (int sizeflag) if (mod != 3) { - putop (float_mem[(floatop - 0xd8) * 8 + reg], sizeflag); + int fp_indx = (floatop - 0xd8) * 8 + reg; + + putop (float_mem[fp_indx], sizeflag); obufp = op1out; - if (floatop == 0xdb) - OP_E (x_mode, sizeflag); - else if (floatop == 0xdd) - OP_E (d_mode, sizeflag); - else - OP_E (v_mode, sizeflag); + OP_E (float_mem_mode[fp_indx], sizeflag); return; } /* Skip mod/rm byte. */ @@ -3135,9 +3207,15 @@ OP_E (int bytemode, int sizeflag) oappend ("WORD PTR "); break; case v_mode: - oappend ("DWORD PTR "); + if (sizeflag & DFLAG) + oappend ("DWORD PTR "); + else + oappend ("WORD PTR "); break; case d_mode: + oappend ("DWORD PTR "); + break; + case q_mode: oappend ("QWORD PTR "); break; case m_mode: @@ -3776,11 +3854,8 @@ static void ptr_reg (int code, int sizeflag) { const char *s; - if (intel_syntax) - oappend ("["); - else - oappend ("("); + *obufp++ = open_char; USED_REX (REX_MODE64); if (rex & REX_MODE64) { @@ -3794,10 +3869,8 @@ ptr_reg (int code, int sizeflag) else s = names16[code - eAX_reg]; oappend (s); - if (intel_syntax) - oappend ("]"); - else - oappend (")"); + *obufp++ = close_char; + *obufp = 0; } static void @@ -4162,21 +4235,29 @@ SIMD_Fixup (int extrachar, int sizeflag ATTRIBUTE_UNUSED) static void PNI_Fixup (int extrachar ATTRIBUTE_UNUSED, int sizeflag) { - if (mod == 3 && reg == 1) + if (mod == 3 && reg == 1 && rm <= 1) { - char *p = obuf + strlen (obuf); - /* Override "sidt". */ + char *p = obuf + strlen (obuf) - 4; + + /* We might have a suffix. */ + if (*p == 'i') + --p; + if (rm) { /* mwait %eax,%ecx */ - strcpy (p - 4, "mwait %eax,%ecx"); + strcpy (p, "mwait"); } else { /* monitor %eax,%ecx,%edx" */ - strcpy (p - 4, "monitor %eax,%ecx,%edx"); + strcpy (p, "monitor"); + strcpy (op3out, names32[2]); } + strcpy (op1out, names32[0]); + strcpy (op2out, names32[1]); + two_source_ops = 1; codep++; } diff --git a/opcodes/ia64-asmtab.c b/opcodes/ia64-asmtab.c index 2465d39..2b0af27 100644 --- a/opcodes/ia64-asmtab.c +++ b/opcodes/ia64-asmtab.c @@ -1544,36 +1544,82 @@ static const short dep235[] = { }; static const short dep236[] = { + 96, 267, 2135, 2139, 2310, 2312, 18593, 18594, 18746, 18747, 18749, 18750, + +}; + +static const short dep237[] = { + 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136, 138, + 139, 146, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2310, + 2312, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613, +}; + +static const short dep238[] = { + 40, 41, 44, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136, + 138, 139, 146, 148, 163, 174, 178, 267, 2137, 2138, 2139, 2165, 2166, 2169, + 2172, 2310, 2312, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613, +}; + +static const short dep239[] = { + 0, 96, 181, 267, 2135, 2139, 2310, 2312, 18593, 18594, 18746, 18747, 18749, + 18750, +}; + +static const short dep240[] = { + 0, 40, 41, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, 136, + 138, 139, 146, 163, 174, 178, 181, 267, 2137, 2138, 2139, 2165, 2166, 2169, + 2172, 2310, 2312, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613, +}; + +static const short dep241[] = { + 0, 40, 41, 44, 75, 76, 81, 83, 96, 108, 110, 127, 128, 130, 131, 134, 135, + 136, 138, 139, 146, 148, 163, 174, 178, 181, 267, 2137, 2138, 2139, 2165, + 2166, 2169, 2172, 2310, 2312, 4135, 16524, 16526, 18746, 18748, 18749, 18751, + 20613, +}; + +static const short dep242[] = { + 0, 96, 181, 267, 2136, 2139, 2310, 2312, 18593, 18594, 18746, 18747, 18749, + 18750, +}; + +static const short dep243[] = { 0, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136, 138, 139, 146, 163, 174, 178, 181, 267, 274, 2134, 2135, 2136, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 4135, 16524, 16526, 20613, }; -static const short dep237[] = { +static const short dep244[] = { 40, 41, 75, 96, 134, 148, 174, 267, 2165, 2166, 2169, 2172, 4135, }; -static const short dep238[] = { +static const short dep245[] = { 40, 41, 75, 96, 134, 135, 139, 148, 174, 267, 2165, 2166, 2169, 2172, 4135, }; -static const short dep239[] = { +static const short dep246[] = { 40, 41, 75, 96, 134, 148, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312, 4135, 20613, }; -static const short dep240[] = { +static const short dep247[] = { 40, 41, 75, 96, 134, 135, 139, 148, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2312, 4135, 20613, }; -static const short dep241[] = { +static const short dep248[] = { 40, 41, 96, 174, 267, 2137, 2138, 2139, 2165, 2166, 2169, 2172, 2310, 4135, 16524, 16526, 18746, 18748, 18749, 18751, 20613, }; -static const short dep242[] = { +static const short dep249[] = { + 0, 40, 41, 75, 76, 81, 83, 96, 110, 127, 128, 130, 131, 134, 135, 136, 138, + 139, 146, 163, 174, 178, 181, 267, 274, 2134, 2135, 2136, 2137, 2138, 2139, + 2165, 2166, 2169, 2172, 2312, 4135, 16524, 16526, 20613, +}; + +static const short dep250[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 24, 26, 27, 28, 29, 30, 31, 96, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 197, 198, 200, 201, 203, 204, 206, 207, 208, @@ -1581,7 +1627,7 @@ static const short dep242[] = { 2312, 28852, 29002, }; -static const short dep243[] = { +static const short dep251[] = { 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 24, 25, 26, 28, 29, 30, 31, 40, 41, 96, 134, 171, 174, 182, 183, 184, 185, 186, 187, 188, 189, 190, 191, 192, 193, 194, 195, 197, 198, 200, 201, @@ -1738,14 +1784,20 @@ op_dependencies[] = { { NELS(dep233), dep233, NELS(dep232), dep232, }, { NELS(dep234), dep234, NELS(dep232), dep232, }, { NELS(dep233), dep233, NELS(dep235), dep235, }, - { NELS(dep236), dep236, NELS(dep217), dep217, }, - { NELS(dep237), dep237, NELS(dep31), dep31, }, - { NELS(dep238), dep238, NELS(dep31), dep31, }, - { NELS(dep239), dep239, NELS(dep0), dep0, }, - { NELS(dep240), dep240, NELS(dep0), dep0, }, - { NELS(dep241), dep241, NELS(dep62), dep62, }, + { NELS(dep237), dep237, NELS(dep236), dep236, }, + { NELS(dep238), dep238, NELS(dep236), dep236, }, + { NELS(dep240), dep240, NELS(dep239), dep239, }, + { NELS(dep241), dep241, NELS(dep239), dep239, }, + { NELS(dep240), dep240, NELS(dep242), dep242, }, + { NELS(dep243), dep243, NELS(dep217), dep217, }, + { NELS(dep244), dep244, NELS(dep31), dep31, }, + { NELS(dep245), dep245, NELS(dep31), dep31, }, + { NELS(dep246), dep246, NELS(dep0), dep0, }, + { NELS(dep247), dep247, NELS(dep0), dep0, }, + { NELS(dep248), dep248, NELS(dep62), dep62, }, + { NELS(dep249), dep249, NELS(dep222), dep222, }, { 0, NULL, 0, NULL, }, - { NELS(dep243), dep243, NELS(dep242), dep242, }, + { NELS(dep251), dep251, NELS(dep250), dep250, }, }; static const struct ia64_completer_table @@ -1763,36 +1815,36 @@ completer_table[] = { { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 455, -1, 0, 1, 6 }, - { 0x0, 0x0, 0, 518, -1, 0, 1, 17 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 151 }, - { 0x0, 0x0, 0, 617, -1, 0, 1, 17 }, - { 0x0, 0x0, 0, 1836, -1, 0, 1, 10 }, + { 0x0, 0x0, 0, 454, -1, 0, 1, 6 }, + { 0x0, 0x0, 0, 517, -1, 0, 1, 17 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 157 }, + { 0x0, 0x0, 0, 616, -1, 0, 1, 17 }, + { 0x0, 0x0, 0, 1835, -1, 0, 1, 10 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 9 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 13 }, { 0x1, 0x1, 0, -1, -1, 13, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, - { 0x0, 0x0, 0, 2014, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 2013, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, - { 0x0, 0x0, 0, 958, -1, 0, 1, 122 }, + { 0x0, 0x0, 0, 957, -1, 0, 1, 122 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 44 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 40 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 78 }, - { 0x0, 0x0, 0, 1878, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 1877, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, - { 0x0, 0x0, 0, 2057, -1, 0, 1, 29 }, - { 0x0, 0x0, 0, 1882, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 2056, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 1881, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, - { 0x0, 0x0, 0, 1884, -1, 0, 1, 29 }, - { 0x0, 0x0, 0, 2066, -1, 0, 1, 29 }, - { 0x0, 0x0, 0, 2069, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 1883, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 2065, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 2068, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, @@ -1801,66 +1853,65 @@ completer_table[] = { { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, - { 0x0, 0x0, 0, 2091, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 2090, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 29 }, - { 0x0, 0x0, 0, 2094, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 2093, -1, 0, 1, 29 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 24 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 24 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 24 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 24 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 35 }, - { 0x0, 0x0, 0, 2102, -1, 0, 1, 29 }, - { 0x0, 0x0, 0, 1181, -1, 0, 1, 33 }, + { 0x0, 0x0, 0, 2101, -1, 0, 1, 29 }, + { 0x0, 0x0, 0, 1180, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 40 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 151 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 157 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 77 }, - { 0x0, 0x0, 0, 1216, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1225, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1234, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1236, -1, 0, 1, 125 }, - { 0x0, 0x0, 0, 1245, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1254, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1263, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1272, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1281, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1290, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1300, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1310, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1320, -1, 0, 1, 124 }, - { 0x0, 0x0, 0, 1329, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1335, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1341, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1347, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1353, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1359, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1365, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1371, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1377, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1383, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1389, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1395, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1401, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1407, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1413, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1419, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1425, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1431, -1, 0, 1, 140 }, - { 0x0, 0x0, 0, 1435, -1, 0, 1, 146 }, - { 0x0, 0x0, 0, 1439, -1, 0, 1, 148 }, - { 0x0, 0x0, 0, 1443, -1, 0, 1, 148 }, + { 0x0, 0x0, 0, 1215, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1224, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1233, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1235, -1, 0, 1, 125 }, + { 0x0, 0x0, 0, 1244, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1253, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1262, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1271, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1280, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1289, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1299, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1309, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1319, -1, 0, 1, 124 }, + { 0x0, 0x0, 0, 1328, -1, 0, 1, 140 }, + { 0x0, 0x0, 0, 1334, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1340, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1346, -1, 0, 1, 140 }, + { 0x0, 0x0, 0, 1352, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1358, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1364, -1, 0, 1, 140 }, + { 0x0, 0x0, 0, 1370, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1376, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1382, -1, 0, 1, 140 }, + { 0x0, 0x0, 0, 1388, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1394, -1, 0, 1, 140 }, + { 0x0, 0x0, 0, 1400, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1406, -1, 0, 1, 140 }, + { 0x0, 0x0, 0, 1412, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1418, -1, 0, 1, 140 }, + { 0x0, 0x0, 0, 1424, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1430, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1434, -1, 0, 1, 151 }, + { 0x0, 0x0, 0, 1438, -1, 0, 1, 153 }, + { 0x0, 0x0, 0, 1442, -1, 0, 1, 153 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 79 }, - { 0x0, 0x0, 0, 253, -1, 0, 1, 40 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, + { 0x0, 0x0, 0, 252, -1, 0, 1, 40 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 33 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 67 }, - { 0x1, 0x1, 0, 984, -1, 20, 1, 67 }, + { 0x1, 0x1, 0, 983, -1, 20, 1, 67 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 68 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 69 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 70 }, @@ -1887,25 +1938,25 @@ completer_table[] = { { 0x0, 0x0, 0, -1, -1, 0, 1, 111 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 112 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 113 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 152 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 152 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 158 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 158 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 158 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 71 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, -1, -1, 0, 1, 151 }, + { 0x0, 0x0, 0, -1, -1, 0, 1, 157 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, + { 0x0, 0x0, 0, 2393, -1, 0, 1, 0 }, { 0x0, 0x0, 0, 2394, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2395, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, + { 0x0, 0x0, 0, 1847, -1, 0, 1, 0 }, { 0x0, 0x0, 0, 1848, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 1849, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2409, -1, 0, 1, 0 }, + { 0x0, 0x0, 0, 2408, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, @@ -1913,13 +1964,13 @@ completer_table[] = { { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, + { 0x0, 0x0, 0, 2409, -1, 0, 1, 0 }, { 0x0, 0x0, 0, 2410, -1, 0, 1, 0 }, { 0x0, 0x0, 0, 2411, -1, 0, 1, 0 }, { 0x0, 0x0, 0, 2412, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2413, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, + { 0x0, 0x0, 0, 2395, -1, 0, 1, 0 }, { 0x0, 0x0, 0, 2396, -1, 0, 1, 0 }, - { 0x0, 0x0, 0, 2397, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 11 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 84 }, @@ -1929,26 +1980,26 @@ completer_table[] = { { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x1, 0x1, 0, -1, -1, 13, 1, 0 }, - { 0x0, 0x0, 0, 2415, -1, 0, 1, 0 }, + { 0x0, 0x0, 0, 2414, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 84 }, - { 0x0, 0x0, 0, 1711, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1713, -1, 0, 1, 138 }, - { 0x0, 0x0, 0, 1715, -1, 0, 1, 132 }, - { 0x0, 0x0, 0, 1717, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1719, -1, 0, 1, 138 }, - { 0x0, 0x0, 0, 1721, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1723, -1, 0, 1, 138 }, - { 0x0, 0x0, 0, 1726, -1, 0, 1, 131 }, - { 0x0, 0x0, 0, 1729, -1, 0, 1, 138 }, - { 0x0, 0x0, 0, 1732, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1733, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1734, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1735, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1736, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1737, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1738, -1, 0, 1, 145 }, - { 0x0, 0x0, 0, 1739, -1, 0, 1, 145 }, + { 0x0, 0x0, 0, 1710, -1, 0, 1, 131 }, + { 0x0, 0x0, 0, 1712, -1, 0, 1, 138 }, + { 0x0, 0x0, 0, 1714, -1, 0, 1, 132 }, + { 0x0, 0x0, 0, 1716, -1, 0, 1, 131 }, + { 0x0, 0x0, 0, 1718, -1, 0, 1, 138 }, + { 0x0, 0x0, 0, 1720, -1, 0, 1, 131 }, + { 0x0, 0x0, 0, 1722, -1, 0, 1, 138 }, + { 0x0, 0x0, 0, 1725, -1, 0, 1, 131 }, + { 0x0, 0x0, 0, 1728, -1, 0, 1, 138 }, + { 0x0, 0x0, 0, 1731, -1, 0, 1, 150 }, + { 0x0, 0x0, 0, 1732, -1, 0, 1, 156 }, + { 0x0, 0x0, 0, 1733, -1, 0, 1, 150 }, + { 0x0, 0x0, 0, 1734, -1, 0, 1, 156 }, + { 0x0, 0x0, 0, 1735, -1, 0, 1, 150 }, + { 0x0, 0x0, 0, 1736, -1, 0, 1, 156 }, + { 0x0, 0x0, 0, 1737, -1, 0, 1, 150 }, + { 0x0, 0x0, 0, 1738, -1, 0, 1, 156 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, @@ -1960,94 +2011,95 @@ completer_table[] = { { 0x0, 0x0, 0, -1, -1, 0, 1, 118 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 120 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 119 }, + { 0x0, 0x0, 0, 1443, -1, 0, 1, 136 }, { 0x0, 0x0, 0, 1444, -1, 0, 1, 136 }, { 0x0, 0x0, 0, 1445, -1, 0, 1, 136 }, { 0x0, 0x0, 0, 1446, -1, 0, 1, 136 }, - { 0x0, 0x0, 0, 1447, -1, 0, 1, 136 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 0, -1, -1, 0, 1, 0 }, - { 0x0, 0x0, 1, 220, -1, 0, 1, 12 }, + { 0x0, 0x0, 1, 219, -1, 0, 1, 12 }, { 0x1, 0x1, 2, -1, -1, 27, 1, 12 }, + { 0x0, 0x0, 3, -1, 1122, 0, 0, -1 }, { 0x0, 0x0, 3, -1, 1123, 0, 0, -1 }, - { 0x0, 0x0, 3, -1, 1124, 0, 0, -1 }, - { 0x1, 0x1, 3, 2285, 1209, 33, 1, 127 }, - { 0x1, 0x1, 3, 2286, 1218, 33, 1, 127 }, - { 0x1, 0x1, 3, 2287, 1227, 33, 1, 127 }, - { 0x1, 0x1, 3, 2288, 1238, 33, 1, 127 }, - { 0x1, 0x1, 3, 2289, 1247, 33, 1, 127 }, - { 0x1, 0x1, 3, 2290, 1256, 33, 1, 127 }, - { 0x1, 0x1, 3, 2291, 1265, 33, 1, 127 }, - { 0x1, 0x1, 3, 2292, 1274, 33, 1, 127 }, - { 0x1, 0x1, 3, 2293, 1283, 33, 1, 127 }, - { 0x1, 0x1, 3, 2294, 1292, 33, 1, 127 }, - { 0x1, 0x1, 3, 2295, 1302, 33, 1, 127 }, - { 0x1, 0x1, 3, 2296, 1312, 33, 1, 127 }, - { 0x1, 0x1, 3, 2297, 1325, 33, 1, 142 }, - { 0x1, 0x1, 3, 2298, 1331, 33, 1, 142 }, - { 0x1, 0x1, 3, 2299, 1337, 33, 1, 142 }, - { 0x1, 0x1, 3, 2300, 1343, 33, 1, 142 }, - { 0x1, 0x1, 3, 2301, 1349, 33, 1, 142 }, - { 0x1, 0x1, 3, 2302, 1355, 33, 1, 142 }, - { 0x1, 0x1, 3, 2303, 1361, 33, 1, 142 }, - { 0x1, 0x1, 3, 2304, 1367, 33, 1, 142 }, - { 0x1, 0x1, 3, 2305, 1373, 33, 1, 142 }, - { 0x1, 0x1, 3, 2306, 1379, 33, 1, 142 }, - { 0x1, 0x1, 3, 2307, 1385, 33, 1, 142 }, - { 0x1, 0x1, 3, 2308, 1391, 33, 1, 142 }, - { 0x1, 0x1, 3, 2309, 1397, 33, 1, 142 }, - { 0x1, 0x1, 3, 2310, 1403, 33, 1, 142 }, - { 0x1, 0x1, 3, 2311, 1409, 33, 1, 142 }, - { 0x1, 0x1, 3, 2312, 1415, 33, 1, 142 }, - { 0x1, 0x1, 3, 2313, 1421, 33, 1, 142 }, - { 0x1, 0x1, 3, 2314, 1427, 33, 1, 142 }, + { 0x1, 0x1, 3, 2284, 1208, 33, 1, 127 }, + { 0x1, 0x1, 3, 2285, 1217, 33, 1, 127 }, + { 0x1, 0x1, 3, 2286, 1226, 33, 1, 127 }, + { 0x1, 0x1, 3, 2287, 1237, 33, 1, 127 }, + { 0x1, 0x1, 3, 2288, 1246, 33, 1, 127 }, + { 0x1, 0x1, 3, 2289, 1255, 33, 1, 127 }, + { 0x1, 0x1, 3, 2290, 1264, 33, 1, 127 }, + { 0x1, 0x1, 3, 2291, 1273, 33, 1, 127 }, + { 0x1, 0x1, 3, 2292, 1282, 33, 1, 127 }, + { 0x1, 0x1, 3, 2293, 1291, 33, 1, 127 }, + { 0x1, 0x1, 3, 2294, 1301, 33, 1, 127 }, + { 0x1, 0x1, 3, 2295, 1311, 33, 1, 127 }, + { 0x1, 0x1, 3, 2296, 1324, 33, 1, 142 }, + { 0x1, 0x1, 3, 2297, 1330, 33, 1, 147 }, + { 0x1, 0x1, 3, 2298, 1336, 33, 1, 147 }, + { 0x1, 0x1, 3, 2299, 1342, 33, 1, 142 }, + { 0x1, 0x1, 3, 2300, 1348, 33, 1, 147 }, + { 0x1, 0x1, 3, 2301, 1354, 33, 1, 147 }, + { 0x1, 0x1, 3, 2302, 1360, 33, 1, 142 }, + { 0x1, 0x1, 3, 2303, 1366, 33, 1, 147 }, + { 0x1, 0x1, 3, 2304, 1372, 33, 1, 147 }, + { 0x1, 0x1, 3, 2305, 1378, 33, 1, 142 }, + { 0x1, 0x1, 3, 2306, 1384, 33, 1, 147 }, + { 0x1, 0x1, 3, 2307, 1390, 33, 1, 142 }, + { 0x1, 0x1, 3, 2308, 1396, 33, 1, 147 }, + { 0x1, 0x1, 3, 2309, 1402, 33, 1, 142 }, + { 0x1, 0x1, 3, 2310, 1408, 33, 1, 147 }, + { 0x1, 0x1, 3, 2311, 1414, 33, 1, 142 }, + { 0x1, 0x1, 3, 2312, 1420, 33, 1, 147 }, + { 0x1, 0x1, 3, 2313, 1426, 33, 1, 147 }, { 0x1, 0x1, 3, -1, -1, 27, 1, 40 }, - { 0x0, 0x0, 4, 1850, 1194, 0, 1, 135 }, - { 0x0, 0x0, 4, 1851, 1196, 0, 1, 134 }, - { 0x0, 0x0, 4, 1852, 1198, 0, 1, 134 }, - { 0x0, 0x0, 4, 1853, 1200, 0, 1, 134 }, - { 0x0, 0x0, 4, 1854, 1202, 0, 1, 134 }, - { 0x0, 0x0, 4, 1855, 1204, 0, 1, 136 }, - { 0x0, 0x0, 4, 1856, 1206, 0, 1, 136 }, - { 0x1, 0x1, 4, -1, 1213, 33, 1, 130 }, - { 0x5, 0x5, 4, 413, 1212, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1222, 33, 1, 130 }, - { 0x5, 0x5, 4, 414, 1221, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1231, 33, 1, 130 }, - { 0x5, 0x5, 4, 415, 1230, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1235, 32, 1, 125 }, - { 0x1, 0x1, 4, -1, 1242, 33, 1, 130 }, - { 0x5, 0x5, 4, 416, 1241, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1251, 33, 1, 130 }, - { 0x5, 0x5, 4, 417, 1250, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1260, 33, 1, 130 }, - { 0x5, 0x5, 4, 418, 1259, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1269, 33, 1, 130 }, - { 0x5, 0x5, 4, 419, 1268, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1278, 33, 1, 130 }, - { 0x5, 0x5, 4, 420, 1277, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1287, 33, 1, 130 }, - { 0x5, 0x5, 4, 421, 1286, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1297, 33, 1, 130 }, - { 0x5, 0x5, 4, 888, 1295, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1307, 33, 1, 130 }, - { 0x5, 0x5, 4, 889, 1305, 32, 1, 124 }, - { 0x1, 0x1, 4, -1, 1317, 33, 1, 130 }, - { 0x5, 0x5, 4, 890, 1315, 32, 1, 124 }, - { 0x1, 0x21, 10, 1748, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 1749, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, 1750, -1, 0, 1, 3 }, - { 0x1, 0x1, 10, 1751, -1, 12, 1, 3 }, - { 0x1, 0x1, 10, 1752, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 1753, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, 351, -1, 0, 1, 3 }, - { 0x1, 0x1, 10, 1779, -1, 12, 1, 3 }, - { 0x1, 0x1, 10, 355, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 1781, -1, 12, 1, 3 }, - { 0x1, 0x21, 10, 1758, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 1759, -1, 12, 1, 3 }, + { 0x0, 0x0, 4, 1849, 1193, 0, 1, 135 }, + { 0x0, 0x0, 4, 1850, 1195, 0, 1, 134 }, + { 0x0, 0x0, 4, 1851, 1197, 0, 1, 134 }, + { 0x0, 0x0, 4, 1852, 1199, 0, 1, 134 }, + { 0x0, 0x0, 4, 1853, 1201, 0, 1, 134 }, + { 0x0, 0x0, 4, 1854, 1203, 0, 1, 136 }, + { 0x0, 0x0, 4, 1855, 1205, 0, 1, 136 }, + { 0x1, 0x1, 4, -1, 1212, 33, 1, 130 }, + { 0x5, 0x5, 4, 412, 1211, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1221, 33, 1, 130 }, + { 0x5, 0x5, 4, 413, 1220, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1230, 33, 1, 130 }, + { 0x5, 0x5, 4, 414, 1229, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1234, 32, 1, 125 }, + { 0x1, 0x1, 4, -1, 1241, 33, 1, 130 }, + { 0x5, 0x5, 4, 415, 1240, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1250, 33, 1, 130 }, + { 0x5, 0x5, 4, 416, 1249, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1259, 33, 1, 130 }, + { 0x5, 0x5, 4, 417, 1258, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1268, 33, 1, 130 }, + { 0x5, 0x5, 4, 418, 1267, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1277, 33, 1, 130 }, + { 0x5, 0x5, 4, 419, 1276, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1286, 33, 1, 130 }, + { 0x5, 0x5, 4, 420, 1285, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1296, 33, 1, 130 }, + { 0x5, 0x5, 4, 887, 1294, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1306, 33, 1, 130 }, + { 0x5, 0x5, 4, 888, 1304, 32, 1, 124 }, + { 0x1, 0x1, 4, -1, 1316, 33, 1, 130 }, + { 0x5, 0x5, 4, 889, 1314, 32, 1, 124 }, + { 0x1, 0x21, 10, 1747, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 10, 1748, -1, 12, 1, 3 }, + { 0x0, 0x0, 10, 1749, -1, 0, 1, 3 }, + { 0x1, 0x1, 10, 1750, -1, 12, 1, 3 }, + { 0x1, 0x1, 10, 1751, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 10, 1752, -1, 12, 1, 3 }, + { 0x0, 0x0, 10, 350, -1, 0, 1, 3 }, + { 0x1, 0x1, 10, 1778, -1, 12, 1, 3 }, + { 0x1, 0x1, 10, 354, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 10, 1780, -1, 12, 1, 3 }, + { 0x1, 0x21, 10, 1757, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 10, 1758, -1, 12, 1, 3 }, + { 0x0, 0x0, 10, -1, 1787, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1788, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1789, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1790, 0, 0, -1 }, @@ -2059,19 +2111,19 @@ completer_table[] = { { 0x0, 0x0, 10, -1, 1796, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1797, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1798, 0, 0, -1 }, - { 0x0, 0x0, 10, -1, 1799, 0, 0, -1 }, - { 0x1, 0x21, 10, 1760, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 1761, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, 1762, -1, 0, 1, 3 }, - { 0x1, 0x1, 10, 1763, -1, 12, 1, 3 }, - { 0x1, 0x1, 10, 1764, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 1765, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, 375, -1, 0, 1, 3 }, - { 0x1, 0x1, 10, 1803, -1, 12, 1, 3 }, - { 0x1, 0x1, 10, 379, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 1805, -1, 12, 1, 3 }, - { 0x1, 0x21, 10, 1770, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 10, 1771, -1, 12, 1, 3 }, + { 0x1, 0x21, 10, 1759, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 10, 1760, -1, 12, 1, 3 }, + { 0x0, 0x0, 10, 1761, -1, 0, 1, 3 }, + { 0x1, 0x1, 10, 1762, -1, 12, 1, 3 }, + { 0x1, 0x1, 10, 1763, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 10, 1764, -1, 12, 1, 3 }, + { 0x0, 0x0, 10, 374, -1, 0, 1, 3 }, + { 0x1, 0x1, 10, 1802, -1, 12, 1, 3 }, + { 0x1, 0x1, 10, 378, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 10, 1804, -1, 12, 1, 3 }, + { 0x1, 0x21, 10, 1769, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 10, 1770, -1, 12, 1, 3 }, + { 0x0, 0x0, 10, -1, 1811, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1812, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1813, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1814, 0, 0, -1 }, @@ -2083,86 +2135,86 @@ completer_table[] = { { 0x0, 0x0, 10, -1, 1820, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1821, 0, 0, -1 }, { 0x0, 0x0, 10, -1, 1822, 0, 0, -1 }, + { 0x1, 0x1, 10, 1771, -1, 36, 1, 3 }, + { 0x1000001, 0x1000001, 10, 1772, -1, 12, 1, 3 }, { 0x0, 0x0, 10, -1, 1823, 0, 0, -1 }, - { 0x1, 0x1, 10, 1772, -1, 36, 1, 3 }, - { 0x1000001, 0x1000001, 10, 1773, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, -1, 1824, 0, 0, -1 }, - { 0x0, 0x0, 10, -1, 1826, 0, 0, -1 }, - { 0x1, 0x1, 10, 1774, -1, 36, 1, 3 }, - { 0x1000001, 0x1000001, 10, 1775, -1, 12, 1, 3 }, - { 0x0, 0x0, 10, -1, 1828, 0, 0, -1 }, - { 0x0, 0x0, 10, -1, 1830, 0, 0, -1 }, + { 0x0, 0x0, 10, -1, 1825, 0, 0, -1 }, + { 0x1, 0x1, 10, 1773, -1, 36, 1, 3 }, + { 0x1000001, 0x1000001, 10, 1774, -1, 12, 1, 3 }, + { 0x0, 0x0, 10, -1, 1827, 0, 0, -1 }, + { 0x0, 0x0, 10, -1, 1829, 0, 0, -1 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x0, 0x0, 11, 1776, -1, 0, 1, 3 }, - { 0x1, 0x1, 11, 1777, -1, 12, 1, 3 }, + { 0x0, 0x0, 11, 1775, -1, 0, 1, 3 }, + { 0x1, 0x1, 11, 1776, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x1, 0x1, 11, 1754, -1, 12, 1, 3 }, + { 0x1, 0x1, 11, 1753, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x0, 0x0, 11, 293, -1, 0, 1, 3 }, + { 0x0, 0x0, 11, 292, -1, 0, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x200001, 0x200001, 11, 1756, -1, 12, 1, 3 }, + { 0x200001, 0x200001, 11, 1755, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x1, 0x1, 11, 295, -1, 33, 1, 3 }, - { 0x0, 0x0, 11, 1782, -1, 0, 1, 3 }, - { 0x1, 0x1, 11, 1783, -1, 12, 1, 3 }, - { 0x1, 0x1, 11, 1784, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 11, 1785, -1, 12, 1, 3 }, + { 0x1, 0x1, 11, 294, -1, 33, 1, 3 }, + { 0x0, 0x0, 11, 1781, -1, 0, 1, 3 }, + { 0x1, 0x1, 11, 1782, -1, 12, 1, 3 }, + { 0x1, 0x1, 11, 1783, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 11, 1784, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x0, 0x0, 11, 1786, -1, 0, 1, 3 }, - { 0x1, 0x1, 11, 1787, -1, 12, 1, 3 }, + { 0x0, 0x0, 11, 1785, -1, 0, 1, 3 }, + { 0x1, 0x1, 11, 1786, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x0, 0x0, 11, 1800, -1, 0, 1, 3 }, - { 0x1, 0x1, 11, 1801, -1, 12, 1, 3 }, + { 0x0, 0x0, 11, 1799, -1, 0, 1, 3 }, + { 0x1, 0x1, 11, 1800, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x1, 0x1, 11, 1766, -1, 12, 1, 3 }, + { 0x1, 0x1, 11, 1765, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x0, 0x0, 11, 317, -1, 0, 1, 3 }, + { 0x0, 0x0, 11, 316, -1, 0, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x200001, 0x200001, 11, 1768, -1, 12, 1, 3 }, + { 0x200001, 0x200001, 11, 1767, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x1, 0x1, 11, 319, -1, 33, 1, 3 }, - { 0x0, 0x0, 11, 1806, -1, 0, 1, 3 }, - { 0x1, 0x1, 11, 1807, -1, 12, 1, 3 }, - { 0x1, 0x1, 11, 1808, -1, 33, 1, 3 }, - { 0x200001, 0x200001, 11, 1809, -1, 12, 1, 3 }, + { 0x1, 0x1, 11, 318, -1, 33, 1, 3 }, + { 0x0, 0x0, 11, 1805, -1, 0, 1, 3 }, + { 0x1, 0x1, 11, 1806, -1, 12, 1, 3 }, + { 0x1, 0x1, 11, 1807, -1, 33, 1, 3 }, + { 0x200001, 0x200001, 11, 1808, -1, 12, 1, 3 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, { 0x2, 0x3, 11, -1, -1, 37, 1, 5 }, - { 0x0, 0x0, 11, 1810, -1, 0, 1, 3 }, - { 0x1, 0x1, 11, 1811, -1, 12, 1, 3 }, + { 0x0, 0x0, 11, 1809, -1, 0, 1, 3 }, + { 0x1, 0x1, 11, 1810, -1, 12, 1, 3 }, { 0x1, 0x1, 11, -1, -1, 36, 1, 5 }, { 0x1, 0x1, 11, -1, -1, 36, 1, 5 }, - { 0x1, 0x1, 11, 1825, -1, 36, 1, 3 }, - { 0x1000001, 0x1000001, 11, 1827, -1, 12, 1, 3 }, + { 0x1, 0x1, 11, 1824, -1, 36, 1, 3 }, + { 0x1000001, 0x1000001, 11, 1826, -1, 12, 1, 3 }, { 0x1, 0x1, 11, -1, -1, 36, 1, 5 }, { 0x1, 0x1, 11, -1, -1, 36, 1, 5 }, - { 0x1, 0x1, 11, 1829, -1, 36, 1, 3 }, - { 0x1000001, 0x1000001, 11, 1831, -1, 12, 1, 3 }, + { 0x1, 0x1, 11, 1828, -1, 36, 1, 3 }, + { 0x1000001, 0x1000001, 11, 1830, -1, 12, 1, 3 }, { 0x0, 0x0, 12, -1, -1, 0, 1, 14 }, { 0x0, 0x0, 12, -1, -1, 0, 1, 14 }, { 0x0, 0x0, 12, -1, -1, 0, 1, 14 }, - { 0x1, 0x1, 13, 262, 1211, 34, 1, 124 }, - { 0x1, 0x1, 13, 264, 1220, 34, 1, 124 }, - { 0x1, 0x1, 13, 266, 1229, 34, 1, 124 }, - { 0x1, 0x1, 13, 269, 1240, 34, 1, 124 }, - { 0x1, 0x1, 13, 271, 1249, 34, 1, 124 }, - { 0x1, 0x1, 13, 273, 1258, 34, 1, 124 }, - { 0x1, 0x1, 13, 275, 1267, 34, 1, 124 }, - { 0x1, 0x1, 13, 277, 1276, 34, 1, 124 }, - { 0x1, 0x1, 13, 279, 1285, 34, 1, 124 }, - { 0x1, 0x1, 13, 281, 1294, 34, 1, 124 }, - { 0x1, 0x1, 13, 283, 1304, 34, 1, 124 }, - { 0x1, 0x1, 13, 285, 1314, 34, 1, 124 }, + { 0x1, 0x1, 13, 261, 1210, 34, 1, 124 }, + { 0x1, 0x1, 13, 263, 1219, 34, 1, 124 }, + { 0x1, 0x1, 13, 265, 1228, 34, 1, 124 }, + { 0x1, 0x1, 13, 268, 1239, 34, 1, 124 }, + { 0x1, 0x1, 13, 270, 1248, 34, 1, 124 }, + { 0x1, 0x1, 13, 272, 1257, 34, 1, 124 }, + { 0x1, 0x1, 13, 274, 1266, 34, 1, 124 }, + { 0x1, 0x1, 13, 276, 1275, 34, 1, 124 }, + { 0x1, 0x1, 13, 278, 1284, 34, 1, 124 }, + { 0x1, 0x1, 13, 280, 1293, 34, 1, 124 }, + { 0x1, 0x1, 13, 282, 1303, 34, 1, 124 }, + { 0x1, 0x1, 13, 284, 1313, 34, 1, 124 }, + { 0x0, 0x0, 19, -1, 655, 0, 0, -1 }, { 0x0, 0x0, 19, -1, 656, 0, 0, -1 }, { 0x0, 0x0, 19, -1, 657, 0, 0, -1 }, { 0x0, 0x0, 19, -1, 658, 0, 0, -1 }, @@ -2192,20 +2244,19 @@ completer_table[] = { { 0x0, 0x0, 19, -1, 682, 0, 0, -1 }, { 0x0, 0x0, 19, -1, 683, 0, 0, -1 }, { 0x0, 0x0, 19, -1, 684, 0, 0, -1 }, - { 0x0, 0x0, 19, -1, 685, 0, 0, -1 }, + { 0x0, 0x0, 20, -1, 2362, 0, 0, -1 }, { 0x0, 0x0, 20, -1, 2363, 0, 0, -1 }, - { 0x0, 0x0, 20, -1, 2364, 0, 0, -1 }, + { 0x0, 0x0, 20, -1, 2378, 0, 0, -1 }, { 0x0, 0x0, 20, -1, 2379, 0, 0, -1 }, - { 0x0, 0x0, 20, -1, 2380, 0, 0, -1 }, + { 0x0, 0x0, 20, -1, 2384, 0, 0, -1 }, { 0x0, 0x0, 20, -1, 2385, 0, 0, -1 }, - { 0x0, 0x0, 20, -1, 2386, 0, 0, -1 }, - { 0x0, 0x0, 21, 692, 2375, 0, 0, -1 }, - { 0x0, 0x0, 21, 693, 2377, 0, 0, -1 }, + { 0x0, 0x0, 21, 691, 2374, 0, 0, -1 }, + { 0x0, 0x0, 21, 692, 2376, 0, 0, -1 }, + { 0x0, 0x0, 23, -1, 2372, 0, 0, -1 }, { 0x0, 0x0, 23, -1, 2373, 0, 0, -1 }, - { 0x0, 0x0, 23, -1, 2374, 0, 0, -1 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 6 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 6 }, - { 0x1, 0x1, 24, 1055, -1, 35, 1, 6 }, + { 0x1, 0x1, 24, 1054, -1, 35, 1, 6 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 6 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 6 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 6 }, @@ -2268,7 +2319,7 @@ completer_table[] = { { 0x1, 0x1, 24, -1, -1, 35, 1, 15 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, - { 0x1, 0x1, 24, 1076, -1, 35, 1, 17 }, + { 0x1, 0x1, 24, 1075, -1, 35, 1, 17 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, @@ -2367,7 +2418,7 @@ completer_table[] = { { 0x1, 0x1, 24, -1, -1, 35, 1, 21 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, - { 0x1, 0x1, 24, 1109, -1, 35, 1, 17 }, + { 0x1, 0x1, 24, 1108, -1, 35, 1, 17 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, { 0x1, 0x1, 24, -1, -1, 35, 1, 17 }, @@ -2406,304 +2457,304 @@ completer_table[] = { { 0x1, 0x1, 24, -1, -1, 35, 1, 21 }, { 0x1, 0x1, 24, -1, -1, 33, 1, 76 }, { 0x1, 0x1, 24, -1, -1, 33, 1, 76 }, - { 0x1, 0x1, 24, 1125, 1214, 35, 1, 130 }, - { 0x1, 0x1, 24, 1126, 1223, 35, 1, 130 }, - { 0x1, 0x1, 24, 1127, 1232, 35, 1, 130 }, - { 0x1, 0x1, 24, 1128, 1243, 35, 1, 130 }, - { 0x1, 0x1, 24, 1129, 1252, 35, 1, 130 }, - { 0x1, 0x1, 24, 1130, 1261, 35, 1, 130 }, - { 0x1, 0x1, 24, 1131, 1270, 35, 1, 130 }, - { 0x1, 0x1, 24, 1132, 1279, 35, 1, 130 }, - { 0x1, 0x1, 24, 1133, 1288, 35, 1, 130 }, - { 0x1, 0x1, 24, 1134, 1298, 35, 1, 130 }, - { 0x1, 0x1, 24, 1135, 1308, 35, 1, 130 }, - { 0x1, 0x1, 24, 1136, 1318, 35, 1, 130 }, - { 0x1, 0x1, 24, 1137, 1327, 35, 1, 144 }, - { 0x1, 0x1, 24, 1138, 1333, 35, 1, 144 }, - { 0x1, 0x1, 24, 1139, 1339, 35, 1, 144 }, - { 0x1, 0x1, 24, 1140, 1345, 35, 1, 144 }, - { 0x1, 0x1, 24, 1141, 1351, 35, 1, 144 }, - { 0x1, 0x1, 24, 1142, 1357, 35, 1, 144 }, - { 0x1, 0x1, 24, 1143, 1363, 35, 1, 144 }, - { 0x1, 0x1, 24, 1144, 1369, 35, 1, 144 }, - { 0x1, 0x1, 24, 1145, 1375, 35, 1, 144 }, - { 0x1, 0x1, 24, 1146, 1381, 35, 1, 144 }, - { 0x1, 0x1, 24, 1147, 1387, 35, 1, 144 }, - { 0x1, 0x1, 24, 1148, 1393, 35, 1, 144 }, - { 0x1, 0x1, 24, 1149, 1399, 35, 1, 144 }, - { 0x1, 0x1, 24, 1150, 1405, 35, 1, 144 }, - { 0x1, 0x1, 24, 1151, 1411, 35, 1, 144 }, - { 0x1, 0x1, 24, 1152, 1417, 35, 1, 144 }, - { 0x1, 0x1, 24, 1153, 1423, 35, 1, 144 }, - { 0x1, 0x1, 24, 1154, 1429, 35, 1, 144 }, - { 0x0, 0x0, 33, 2357, 2355, 0, 0, -1 }, - { 0x0, 0x0, 33, 2360, 2358, 0, 0, -1 }, - { 0x0, 0x0, 33, 2366, 2365, 0, 0, -1 }, - { 0x0, 0x0, 33, 2368, 2367, 0, 0, -1 }, - { 0x0, 0x0, 33, 2382, 2381, 0, 0, -1 }, - { 0x0, 0x0, 33, 2384, 2383, 0, 0, -1 }, - { 0x0, 0x0, 35, -1, 2376, 0, 0, -1 }, - { 0x0, 0x0, 35, -1, 2378, 0, 0, -1 }, - { 0x1, 0x1, 38, -1, 1922, 37, 1, 29 }, - { 0x1, 0x1, 38, -1, 1957, 37, 1, 29 }, - { 0x0, 0x0, 38, -1, 1960, 0, 0, -1 }, + { 0x1, 0x1, 24, 1124, 1213, 35, 1, 130 }, + { 0x1, 0x1, 24, 1125, 1222, 35, 1, 130 }, + { 0x1, 0x1, 24, 1126, 1231, 35, 1, 130 }, + { 0x1, 0x1, 24, 1127, 1242, 35, 1, 130 }, + { 0x1, 0x1, 24, 1128, 1251, 35, 1, 130 }, + { 0x1, 0x1, 24, 1129, 1260, 35, 1, 130 }, + { 0x1, 0x1, 24, 1130, 1269, 35, 1, 130 }, + { 0x1, 0x1, 24, 1131, 1278, 35, 1, 130 }, + { 0x1, 0x1, 24, 1132, 1287, 35, 1, 130 }, + { 0x1, 0x1, 24, 1133, 1297, 35, 1, 130 }, + { 0x1, 0x1, 24, 1134, 1307, 35, 1, 130 }, + { 0x1, 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0x0, 0x0, 33, 2381, 2380, 0, 0, -1 }, + { 0x0, 0x0, 33, 2383, 2382, 0, 0, -1 }, + { 0x0, 0x0, 35, -1, 2375, 0, 0, -1 }, + { 0x0, 0x0, 35, -1, 2377, 0, 0, -1 }, + { 0x1, 0x1, 38, -1, 1921, 37, 1, 29 }, + { 0x1, 0x1, 38, -1, 1956, 37, 1, 29 }, + { 0x0, 0x0, 38, -1, 1959, 0, 0, -1 }, { 0x1, 0x1, 38, -1, -1, 37, 1, 29 }, - { 0x1, 0x1, 38, -1, 1965, 37, 1, 29 }, - { 0x0, 0x0, 38, -1, 1968, 0, 0, -1 }, + { 0x1, 0x1, 38, -1, 1964, 37, 1, 29 }, + { 0x0, 0x0, 38, -1, 1967, 0, 0, -1 }, { 0x1, 0x1, 38, -1, -1, 37, 1, 29 }, - { 0x0, 0x0, 38, -1, 1971, 0, 0, -1 }, + { 0x0, 0x0, 38, -1, 1970, 0, 0, -1 }, { 0x1, 0x1, 38, -1, -1, 37, 1, 29 }, - { 0x1, 0x1, 38, -1, 1974, 37, 1, 29 }, - { 0x1, 0x1, 38, -1, 1977, 37, 1, 29 }, - { 0x1, 0x1, 38, -1, 2010, 37, 1, 29 }, + { 0x1, 0x1, 38, -1, 1973, 37, 1, 29 }, + { 0x1, 0x1, 38, -1, 1976, 37, 1, 29 }, + { 0x1, 0x1, 38, -1, 2009, 37, 1, 29 }, { 0x3, 0x3, 38, -1, -1, 30, 1, 137 }, - { 0x0, 0x0, 38, 960, -1, 0, 1, 95 }, + { 0x0, 0x0, 38, 959, -1, 0, 1, 95 }, { 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115, -1, -1, 27, 1, 0 }, { 0x1, 0x1, 115, -1, -1, 27, 1, 0 }, - { 0x1, 0x1, 116, -1, 2422, 37, 1, 1 }, - { 0x0, 0x0, 116, -1, 2435, 0, 1, 1 }, - { 0x1, 0x1, 116, -1, 2442, 37, 1, 1 }, - { 0x0, 0x0, 116, -1, 2454, 0, 1, 1 }, + { 0x1, 0x1, 116, -1, 2421, 37, 1, 1 }, + { 0x0, 0x0, 116, -1, 2434, 0, 1, 1 }, + { 0x1, 0x1, 116, -1, 2441, 37, 1, 1 }, + { 0x0, 0x0, 116, -1, 2453, 0, 1, 1 }, + { 0x0, 0x0, 117, 993, -1, 0, 1, 0 }, { 0x0, 0x0, 117, 994, -1, 0, 1, 0 }, { 0x0, 0x0, 117, 995, -1, 0, 1, 0 }, - { 0x0, 0x0, 117, 996, -1, 0, 1, 0 }, - { 0x3, 0x3, 117, 954, -1, 34, 1, 33 }, - { 0x3, 0x3, 117, 955, -1, 34, 1, 40 }, + { 0x3, 0x3, 117, 953, -1, 34, 1, 33 }, + { 0x3, 0x3, 117, 954, -1, 34, 1, 40 }, { 0x1, 0x1, 119, -1, -1, 35, 1, 33 }, { 0x1, 0x1, 119, -1, -1, 35, 1, 40 }, { 0x0, 0x0, 120, -1, -1, 0, 1, 40 }, @@ -2719,8 +2770,8 @@ completer_table[] = { { 0x1, 0x1, 120, -1, -1, 27, 1, 117 }, { 0x1, 0x1, 120, -1, -1, 27, 1, 40 }, { 0x0, 0x0, 120, -1, -1, 0, 1, 40 }, - { 0x0, 0x0, 121, -1, 2356, 0, 0, -1 }, - { 0x0, 0x0, 121, -1, 2359, 0, 0, -1 }, + { 0x0, 0x0, 121, -1, 2355, 0, 0, -1 }, + { 0x0, 0x0, 121, -1, 2358, 0, 0, -1 }, { 0x1, 0x1, 122, -1, -1, 35, 1, 16 }, { 0x1, 0x1, 122, -1, -1, 35, 1, 16 }, { 0x1, 0x1, 122, -1, -1, 35, 1, 16 }, @@ -2733,10 +2784,10 @@ completer_table[] = { { 0x1, 0x1, 122, -1, -1, 23, 1, 67 }, { 0x1, 0x1, 122, -1, -1, 23, 1, 67 }, { 0x1, 0x1, 122, -1, -1, 23, 1, 67 }, - { 0x1, 0x1, 122, 779, -1, 23, 1, 67 }, - { 0x9, 0x9, 122, 780, -1, 20, 1, 67 }, + { 0x1, 0x1, 122, 778, -1, 23, 1, 67 }, + { 0x9, 0x9, 122, 779, -1, 20, 1, 67 }, + { 0x0, 0x0, 126, 1836, -1, 0, 1, 0 }, { 0x0, 0x0, 126, 1837, -1, 0, 1, 0 }, - { 0x0, 0x0, 126, 1838, -1, 0, 1, 0 }, { 0x1, 0x1, 126, -1, -1, 28, 1, 33 }, { 0x1, 0x1, 126, -1, -1, 27, 1, 33 }, { 0x1, 0x1, 126, -1, -1, 29, 1, 0 }, @@ -2747,205 +2798,206 @@ completer_table[] = { { 0x1, 0x1, 126, -1, -1, 29, 1, 0 }, { 0x1, 0x1, 126, -1, -1, 29, 1, 0 }, { 0x1, 0x1, 126, -1, -1, 29, 1, 0 }, - { 0x0, 0x0, 126, 952, -1, 0, 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0x1, 171, 1463, -1, 28, 1, 134 }, { 0x1, 0x1, 171, 1464, -1, 28, 1, 134 }, @@ -2953,263 +3005,262 @@ completer_table[] = { { 0x1, 0x1, 171, 1466, -1, 28, 1, 134 }, { 0x1, 0x1, 171, 1467, -1, 28, 1, 134 }, { 0x1, 0x1, 171, 1468, -1, 28, 1, 134 }, - { 0x1, 0x1, 171, 1469, -1, 28, 1, 134 }, + { 0x1, 0x1, 171, 1469, -1, 28, 1, 136 }, { 0x1, 0x1, 171, 1470, -1, 28, 1, 136 }, { 0x1, 0x1, 171, 1471, -1, 28, 1, 136 }, { 0x1, 0x1, 171, 1472, -1, 28, 1, 136 }, - { 0x1, 0x1, 171, 1473, -1, 28, 1, 136 }, - { 0x1, 0x1, 171, 1474, -1, 28, 1, 126 }, - { 0x1, 0x1, 171, 1475, -1, 28, 1, 127 }, - { 0x1, 0x1, 171, 1476, -1, 28, 1, 128 }, + { 0x1, 0x1, 171, 1473, -1, 28, 1, 126 }, + { 0x1, 0x1, 171, 1474, -1, 28, 1, 127 }, + { 0x1, 0x1, 171, 1475, -1, 28, 1, 128 }, + { 0x1, 0x1, 171, 1476, -1, 28, 1, 124 }, { 0x1, 0x1, 171, 1477, -1, 28, 1, 124 }, - { 0x1, 0x1, 171, 1478, -1, 28, 1, 124 }, + { 0x1, 0x1, 171, 1478, -1, 28, 1, 130 }, { 0x1, 0x1, 171, 1479, -1, 28, 1, 130 }, { 0x1, 0x1, 171, 1480, -1, 28, 1, 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0x1, 0x1, 171, 1626, -1, 28, 1, 142 }, + { 0x1, 0x1, 171, 1627, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1628, -1, 28, 1, 144 }, { 0x1, 0x1, 171, 1629, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1630, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1631, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1632, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1633, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1634, -1, 28, 1, 143 }, - { 0x1, 0x1, 171, 1635, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1636, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1637, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1638, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1639, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1640, -1, 28, 1, 143 }, - { 0x1, 0x1, 171, 1641, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1642, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1643, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1644, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1645, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1646, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1630, -1, 28, 1, 140 }, + { 0x1, 0x1, 171, 1631, -1, 28, 1, 146 }, + { 0x1, 0x1, 171, 1632, -1, 28, 1, 147 }, + { 0x1, 0x1, 171, 1633, -1, 28, 1, 148 }, + { 0x1, 0x1, 171, 1634, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1635, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1636, -1, 28, 1, 145 }, + { 0x1, 0x1, 171, 1637, -1, 28, 1, 146 }, + { 0x1, 0x1, 171, 1638, -1, 28, 1, 147 }, + { 0x1, 0x1, 171, 1639, -1, 28, 1, 148 }, + { 0x1, 0x1, 171, 1640, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1641, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1642, -1, 28, 1, 145 }, + { 0x1, 0x1, 171, 1643, -1, 28, 1, 141 }, + { 0x1, 0x1, 171, 1644, -1, 28, 1, 142 }, + { 0x1, 0x1, 171, 1645, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1646, -1, 28, 1, 144 }, { 0x1, 0x1, 171, 1647, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1648, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1649, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1650, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1651, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1652, -1, 28, 1, 143 }, - { 0x1, 0x1, 171, 1653, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1654, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1655, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1656, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1657, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1658, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1648, -1, 28, 1, 140 }, + { 0x1, 0x1, 171, 1649, -1, 28, 1, 146 }, + { 0x1, 0x1, 171, 1650, -1, 28, 1, 147 }, + { 0x1, 0x1, 171, 1651, -1, 28, 1, 148 }, + { 0x1, 0x1, 171, 1652, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1653, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1654, -1, 28, 1, 145 }, + { 0x1, 0x1, 171, 1655, -1, 28, 1, 141 }, + { 0x1, 0x1, 171, 1656, -1, 28, 1, 142 }, + { 0x1, 0x1, 171, 1657, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1658, -1, 28, 1, 144 }, { 0x1, 0x1, 171, 1659, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1660, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1661, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1662, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1663, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1664, -1, 28, 1, 143 }, - { 0x1, 0x1, 171, 1665, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1666, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1667, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1668, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1669, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1670, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1660, -1, 28, 1, 140 }, + { 0x1, 0x1, 171, 1661, -1, 28, 1, 146 }, + { 0x1, 0x1, 171, 1662, -1, 28, 1, 147 }, + { 0x1, 0x1, 171, 1663, -1, 28, 1, 148 }, + { 0x1, 0x1, 171, 1664, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1665, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1666, -1, 28, 1, 145 }, + { 0x1, 0x1, 171, 1667, -1, 28, 1, 141 }, + { 0x1, 0x1, 171, 1668, -1, 28, 1, 142 }, + { 0x1, 0x1, 171, 1669, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1670, -1, 28, 1, 144 }, { 0x1, 0x1, 171, 1671, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1672, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1673, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1674, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1675, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1676, -1, 28, 1, 143 }, - { 0x1, 0x1, 171, 1677, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1678, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1679, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1680, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1681, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1682, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1672, -1, 28, 1, 140 }, + { 0x1, 0x1, 171, 1673, -1, 28, 1, 146 }, + { 0x1, 0x1, 171, 1674, -1, 28, 1, 147 }, + { 0x1, 0x1, 171, 1675, -1, 28, 1, 148 }, + { 0x1, 0x1, 171, 1676, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1677, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1678, -1, 28, 1, 145 }, + { 0x1, 0x1, 171, 1679, -1, 28, 1, 141 }, + { 0x1, 0x1, 171, 1680, -1, 28, 1, 142 }, + { 0x1, 0x1, 171, 1681, -1, 28, 1, 143 }, + { 0x1, 0x1, 171, 1682, -1, 28, 1, 144 }, { 0x1, 0x1, 171, 1683, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1684, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1685, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1686, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1687, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1688, -1, 28, 1, 143 }, - { 0x1, 0x1, 171, 1689, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1690, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1691, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1692, -1, 28, 1, 141 }, - { 0x1, 0x1, 171, 1693, -1, 28, 1, 142 }, - { 0x1, 0x1, 171, 1694, -1, 28, 1, 143 }, - { 0x1, 0x1, 171, 1695, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1696, -1, 28, 1, 144 }, - { 0x1, 0x1, 171, 1697, -1, 28, 1, 140 }, - { 0x1, 0x1, 171, 1448, -1, 28, 1, 146 }, - { 0x1, 0x1, 171, 1449, -1, 28, 1, 147 }, - { 0x1, 0x1, 171, 1450, -1, 28, 1, 147 }, - { 0x1, 0x1, 171, 1451, -1, 28, 1, 146 }, - { 0x1, 0x1, 171, 1452, -1, 28, 1, 148 }, - { 0x1, 0x1, 171, 1453, -1, 28, 1, 149 }, - { 0x1, 0x1, 171, 1454, -1, 28, 1, 149 }, - { 0x1, 0x1, 171, 1455, -1, 28, 1, 148 }, - { 0x1, 0x1, 171, 1456, -1, 28, 1, 148 }, - { 0x1, 0x1, 171, 1457, -1, 28, 1, 149 }, - { 0x1, 0x1, 171, 1458, -1, 28, 1, 149 }, - { 0x1, 0x1, 171, 1459, -1, 28, 1, 148 }, + { 0x1, 0x1, 171, 1684, -1, 28, 1, 140 }, + { 0x1, 0x1, 171, 1685, -1, 28, 1, 146 }, + { 0x1, 0x1, 171, 1686, -1, 28, 1, 147 }, + { 0x1, 0x1, 171, 1687, -1, 28, 1, 148 }, + { 0x1, 0x1, 171, 1688, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1689, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1690, -1, 28, 1, 145 }, + { 0x1, 0x1, 171, 1691, -1, 28, 1, 146 }, + { 0x1, 0x1, 171, 1692, -1, 28, 1, 147 }, + { 0x1, 0x1, 171, 1693, -1, 28, 1, 148 }, + { 0x1, 0x1, 171, 1694, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1695, -1, 28, 1, 149 }, + { 0x1, 0x1, 171, 1696, -1, 28, 1, 145 }, + { 0x1, 0x1, 171, 1447, -1, 28, 1, 151 }, + { 0x1, 0x1, 171, 1448, -1, 28, 1, 152 }, + { 0x1, 0x1, 171, 1449, -1, 28, 1, 152 }, + { 0x1, 0x1, 171, 1450, -1, 28, 1, 151 }, + { 0x1, 0x1, 171, 1451, -1, 28, 1, 153 }, + { 0x1, 0x1, 171, 1452, -1, 28, 1, 154 }, + { 0x1, 0x1, 171, 1453, -1, 28, 1, 154 }, + { 0x1, 0x1, 171, 1454, -1, 28, 1, 153 }, + { 0x1, 0x1, 171, 1455, -1, 28, 1, 153 }, + { 0x1, 0x1, 171, 1456, -1, 28, 1, 154 }, + { 0x1, 0x1, 171, 1457, -1, 28, 1, 154 }, + { 0x1, 0x1, 171, 1458, -1, 28, 1, 153 }, + { 0x1, 0x1, 171, 1739, -1, 28, 1, 136 }, { 0x1, 0x1, 171, 1740, -1, 28, 1, 136 }, { 0x1, 0x1, 171, 1741, -1, 28, 1, 136 }, { 0x1, 0x1, 171, 1742, -1, 28, 1, 136 }, - { 0x1, 0x1, 171, 1743, -1, 28, 1, 136 }, - { 0x1, 0x1, 172, 1698, -1, 29, 1, 146 }, - { 0x1, 0x1, 172, 1699, -1, 29, 1, 147 }, - { 0x1, 0x1, 172, 1700, -1, 29, 1, 147 }, - { 0x1, 0x1, 172, 1701, -1, 29, 1, 146 }, - { 0x1, 0x1, 172, 1702, -1, 29, 1, 148 }, - { 0x1, 0x1, 172, 1703, -1, 29, 1, 149 }, - { 0x1, 0x1, 172, 1704, -1, 29, 1, 149 }, - { 0x1, 0x1, 172, 1705, -1, 29, 1, 148 }, - { 0x1, 0x1, 172, 1706, -1, 29, 1, 148 }, - { 0x1, 0x1, 172, 1707, -1, 29, 1, 149 }, - { 0x1, 0x1, 172, 1708, -1, 29, 1, 149 }, - { 0x1, 0x1, 172, 1709, -1, 29, 1, 148 }, + { 0x1, 0x1, 172, 1697, -1, 29, 1, 151 }, + { 0x1, 0x1, 172, 1698, -1, 29, 1, 152 }, + { 0x1, 0x1, 172, 1699, -1, 29, 1, 152 }, + { 0x1, 0x1, 172, 1700, -1, 29, 1, 151 }, + { 0x1, 0x1, 172, 1701, -1, 29, 1, 153 }, + { 0x1, 0x1, 172, 1702, -1, 29, 1, 154 }, + { 0x1, 0x1, 172, 1703, -1, 29, 1, 154 }, + { 0x1, 0x1, 172, 1704, -1, 29, 1, 153 }, + { 0x1, 0x1, 172, 1705, -1, 29, 1, 153 }, + { 0x1, 0x1, 172, 1706, -1, 29, 1, 154 }, + { 0x1, 0x1, 172, 1707, -1, 29, 1, 154 }, + { 0x1, 0x1, 172, 1708, -1, 29, 1, 153 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 135 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 135 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 134 }, @@ -3230,7 +3281,16 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 261, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 260, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 1889, -1, 28, 1, 124 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 127 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 128 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 262, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1890, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, @@ -3239,27 +3299,27 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 263, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 264, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1891, -1, 28, 1, 124 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 125 }, + { 0x3, 0x3, 173, 266, -1, 28, 1, 125 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 127 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 128 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 265, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 267, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1892, -1, 28, 1, 124 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 125 }, - { 0x3, 0x3, 173, 267, -1, 28, 1, 125 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 127 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 128 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 268, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 269, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1893, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, @@ -3268,7 +3328,7 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 270, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 271, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1894, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, @@ -3277,7 +3337,7 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 272, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 273, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1895, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, @@ -3286,7 +3346,7 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 274, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 275, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1896, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, @@ -3295,7 +3355,7 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 276, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 277, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1897, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, @@ -3303,8 +3363,9 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 128 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 129 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 278, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 279, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1898, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, @@ -3314,7 +3375,7 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 129 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 280, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 281, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1899, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, @@ -3324,214 +3385,204 @@ completer_table[] = { { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 129 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 282, -1, 28, 1, 130 }, + { 0x3, 0x3, 173, 283, -1, 28, 1, 130 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, { 0x3, 0x3, 173, 1900, -1, 28, 1, 124 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 126 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 127 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 128 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 124 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 129 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 284, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 130 }, - { 0x3, 0x3, 173, 1901, -1, 28, 1, 124 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 140 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1902, -1, 28, 1, 140 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1903, -1, 28, 1, 140 }, + { 0x3, 0x3, 173, 1901, -1, 28, 1, 140 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1902, -1, 28, 1, 145 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1903, -1, 28, 1, 145 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, 1904, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1905, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1906, -1, 28, 1, 140 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1905, -1, 28, 1, 145 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1906, -1, 28, 1, 145 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, 1907, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1908, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1909, -1, 28, 1, 140 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1908, -1, 28, 1, 145 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1909, -1, 28, 1, 145 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, 1910, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1911, -1, 28, 1, 140 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1911, -1, 28, 1, 145 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, 1912, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1913, -1, 28, 1, 140 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1913, -1, 28, 1, 145 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, 1914, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1915, -1, 28, 1, 140 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1915, -1, 28, 1, 145 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, { 0x3, 0x3, 173, 1916, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1917, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1918, -1, 28, 1, 140 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 141 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 142 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 143 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 144 }, - { 0x3, 0x3, 173, 1919, -1, 28, 1, 140 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, - { 0x3, 0x3, 173, 803, -1, 28, 1, 147 }, - { 0x3, 0x3, 173, 804, -1, 28, 1, 146 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, - { 0x3, 0x3, 173, 805, -1, 28, 1, 149 }, - { 0x3, 0x3, 173, 806, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1917, -1, 28, 1, 145 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 146 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 147 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 148 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, - { 0x3, 0x3, 173, 807, -1, 28, 1, 149 }, - { 0x3, 0x3, 173, 808, -1, 28, 1, 148 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 149 }, + { 0x3, 0x3, 173, 1918, -1, 28, 1, 145 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 151 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 152 }, + { 0x3, 0x3, 173, 802, -1, 28, 1, 152 }, + { 0x3, 0x3, 173, 803, -1, 28, 1, 151 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 153 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 154 }, + { 0x3, 0x3, 173, 804, -1, 28, 1, 154 }, + { 0x3, 0x3, 173, 805, -1, 28, 1, 153 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 153 }, + { 0x3, 0x3, 173, -1, -1, 28, 1, 154 }, + { 0x3, 0x3, 173, 806, -1, 28, 1, 154 }, + { 0x3, 0x3, 173, 807, -1, 28, 1, 153 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 131 }, - { 0x3, 0x3, 173, 1857, -1, 28, 1, 131 }, + { 0x3, 0x3, 173, 1856, -1, 28, 1, 131 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 138 }, - { 0x3, 0x3, 173, 1858, -1, 28, 1, 138 }, + { 0x3, 0x3, 173, 1857, -1, 28, 1, 138 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 132 }, - { 0x3, 0x3, 173, 1859, -1, 28, 1, 132 }, + { 0x3, 0x3, 173, 1858, -1, 28, 1, 132 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 131 }, - { 0x3, 0x3, 173, 1860, -1, 28, 1, 131 }, + { 0x3, 0x3, 173, 1859, -1, 28, 1, 131 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 138 }, - { 0x3, 0x3, 173, 1861, -1, 28, 1, 138 }, + { 0x3, 0x3, 173, 1860, -1, 28, 1, 138 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 131 }, - { 0x3, 0x3, 173, 1862, -1, 28, 1, 131 }, + { 0x3, 0x3, 173, 1861, -1, 28, 1, 131 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 138 }, - { 0x3, 0x3, 173, 1863, -1, 28, 1, 138 }, + { 0x3, 0x3, 173, 1862, -1, 28, 1, 138 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 131 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 133 }, - { 0x3, 0x3, 173, 1864, -1, 28, 1, 131 }, + { 0x3, 0x3, 173, 1863, -1, 28, 1, 131 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 138 }, { 0x3, 0x3, 173, -1, -1, 28, 1, 139 }, - { 0x3, 0x3, 173, 1865, -1, 28, 1, 138 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, - { 0x3, 0x3, 173, -1, -1, 28, 1, 145 }, + { 0x3, 0x3, 173, 1864, -1, 28, 1, 138 }, + { 0x3, 0x3, 173, -1, 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0x1, 175, 1778, 350, 37, 1, 4 }, - { 0x2000001, 0x2000001, 175, -1, 352, 12, 1, 4 }, - { 0x11, 0x11, 175, 1780, 354, 33, 1, 4 }, - { 0x2200001, 0x2200001, 175, -1, 356, 12, 1, 4 }, - { 0x11, 0x31, 175, 2427, 362, 33, 1, 4 }, - { 0x2200001, 0x2200001, 175, -1, 363, 12, 1, 4 }, - { 0x11, 0x31, 175, 2437, 366, 33, 1, 4 }, - { 0x2200001, 0x2200001, 175, -1, 367, 12, 1, 4 }, - { 0x1, 0x1, 175, -1, 370, 37, 1, 4 }, - { 0x2000001, 0x2000001, 175, -1, 371, 12, 1, 4 }, - { 0x11, 0x11, 175, -1, 372, 33, 1, 4 }, - { 0x2200001, 0x2200001, 175, -1, 373, 12, 1, 4 }, - { 0x1, 0x1, 175, 1802, 374, 37, 1, 4 }, - { 0x2000001, 0x2000001, 175, -1, 376, 12, 1, 4 }, - { 0x11, 0x11, 175, 1804, 378, 33, 1, 4 }, - { 0x2200001, 0x2200001, 175, -1, 380, 12, 1, 4 }, - { 0x11, 0x31, 175, 2447, 386, 33, 1, 4 }, - { 0x2200001, 0x2200001, 175, -1, 387, 12, 1, 4 }, - { 0x1, 0x1, 175, -1, 390, 33, 1, 4 }, - { 0x200001, 0x200001, 175, -1, 391, 12, 1, 4 }, - { 0x1, 0x1, 175, -1, 394, 33, 1, 4 }, - { 0x200001, 0x200001, 175, -1, 395, 12, 1, 4 }, + { 0x0, 0x0, 174, -1, 334, 0, 0, -1 }, + { 0x0, 0x0, 174, 2513, 2482, 0, 1, 1 }, + { 0x0, 0x0, 174, -1, 338, 0, 0, -1 }, + { 0x0, 0x0, 174, 2515, 2484, 0, 1, 1 }, + { 0x11, 0x31, 175, 2416, 341, 33, 1, 4 }, + { 0x2200001, 0x2200001, 175, -1, 342, 12, 1, 4 }, + { 0x1, 0x1, 175, -1, 345, 37, 1, 4 }, + { 0x2000001, 0x2000001, 175, -1, 346, 12, 1, 4 }, + { 0x11, 0x11, 175, -1, 347, 33, 1, 4 }, + { 0x2200001, 0x2200001, 175, -1, 348, 12, 1, 4 }, + { 0x1, 0x1, 175, 1777, 349, 37, 1, 4 }, + { 0x2000001, 0x2000001, 175, -1, 351, 12, 1, 4 }, + { 0x11, 0x11, 175, 1779, 353, 33, 1, 4 }, + { 0x2200001, 0x2200001, 175, -1, 355, 12, 1, 4 }, + { 0x11, 0x31, 175, 2426, 361, 33, 1, 4 }, + { 0x2200001, 0x2200001, 175, -1, 362, 12, 1, 4 }, + { 0x11, 0x31, 175, 2436, 365, 33, 1, 4 }, + { 0x2200001, 0x2200001, 175, -1, 366, 12, 1, 4 }, + { 0x1, 0x1, 175, -1, 369, 37, 1, 4 }, + { 0x2000001, 0x2000001, 175, -1, 370, 12, 1, 4 }, + { 0x11, 0x11, 175, -1, 371, 33, 1, 4 }, + { 0x2200001, 0x2200001, 175, -1, 372, 12, 1, 4 }, + { 0x1, 0x1, 175, 1801, 373, 37, 1, 4 }, + { 0x2000001, 0x2000001, 175, -1, 375, 12, 1, 4 }, + { 0x11, 0x11, 175, 1803, 377, 33, 1, 4 }, + { 0x2200001, 0x2200001, 175, -1, 379, 12, 1, 4 }, + { 0x11, 0x31, 175, 2446, 385, 33, 1, 4 }, + { 0x2200001, 0x2200001, 175, -1, 386, 12, 1, 4 }, + { 0x1, 0x1, 175, -1, 389, 33, 1, 4 }, + { 0x200001, 0x200001, 175, -1, 390, 12, 1, 4 }, + { 0x1, 0x1, 175, -1, 393, 33, 1, 4 }, + { 0x200001, 0x200001, 175, -1, 394, 12, 1, 4 }, { 0x1, 0x1, 176, -1, -1, 37, 1, 4 }, { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 }, { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 }, - { 0x1, 0x1, 176, 1755, -1, 37, 1, 4 }, + { 0x1, 0x1, 176, 1754, -1, 37, 1, 4 }, { 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 }, - { 0x11, 0x11, 176, 1757, -1, 33, 1, 4 }, + { 0x11, 0x11, 176, 1756, -1, 33, 1, 4 }, { 0x1, 0x1, 176, -1, -1, 37, 1, 4 }, { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 }, { 0x11, 0x11, 176, -1, -1, 33, 1, 4 }, @@ -3553,9 +3604,9 @@ completer_table[] = { { 0x1, 0x1, 176, -1, -1, 37, 1, 4 }, { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 }, { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 }, - { 0x1, 0x1, 176, 1767, -1, 37, 1, 4 }, + { 0x1, 0x1, 176, 1766, -1, 37, 1, 4 }, { 0x2200001, 0x2200001, 176, -1, -1, 12, 1, 4 }, - { 0x11, 0x11, 176, 1769, -1, 33, 1, 4 }, + { 0x11, 0x11, 176, 1768, -1, 33, 1, 4 }, { 0x1, 0x1, 176, -1, -1, 37, 1, 4 }, { 0x2000001, 0x2000001, 176, -1, -1, 12, 1, 4 }, { 0x11, 0x11, 176, -1, -1, 33, 1, 4 }, @@ -3575,433 +3626,433 @@ completer_table[] = { { 0x0, 0x0, 176, -1, -1, 0, 1, 5 }, { 0x1, 0x1, 176, -1, -1, 12, 1, 5 }, { 0x9, 0x9, 176, -1, -1, 33, 1, 5 }, - { 0x1, 0x1, 176, 336, -1, 33, 1, 4 }, + { 0x1, 0x1, 176, 335, -1, 33, 1, 4 }, { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 }, - { 0x200001, 0x200001, 176, 337, -1, 12, 1, 4 }, + { 0x200001, 0x200001, 176, 336, -1, 12, 1, 4 }, { 0x9, 0x9, 176, -1, -1, 33, 1, 5 }, - { 0x1, 0x1, 176, 340, -1, 33, 1, 4 }, + { 0x1, 0x1, 176, 339, -1, 33, 1, 4 }, { 0x1200001, 0x1200001, 176, -1, -1, 12, 1, 5 }, - { 0x200001, 0x200001, 176, 341, -1, 12, 1, 4 }, - { 0x0, 0x0, 177, -1, 1947, 0, 0, -1 }, - { 0x9, 0x9, 177, -1, 2477, 33, 1, 49 }, - { 0x0, 0x0, 177, -1, 1988, 0, 0, -1 }, + { 0x200001, 0x200001, 176, 340, -1, 12, 1, 4 }, + { 0x0, 0x0, 177, -1, 1946, 0, 0, -1 }, + { 0x9, 0x9, 177, -1, 2476, 33, 1, 49 }, + { 0x0, 0x0, 177, -1, 1987, 0, 0, -1 }, { 0x7, 0x7, 177, -1, -1, 27, 1, 49 }, { 0x1, 0x1, 197, -1, -1, 27, 1, 10 }, { 0x1, 0x1, 211, -1, -1, 29, 1, 0 }, { 0x1, 0x1, 211, -1, -1, 29, 1, 0 }, - { 0x2, 0x3, 211, 987, -1, 27, 1, 33 }, - { 0x0, 0x0, 211, 988, -1, 0, 1, 33 }, + { 0x2, 0x3, 211, 986, -1, 27, 1, 33 }, + { 0x0, 0x0, 211, 987, -1, 0, 1, 33 }, + { 0x0, 0x0, 211, 988, -1, 0, 1, 0 }, { 0x0, 0x0, 211, 989, -1, 0, 1, 0 }, { 0x0, 0x0, 211, 990, -1, 0, 1, 0 }, { 0x0, 0x0, 211, 991, -1, 0, 1, 0 }, - { 0x0, 0x0, 211, 992, -1, 0, 1, 0 }, + { 0x0, 0x0, 211, 2498, -1, 0, 1, 93 }, { 0x0, 0x0, 211, 2499, -1, 0, 1, 93 }, - { 0x0, 0x0, 211, 2500, -1, 0, 1, 93 }, - { 0x0, 0x0, 211, 2501, 819, 0, 0, -1 }, + { 0x0, 0x0, 211, 2500, 818, 0, 0, -1 }, { 0x1, 0x1, 212, -1, -1, 27, 1, 0 }, { 0x1, 0x1, 212, -1, -1, 27, 1, 0 }, - { 0x1, 0x1, 213, -1, 1195, 32, 1, 135 }, - { 0x1, 0x1, 213, -1, 1197, 32, 1, 134 }, - { 0x1, 0x1, 213, -1, 1199, 32, 1, 134 }, - { 0x1, 0x1, 213, -1, 1201, 32, 1, 134 }, - { 0x1, 0x1, 213, -1, 1203, 32, 1, 134 }, - { 0x1, 0x1, 213, -1, 1205, 32, 1, 136 }, - { 0x1, 0x1, 213, -1, 1207, 32, 1, 136 }, - { 0x1, 0x1, 213, -1, 1710, 32, 1, 131 }, - { 0x1, 0x1, 213, -1, 1712, 32, 1, 138 }, - { 0x1, 0x1, 213, -1, 1714, 32, 1, 132 }, - { 0x1, 0x1, 213, -1, 1716, 32, 1, 131 }, - { 0x1, 0x1, 213, -1, 1718, 32, 1, 138 }, - { 0x1, 0x1, 213, -1, 1720, 32, 1, 131 }, - { 0x1, 0x1, 213, -1, 1722, 32, 1, 138 }, - { 0x1, 0x1, 213, 2319, 1724, 32, 1, 131 }, - { 0x1, 0x1, 213, 2320, 1727, 32, 1, 138 }, + { 0x1, 0x1, 213, -1, 1194, 32, 1, 135 }, + { 0x1, 0x1, 213, -1, 1196, 32, 1, 134 }, + { 0x1, 0x1, 213, -1, 1198, 32, 1, 134 }, + { 0x1, 0x1, 213, -1, 1200, 32, 1, 134 }, + { 0x1, 0x1, 213, -1, 1202, 32, 1, 134 }, + { 0x1, 0x1, 213, -1, 1204, 32, 1, 136 }, + { 0x1, 0x1, 213, -1, 1206, 32, 1, 136 }, + { 0x1, 0x1, 213, -1, 1709, 32, 1, 131 }, + { 0x1, 0x1, 213, -1, 1711, 32, 1, 138 }, + { 0x1, 0x1, 213, -1, 1713, 32, 1, 132 }, + { 0x1, 0x1, 213, -1, 1715, 32, 1, 131 }, + { 0x1, 0x1, 213, -1, 1717, 32, 1, 138 }, + { 0x1, 0x1, 213, -1, 1719, 32, 1, 131 }, + { 0x1, 0x1, 213, -1, 1721, 32, 1, 138 }, + { 0x1, 0x1, 213, 2318, 1723, 32, 1, 131 }, + { 0x1, 0x1, 213, 2319, 1726, 32, 1, 138 }, + { 0x0, 0x0, 214, -1, 2360, 0, 0, -1 }, { 0x0, 0x0, 214, -1, 2361, 0, 0, -1 }, - { 0x0, 0x0, 214, -1, 2362, 0, 0, -1 }, - { 0x0, 0x0, 214, -1, 2387, 0, 0, -1 }, - { 0x5, 0x5, 214, -1, 2390, 20, 1, 67 }, - { 0x0, 0x0, 218, 1847, 818, 0, 0, -1 }, - { 0x0, 0x0, 219, -1, 957, 0, 0, -1 }, - { 0x0, 0x0, 219, -1, 1048, 0, 0, -1 }, + { 0x0, 0x0, 214, -1, 2386, 0, 0, -1 }, + { 0x5, 0x5, 214, -1, 2389, 20, 1, 67 }, + { 0x0, 0x0, 218, 1846, 817, 0, 0, -1 }, + { 0x0, 0x0, 219, -1, 956, 0, 0, -1 }, + { 0x0, 0x0, 219, -1, 1047, 0, 0, -1 }, { 0x0, 0x0, 219, -1, -1, 0, 1, 121 }, { 0x0, 0x0, 219, -1, -1, 0, 1, 66 }, - { 0x1, 0x1, 219, 694, 1921, 36, 1, 65 }, - { 0x1, 0x1, 219, 695, 1956, 36, 1, 65 }, - { 0x0, 0x0, 219, 696, 1959, 0, 0, -1 }, - { 0x1, 0x1, 219, 697, -1, 36, 1, 65 }, + { 0x1, 0x1, 219, 693, 1920, 36, 1, 65 }, + { 0x1, 0x1, 219, 694, 1955, 36, 1, 65 }, + { 0x0, 0x0, 219, 695, 1958, 0, 0, -1 }, + { 0x1, 0x1, 219, 696, -1, 36, 1, 65 }, + { 0x0, 0x0, 219, 1191, -1, 0, 1, 33 }, + { 0x1, 0x1, 219, 697, 1963, 36, 1, 65 }, + { 0x0, 0x0, 219, 698, 1966, 0, 0, -1 }, + { 0x1, 0x1, 219, 699, -1, 36, 1, 65 }, + { 0x0, 0x0, 219, 700, 1969, 0, 0, -1 }, + { 0x1, 0x1, 219, 701, -1, 36, 1, 65 }, + { 0x1, 0x1, 219, 702, 1972, 36, 1, 65 }, + { 0x1, 0x1, 219, 703, 1975, 36, 1, 65 }, { 0x0, 0x0, 219, 1192, -1, 0, 1, 33 }, - { 0x1, 0x1, 219, 698, 1964, 36, 1, 65 }, - { 0x0, 0x0, 219, 699, 1967, 0, 0, -1 }, - { 0x1, 0x1, 219, 700, -1, 36, 1, 65 }, - { 0x0, 0x0, 219, 701, 1970, 0, 0, -1 }, - { 0x1, 0x1, 219, 702, -1, 36, 1, 65 }, - { 0x1, 0x1, 219, 703, 1973, 36, 1, 65 }, - { 0x1, 0x1, 219, 704, 1976, 36, 1, 65 }, - { 0x0, 0x0, 219, 1193, -1, 0, 1, 33 }, - { 0x1, 0x1, 219, 705, 2009, 36, 1, 65 }, - { 0x1, 0x1, 219, 706, -1, 31, 1, 137 }, - { 0x1, 0x1, 219, 223, 1208, 32, 1, 126 }, - { 0x1, 0x1, 219, 224, 1217, 32, 1, 126 }, - { 0x1, 0x1, 219, 225, 1226, 32, 1, 126 }, - { 0x1, 0x1, 219, 226, 1237, 32, 1, 126 }, - { 0x1, 0x1, 219, 227, 1246, 32, 1, 126 }, - { 0x1, 0x1, 219, 228, 1255, 32, 1, 126 }, - { 0x1, 0x1, 219, 229, 1264, 32, 1, 126 }, - { 0x1, 0x1, 219, 230, 1273, 32, 1, 126 }, - { 0x1, 0x1, 219, 231, 1282, 32, 1, 126 }, - { 0x1, 0x1, 219, 232, 1291, 32, 1, 126 }, - { 0x1, 0x1, 219, 233, 1301, 32, 1, 126 }, - { 0x1, 0x1, 219, 234, 1311, 32, 1, 126 }, - { 0x1, 0x1, 219, 235, 1324, 32, 1, 141 }, - { 0x1, 0x1, 219, 236, 1330, 32, 1, 141 }, - { 0x1, 0x1, 219, 237, 1336, 32, 1, 141 }, - { 0x1, 0x1, 219, 238, 1342, 32, 1, 141 }, - { 0x1, 0x1, 219, 239, 1348, 32, 1, 141 }, - { 0x1, 0x1, 219, 240, 1354, 32, 1, 141 }, - { 0x1, 0x1, 219, 241, 1360, 32, 1, 141 }, - { 0x1, 0x1, 219, 242, 1366, 32, 1, 141 }, - { 0x1, 0x1, 219, 243, 1372, 32, 1, 141 }, - { 0x1, 0x1, 219, 244, 1378, 32, 1, 141 }, - { 0x1, 0x1, 219, 245, 1384, 32, 1, 141 }, - { 0x1, 0x1, 219, 246, 1390, 32, 1, 141 }, - { 0x1, 0x1, 219, 247, 1396, 32, 1, 141 }, - { 0x1, 0x1, 219, 248, 1402, 32, 1, 141 }, - { 0x1, 0x1, 219, 249, 1408, 32, 1, 141 }, - { 0x1, 0x1, 219, 250, 1414, 32, 1, 141 }, - { 0x1, 0x1, 219, 251, 1420, 32, 1, 141 }, - { 0x1, 0x1, 219, 252, 1426, 32, 1, 141 }, - { 0x1, 0x1, 219, 710, -1, 31, 1, 150 }, - { 0x0, 0x0, 220, 2012, -1, 0, 1, 65 }, - { 0x0, 0x0, 220, 2013, -1, 0, 1, 28 }, + { 0x1, 0x1, 219, 704, 2008, 36, 1, 65 }, + { 0x1, 0x1, 219, 705, -1, 31, 1, 137 }, + { 0x1, 0x1, 219, 222, 1207, 32, 1, 126 }, + { 0x1, 0x1, 219, 223, 1216, 32, 1, 126 }, + { 0x1, 0x1, 219, 224, 1225, 32, 1, 126 }, + { 0x1, 0x1, 219, 225, 1236, 32, 1, 126 }, + { 0x1, 0x1, 219, 226, 1245, 32, 1, 126 }, + { 0x1, 0x1, 219, 227, 1254, 32, 1, 126 }, + { 0x1, 0x1, 219, 228, 1263, 32, 1, 126 }, + { 0x1, 0x1, 219, 229, 1272, 32, 1, 126 }, + { 0x1, 0x1, 219, 230, 1281, 32, 1, 126 }, + { 0x1, 0x1, 219, 231, 1290, 32, 1, 126 }, + { 0x1, 0x1, 219, 232, 1300, 32, 1, 126 }, + { 0x1, 0x1, 219, 233, 1310, 32, 1, 126 }, + { 0x1, 0x1, 219, 234, 1323, 32, 1, 141 }, + { 0x1, 0x1, 219, 235, 1329, 32, 1, 146 }, + { 0x1, 0x1, 219, 236, 1335, 32, 1, 146 }, + { 0x1, 0x1, 219, 237, 1341, 32, 1, 141 }, + { 0x1, 0x1, 219, 238, 1347, 32, 1, 146 }, + { 0x1, 0x1, 219, 239, 1353, 32, 1, 146 }, + { 0x1, 0x1, 219, 240, 1359, 32, 1, 141 }, + { 0x1, 0x1, 219, 241, 1365, 32, 1, 146 }, + { 0x1, 0x1, 219, 242, 1371, 32, 1, 146 }, + { 0x1, 0x1, 219, 243, 1377, 32, 1, 141 }, + { 0x1, 0x1, 219, 244, 1383, 32, 1, 146 }, + { 0x1, 0x1, 219, 245, 1389, 32, 1, 141 }, + { 0x1, 0x1, 219, 246, 1395, 32, 1, 146 }, + { 0x1, 0x1, 219, 247, 1401, 32, 1, 141 }, + { 0x1, 0x1, 219, 248, 1407, 32, 1, 146 }, + { 0x1, 0x1, 219, 249, 1413, 32, 1, 141 }, + { 0x1, 0x1, 219, 250, 1419, 32, 1, 146 }, + { 0x1, 0x1, 219, 251, 1425, 32, 1, 146 }, + { 0x1, 0x1, 219, 709, -1, 31, 1, 155 }, + { 0x0, 0x0, 220, 2011, -1, 0, 1, 65 }, + { 0x0, 0x0, 220, 2012, -1, 0, 1, 28 }, { 0x0, 0x0, 220, 24, -1, 0, 1, 28 }, + { 0x0, 0x0, 220, 2014, -1, 0, 1, 28 }, { 0x0, 0x0, 220, 2015, -1, 0, 1, 28 }, - { 0x0, 0x0, 220, 2016, -1, 0, 1, 28 }, - { 0x0, 0x0, 220, 2017, -1, 0, 1, 44 }, - { 0x0, 0x0, 220, 2018, -1, 0, 1, 39 }, - { 0x1, 0x1, 220, 2019, -1, 12, 1, 58 }, - { 0x0, 0x0, 220, 2020, -1, 0, 1, 53 }, - { 0x1000001, 0x1000001, 220, 2021, -1, 12, 1, 58 }, - { 0x1, 0x1, 220, 2022, -1, 36, 1, 53 }, - { 0x200001, 0x200001, 220, 2023, -1, 12, 1, 58 }, - { 0x1, 0x1, 220, 2024, -1, 33, 1, 53 }, - { 0x1200001, 0x1200001, 220, 2025, -1, 12, 1, 48 }, - { 0x9, 0x9, 220, 2026, -1, 33, 1, 48 }, - { 0x1, 0x1, 220, 2027, -1, 12, 1, 58 }, - { 0x0, 0x0, 220, 2028, -1, 0, 1, 53 }, - { 0x200001, 0x1200001, 220, 2029, -1, 12, 1, 58 }, - { 0x1, 0x9, 220, 2030, -1, 33, 1, 53 }, - { 0x1, 0x1, 220, 2031, -1, 12, 1, 58 }, - { 0x0, 0x0, 220, 2032, -1, 0, 1, 53 }, - { 0x1000001, 0x1000001, 220, 2033, -1, 12, 1, 58 }, - { 0x1, 0x1, 220, 2034, -1, 36, 1, 53 }, - { 0x200001, 0x200001, 220, 2035, -1, 12, 1, 58 }, - { 0x1, 0x1, 220, 2036, -1, 33, 1, 53 }, - { 0x1200001, 0x1200001, 220, 2037, -1, 12, 1, 48 }, - { 0x9, 0x9, 220, 2038, -1, 33, 1, 48 }, - { 0x1, 0x1, 220, 2039, -1, 12, 1, 58 }, - { 0x0, 0x0, 220, 2040, -1, 0, 1, 53 }, - { 0x200001, 0x1200001, 220, 2041, -1, 12, 1, 58 }, - { 0x1, 0x9, 220, 2042, -1, 33, 1, 53 }, - { 0x1, 0x1, 220, 2043, -1, 28, 1, 28 }, - { 0x0, 0x0, 220, 2044, -1, 0, 1, 28 }, - { 0x3, 0x3, 220, 2045, -1, 27, 1, 28 }, - { 0x1, 0x1, 220, 2046, -1, 27, 1, 28 }, - { 0x0, 0x0, 220, 2047, -1, 0, 1, 65 }, + { 0x0, 0x0, 220, 2016, -1, 0, 1, 44 }, + { 0x0, 0x0, 220, 2017, -1, 0, 1, 39 }, + { 0x1, 0x1, 220, 2018, -1, 12, 1, 58 }, + { 0x0, 0x0, 220, 2019, -1, 0, 1, 53 }, + { 0x1000001, 0x1000001, 220, 2020, -1, 12, 1, 58 }, + { 0x1, 0x1, 220, 2021, -1, 36, 1, 53 }, + { 0x200001, 0x200001, 220, 2022, -1, 12, 1, 58 }, + { 0x1, 0x1, 220, 2023, -1, 33, 1, 53 }, + { 0x1200001, 0x1200001, 220, 2024, -1, 12, 1, 48 }, + { 0x9, 0x9, 220, 2025, -1, 33, 1, 48 }, + { 0x1, 0x1, 220, 2026, -1, 12, 1, 58 }, + { 0x0, 0x0, 220, 2027, -1, 0, 1, 53 }, + { 0x200001, 0x1200001, 220, 2028, -1, 12, 1, 58 }, + { 0x1, 0x9, 220, 2029, -1, 33, 1, 53 }, + { 0x1, 0x1, 220, 2030, -1, 12, 1, 58 }, + { 0x0, 0x0, 220, 2031, -1, 0, 1, 53 }, + { 0x1000001, 0x1000001, 220, 2032, -1, 12, 1, 58 }, + { 0x1, 0x1, 220, 2033, -1, 36, 1, 53 }, + { 0x200001, 0x200001, 220, 2034, -1, 12, 1, 58 }, + { 0x1, 0x1, 220, 2035, -1, 33, 1, 53 }, + { 0x1200001, 0x1200001, 220, 2036, -1, 12, 1, 48 }, + { 0x9, 0x9, 220, 2037, -1, 33, 1, 48 }, + { 0x1, 0x1, 220, 2038, -1, 12, 1, 58 }, + { 0x0, 0x0, 220, 2039, -1, 0, 1, 53 }, + { 0x200001, 0x1200001, 220, 2040, -1, 12, 1, 58 }, + { 0x1, 0x9, 220, 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28 }, - { 0x1, 0x1, 220, 2061, -1, 36, 1, 65 }, - { 0x1, 0x1, 220, 2062, -1, 37, 1, 28 }, - { 0x0, 0x0, 220, 2063, -1, 0, 1, 28 }, - { 0x0, 0x0, 220, 2064, -1, 0, 1, 65 }, - { 0x0, 0x0, 220, 2065, -1, 0, 1, 28 }, + { 0x1, 0x1, 220, 2057, -1, 36, 1, 65 }, + { 0x1, 0x1, 220, 2058, -1, 37, 1, 28 }, + { 0x0, 0x0, 220, 2059, -1, 0, 1, 28 }, + { 0x1, 0x1, 220, 2060, -1, 36, 1, 65 }, + { 0x1, 0x1, 220, 2061, -1, 37, 1, 28 }, + { 0x0, 0x0, 220, 2062, -1, 0, 1, 28 }, + { 0x0, 0x0, 220, 2063, -1, 0, 1, 65 }, + { 0x0, 0x0, 220, 2064, -1, 0, 1, 28 }, { 0x0, 0x0, 220, 41, -1, 0, 1, 28 }, - { 0x0, 0x0, 220, 2067, -1, 0, 1, 65 }, - { 0x0, 0x0, 220, 2068, -1, 0, 1, 28 }, + { 0x0, 0x0, 220, 2066, -1, 0, 1, 65 }, + { 0x0, 0x0, 220, 2067, -1, 0, 1, 28 }, { 0x0, 0x0, 220, 42, -1, 0, 1, 28 }, + { 0x0, 0x0, 220, 2069, -1, 0, 1, 28 }, { 0x0, 0x0, 220, 2070, -1, 0, 1, 28 }, - { 0x0, 0x0, 220, 2071, -1, 0, 1, 28 }, - { 0x0, 0x0, 220, 2072, -1, 0, 1, 48 }, - { 0x1, 0x1, 220, 2073, -1, 27, 1, 48 }, - { 0x1, 0x1, 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221, 2102, -1, 34, 1, 65 }, + { 0x1, 0x1, 221, 2103, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2104, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2105, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2106, -1, 34, 1, 30 }, - { 0x1, 0x1, 221, 2107, -1, 34, 1, 30 }, - { 0x1, 0x1, 221, 2108, -1, 34, 1, 45 }, - { 0x1, 0x1, 221, 2109, -1, 34, 1, 41 }, - { 0x400001, 0x400001, 221, 2110, -1, 12, 1, 60 }, - { 0x1, 0x1, 221, 2111, -1, 34, 1, 55 }, - { 0x1400001, 0x1400001, 221, 2112, -1, 12, 1, 60 }, - { 0x5, 0x5, 221, 2113, -1, 34, 1, 55 }, - { 0x600001, 0x600001, 221, 2114, -1, 12, 1, 60 }, - { 0x3, 0x3, 221, 2115, -1, 33, 1, 55 }, - { 0x1600001, 0x1600001, 221, 2116, -1, 12, 1, 50 }, - { 0xb, 0xb, 221, 2117, -1, 33, 1, 50 }, - { 0x400001, 0x400001, 221, 2118, -1, 12, 1, 60 }, - { 0x1, 0x1, 221, 2119, -1, 34, 1, 55 }, - { 0x600001, 0x1600001, 221, 2120, -1, 12, 1, 60 }, - { 0x3, 0xb, 221, 2121, -1, 33, 1, 55 }, - { 0x400001, 0x400001, 221, 2122, -1, 12, 1, 60 }, - { 0x1, 0x1, 221, 2123, -1, 34, 1, 55 }, - { 0x1400001, 0x1400001, 221, 2124, -1, 12, 1, 60 }, - { 0x5, 0x5, 221, 2125, -1, 34, 1, 55 }, - { 0x600001, 0x600001, 221, 2126, -1, 12, 1, 60 }, - { 0x3, 0x3, 221, 2127, -1, 33, 1, 55 }, - { 0x1600001, 0x1600001, 221, 2128, -1, 12, 1, 50 }, - { 0xb, 0xb, 221, 2129, -1, 33, 1, 50 }, - { 0x400001, 0x400001, 221, 2130, -1, 12, 1, 60 }, - { 0x1, 0x1, 221, 2131, -1, 34, 1, 55 }, - { 0x600001, 0x1600001, 221, 2132, -1, 12, 1, 60 }, - { 0x3, 0xb, 221, 2133, -1, 33, 1, 55 }, - { 0x41, 0x41, 221, 2134, -1, 28, 1, 30 }, - { 0x1, 0x1, 221, 2135, -1, 34, 1, 30 }, - { 0x83, 0x83, 221, 2136, -1, 27, 1, 30 }, - { 0x81, 0x81, 221, 2137, -1, 27, 1, 30 }, - { 0x1, 0x1, 221, 2138, -1, 34, 1, 65 }, + { 0x1, 0x1, 221, 2107, -1, 34, 1, 45 }, + { 0x1, 0x1, 221, 2108, -1, 34, 1, 41 }, + { 0x400001, 0x400001, 221, 2109, -1, 12, 1, 60 }, + { 0x1, 0x1, 221, 2110, -1, 34, 1, 55 }, + { 0x1400001, 0x1400001, 221, 2111, -1, 12, 1, 60 }, + { 0x5, 0x5, 221, 2112, -1, 34, 1, 55 }, + { 0x600001, 0x600001, 221, 2113, -1, 12, 1, 60 }, + { 0x3, 0x3, 221, 2114, -1, 33, 1, 55 }, + { 0x1600001, 0x1600001, 221, 2115, -1, 12, 1, 50 }, + { 0xb, 0xb, 221, 2116, -1, 33, 1, 50 }, + { 0x400001, 0x400001, 221, 2117, -1, 12, 1, 60 }, + { 0x1, 0x1, 221, 2118, -1, 34, 1, 55 }, + { 0x600001, 0x1600001, 221, 2119, -1, 12, 1, 60 }, + { 0x3, 0xb, 221, 2120, -1, 33, 1, 55 }, + { 0x400001, 0x400001, 221, 2121, -1, 12, 1, 60 }, + { 0x1, 0x1, 221, 2122, -1, 34, 1, 55 }, + { 0x1400001, 0x1400001, 221, 2123, -1, 12, 1, 60 }, + { 0x5, 0x5, 221, 2124, -1, 34, 1, 55 }, + { 0x600001, 0x600001, 221, 2125, -1, 12, 1, 60 }, + { 0x3, 0x3, 221, 2126, -1, 33, 1, 55 }, + { 0x1600001, 0x1600001, 221, 2127, -1, 12, 1, 50 }, + { 0xb, 0xb, 221, 2128, -1, 33, 1, 50 }, + { 0x400001, 0x400001, 221, 2129, -1, 12, 1, 60 }, + { 0x1, 0x1, 221, 2130, -1, 34, 1, 55 }, + { 0x600001, 0x1600001, 221, 2131, -1, 12, 1, 60 }, + { 0x3, 0xb, 221, 2132, -1, 33, 1, 55 }, + { 0x41, 0x41, 221, 2133, -1, 28, 1, 30 }, + { 0x1, 0x1, 221, 2134, -1, 34, 1, 30 }, + { 0x83, 0x83, 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0x81, 221, 2177, -1, 27, 1, 30 }, + { 0x1, 0x1, 221, 2178, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2179, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2180, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2181, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2182, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2183, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2184, -1, 34, 1, 30 }, - { 0x1, 0x1, 221, 2185, -1, 34, 1, 30 }, + { 0x1, 0x1, 221, 2185, -1, 34, 1, 25 }, { 0x1, 0x1, 221, 2186, -1, 34, 1, 25 }, { 0x1, 0x1, 221, 2187, -1, 34, 1, 25 }, { 0x1, 0x1, 221, 2188, -1, 34, 1, 25 }, - { 0x1, 0x1, 221, 2189, -1, 34, 1, 25 }, - { 0x1, 0x1, 221, 2190, -1, 34, 1, 36 }, - { 0x1, 0x1, 221, 2191, -1, 34, 1, 65 }, + { 0x1, 0x1, 221, 2189, -1, 34, 1, 36 }, + { 0x1, 0x1, 221, 2190, -1, 34, 1, 65 }, + { 0x1, 0x1, 221, 2191, -1, 34, 1, 30 }, { 0x1, 0x1, 221, 2192, -1, 34, 1, 30 }, - { 0x1, 0x1, 221, 2193, -1, 34, 1, 30 }, - { 0x1, 0x1, 222, 2194, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2193, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2194, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2195, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2196, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2197, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2198, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2199, -1, 35, 1, 46 }, - { 0x1, 0x1, 222, 2200, -1, 35, 1, 42 }, - { 0x800001, 0x800001, 222, 2201, -1, 12, 1, 61 }, - { 0x1, 0x1, 222, 2202, -1, 35, 1, 56 }, - { 0x1800001, 0x1800001, 222, 2203, -1, 12, 1, 61 }, - { 0x3, 0x3, 222, 2204, -1, 35, 1, 56 }, - { 0xa00001, 0xa00001, 222, 2205, -1, 12, 1, 61 }, - { 0x5, 0x5, 222, 2206, -1, 33, 1, 56 }, - { 0x1a00001, 0x1a00001, 222, 2207, -1, 12, 1, 51 }, - { 0xd, 0xd, 222, 2208, -1, 33, 1, 51 }, - { 0x800001, 0x800001, 222, 2209, -1, 12, 1, 61 }, - { 0x1, 0x1, 222, 2210, -1, 35, 1, 56 }, - { 0xa00001, 0x1a00001, 222, 2211, -1, 12, 1, 61 }, - { 0x5, 0xd, 222, 2212, -1, 33, 1, 56 }, - { 0x800001, 0x800001, 222, 2213, -1, 12, 1, 61 }, - { 0x1, 0x1, 222, 2214, -1, 35, 1, 56 }, - { 0x1800001, 0x1800001, 222, 2215, -1, 12, 1, 61 }, - { 0x3, 0x3, 222, 2216, -1, 35, 1, 56 }, - { 0xa00001, 0xa00001, 222, 2217, -1, 12, 1, 61 }, - { 0x5, 0x5, 222, 2218, -1, 33, 1, 56 }, - { 0x1a00001, 0x1a00001, 222, 2219, -1, 12, 1, 51 }, - { 0xd, 0xd, 222, 2220, -1, 33, 1, 51 }, - { 0x800001, 0x800001, 222, 2221, -1, 12, 1, 61 }, - { 0x1, 0x1, 222, 2222, -1, 35, 1, 56 }, - { 0xa00001, 0x1a00001, 222, 2223, -1, 12, 1, 61 }, - { 0x5, 0xd, 222, 2224, -1, 33, 1, 56 }, - { 0x81, 0x81, 222, 2225, -1, 28, 1, 31 }, - { 0x1, 0x1, 222, 2226, -1, 35, 1, 31 }, - { 0x103, 0x103, 222, 2227, -1, 27, 1, 31 }, - { 0x101, 0x101, 222, 2228, -1, 27, 1, 31 }, - { 0x1, 0x1, 222, 2229, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2198, -1, 35, 1, 46 }, + { 0x1, 0x1, 222, 2199, -1, 35, 1, 42 }, + { 0x800001, 0x800001, 222, 2200, -1, 12, 1, 61 }, + { 0x1, 0x1, 222, 2201, -1, 35, 1, 56 }, + { 0x1800001, 0x1800001, 222, 2202, -1, 12, 1, 61 }, + { 0x3, 0x3, 222, 2203, -1, 35, 1, 56 }, + { 0xa00001, 0xa00001, 222, 2204, -1, 12, 1, 61 }, + { 0x5, 0x5, 222, 2205, -1, 33, 1, 56 }, + { 0x1a00001, 0x1a00001, 222, 2206, -1, 12, 1, 51 }, + { 0xd, 0xd, 222, 2207, -1, 33, 1, 51 }, + { 0x800001, 0x800001, 222, 2208, -1, 12, 1, 61 }, + { 0x1, 0x1, 222, 2209, -1, 35, 1, 56 }, + { 0xa00001, 0x1a00001, 222, 2210, -1, 12, 1, 61 }, + { 0x5, 0xd, 222, 2211, -1, 33, 1, 56 }, + { 0x800001, 0x800001, 222, 2212, -1, 12, 1, 61 }, + { 0x1, 0x1, 222, 2213, -1, 35, 1, 56 }, + { 0x1800001, 0x1800001, 222, 2214, -1, 12, 1, 61 }, + { 0x3, 0x3, 222, 2215, -1, 35, 1, 56 }, + { 0xa00001, 0xa00001, 222, 2216, -1, 12, 1, 61 }, + { 0x5, 0x5, 222, 2217, -1, 33, 1, 56 }, + { 0x1a00001, 0x1a00001, 222, 2218, -1, 12, 1, 51 }, + { 0xd, 0xd, 222, 2219, -1, 33, 1, 51 }, + { 0x800001, 0x800001, 222, 2220, -1, 12, 1, 61 }, + { 0x1, 0x1, 222, 2221, -1, 35, 1, 56 }, + { 0xa00001, 0x1a00001, 222, 2222, -1, 12, 1, 61 }, + { 0x5, 0xd, 222, 2223, -1, 33, 1, 56 }, + { 0x81, 0x81, 222, 2224, -1, 28, 1, 31 }, + { 0x1, 0x1, 222, 2225, -1, 35, 1, 31 }, + { 0x103, 0x103, 222, 2226, -1, 27, 1, 31 }, + { 0x101, 0x101, 222, 2227, -1, 27, 1, 31 }, + { 0x1, 0x1, 222, 2228, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2229, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2230, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2231, -1, 35, 1, 31 }, - { 0x3, 0x3, 222, 2232, -1, 35, 1, 65 }, - { 0x5, 0x5, 222, 2233, -1, 35, 1, 31 }, + { 0x3, 0x3, 222, 2231, -1, 35, 1, 65 }, + { 0x5, 0x5, 222, 2232, -1, 35, 1, 31 }, + { 0x1, 0x1, 222, 2233, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2234, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2235, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2236, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2237, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2236, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2237, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2238, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2239, -1, 35, 1, 31 }, - { 0x3, 0x3, 222, 2240, -1, 35, 1, 65 }, - { 0x5, 0x5, 222, 2241, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2242, -1, 35, 1, 31 }, - { 0x3, 0x3, 222, 2243, -1, 35, 1, 65 }, - { 0x5, 0x5, 222, 2244, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2245, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2246, -1, 35, 1, 65 }, + { 0x3, 0x3, 222, 2239, -1, 35, 1, 65 }, + { 0x5, 0x5, 222, 2240, -1, 35, 1, 31 }, + { 0x1, 0x1, 222, 2241, -1, 35, 1, 31 }, + { 0x3, 0x3, 222, 2242, -1, 35, 1, 65 }, + { 0x5, 0x5, 222, 2243, -1, 35, 1, 31 }, + { 0x1, 0x1, 222, 2244, -1, 35, 1, 31 }, + { 0x1, 0x1, 222, 2245, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2246, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2247, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2248, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2249, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2248, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2249, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2250, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2251, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2252, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2253, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2254, -1, 35, 1, 51 }, - { 0x101, 0x101, 222, 2255, -1, 27, 1, 51 }, - { 0x81, 0x81, 222, 2256, -1, 28, 1, 51 }, - { 0x103, 0x103, 222, 2257, -1, 27, 1, 51 }, - { 0x41, 0x41, 222, 2258, -1, 29, 1, 51 }, - { 0x105, 0x105, 222, 2259, -1, 27, 1, 51 }, - { 0x83, 0x83, 222, 2260, -1, 28, 1, 51 }, - { 0x107, 0x107, 222, 2261, -1, 27, 1, 51 }, + { 0x1, 0x1, 222, 2253, -1, 35, 1, 51 }, + { 0x101, 0x101, 222, 2254, -1, 27, 1, 51 }, + { 0x81, 0x81, 222, 2255, -1, 28, 1, 51 }, + { 0x103, 0x103, 222, 2256, -1, 27, 1, 51 }, + { 0x41, 0x41, 222, 2257, -1, 29, 1, 51 }, + { 0x105, 0x105, 222, 2258, -1, 27, 1, 51 }, + { 0x83, 0x83, 222, 2259, -1, 28, 1, 51 }, + { 0x107, 0x107, 222, 2260, -1, 27, 1, 51 }, + { 0x1, 0x1, 222, 2261, -1, 35, 1, 51 }, { 0x1, 0x1, 222, 2262, -1, 35, 1, 51 }, { 0x1, 0x1, 222, 2263, -1, 35, 1, 51 }, { 0x1, 0x1, 222, 2264, -1, 35, 1, 51 }, - { 0x1, 0x1, 222, 2265, -1, 35, 1, 51 }, - { 0x81, 0x81, 222, 2266, -1, 28, 1, 31 }, - { 0x1, 0x1, 222, 2267, -1, 35, 1, 31 }, - { 0x103, 0x103, 222, 2268, -1, 27, 1, 31 }, - { 0x101, 0x101, 222, 2269, -1, 27, 1, 31 }, + { 0x81, 0x81, 222, 2265, -1, 28, 1, 31 }, + { 0x1, 0x1, 222, 2266, -1, 35, 1, 31 }, + { 0x103, 0x103, 222, 2267, -1, 27, 1, 31 }, + { 0x101, 0x101, 222, 2268, -1, 27, 1, 31 }, + { 0x1, 0x1, 222, 2269, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2270, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2271, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2272, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2273, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2274, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2275, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2276, -1, 35, 1, 31 }, + { 0x1, 0x1, 222, 2276, -1, 35, 1, 26 }, { 0x1, 0x1, 222, 2277, -1, 35, 1, 26 }, { 0x1, 0x1, 222, 2278, -1, 35, 1, 26 }, { 0x1, 0x1, 222, 2279, -1, 35, 1, 26 }, - { 0x1, 0x1, 222, 2280, -1, 35, 1, 26 }, - { 0x1, 0x1, 222, 2281, -1, 35, 1, 37 }, - { 0x1, 0x1, 222, 2282, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2280, -1, 35, 1, 37 }, + { 0x1, 0x1, 222, 2281, -1, 35, 1, 65 }, + { 0x1, 0x1, 222, 2282, -1, 35, 1, 31 }, { 0x1, 0x1, 222, 2283, -1, 35, 1, 31 }, - { 0x1, 0x1, 222, 2284, -1, 35, 1, 31 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 65 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1875, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 1874, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 47 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 43 }, { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 62 }, - { 0x3, 0x3, 223, 2458, -1, 34, 1, 57 }, + { 0x3, 0x3, 223, 2457, -1, 34, 1, 57 }, { 0x1c00001, 0x1c00001, 223, -1, -1, 12, 1, 62 }, - { 0x7, 0x7, 223, 2459, -1, 34, 1, 57 }, + { 0x7, 0x7, 223, 2458, -1, 34, 1, 57 }, { 0xe00001, 0xe00001, 223, -1, -1, 12, 1, 62 }, - { 0x7, 0x7, 223, 2460, -1, 33, 1, 57 }, + { 0x7, 0x7, 223, 2459, -1, 33, 1, 57 }, { 0x1e00001, 0x1e00001, 223, -1, -1, 12, 1, 52 }, - { 0xf, 0xf, 223, 2461, -1, 33, 1, 52 }, + { 0xf, 0xf, 223, 2460, -1, 33, 1, 52 }, { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 62 }, - { 0x3, 0x3, 223, 2466, -1, 34, 1, 57 }, + { 0x3, 0x3, 223, 2465, -1, 34, 1, 57 }, { 0xe00001, 0x1e00001, 223, -1, -1, 12, 1, 62 }, - { 0x7, 0xf, 223, 2467, -1, 33, 1, 57 }, + { 0x7, 0xf, 223, 2466, -1, 33, 1, 57 }, { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 62 }, - { 0x3, 0x3, 223, 2470, -1, 34, 1, 57 }, + { 0x3, 0x3, 223, 2469, -1, 34, 1, 57 }, { 0x1c00001, 0x1c00001, 223, -1, -1, 12, 1, 62 }, - { 0x7, 0x7, 223, 2471, -1, 34, 1, 57 }, + { 0x7, 0x7, 223, 2470, -1, 34, 1, 57 }, { 0xe00001, 0xe00001, 223, -1, -1, 12, 1, 62 }, - { 0x7, 0x7, 223, 2472, -1, 33, 1, 57 }, + { 0x7, 0x7, 223, 2471, -1, 33, 1, 57 }, { 0x1e00001, 0x1e00001, 223, -1, -1, 12, 1, 52 }, - { 0xf, 0xf, 223, 2473, -1, 33, 1, 52 }, + { 0xf, 0xf, 223, 2472, -1, 33, 1, 52 }, { 0xc00001, 0xc00001, 223, -1, -1, 12, 1, 62 }, - { 0x3, 0x3, 223, 2478, -1, 34, 1, 57 }, + { 0x3, 0x3, 223, 2477, -1, 34, 1, 57 }, { 0xe00001, 0x1e00001, 223, -1, -1, 12, 1, 62 }, - { 0x7, 0xf, 223, 2479, -1, 33, 1, 57 }, + { 0x7, 0xf, 223, 2478, -1, 33, 1, 57 }, { 0xc1, 0xc1, 223, -1, -1, 28, 1, 32 }, - { 0x3, 0x3, 223, 2398, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 2397, -1, 34, 1, 32 }, { 0x183, 0x183, 223, -1, -1, 27, 1, 32 }, - { 0x181, 0x181, 223, 2399, -1, 27, 1, 32 }, + { 0x181, 0x181, 223, 2398, -1, 27, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 65 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1876, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 1875, -1, 34, 1, 32 }, { 0x7, 0x7, 223, -1, -1, 34, 1, 65 }, { 0xb, 0xb, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1877, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 1876, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 65 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1880, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 1879, -1, 34, 1, 32 }, { 0x7, 0x7, 223, -1, -1, 34, 1, 65 }, { 0xb, 0xb, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1881, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 1880, -1, 34, 1, 32 }, { 0x7, 0x7, 223, -1, -1, 34, 1, 65 }, { 0xb, 0xb, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1883, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 1882, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 65 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1885, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 1884, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 65 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1886, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 1885, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 52 }, @@ -4017,9 +4068,9 @@ completer_table[] = { { 0x3, 0x3, 223, -1, -1, 34, 1, 52 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 52 }, { 0xc1, 0xc1, 223, -1, -1, 28, 1, 32 }, - { 0x3, 0x3, 223, 2402, -1, 34, 1, 32 }, + { 0x3, 0x3, 223, 2401, -1, 34, 1, 32 }, { 0x183, 0x183, 223, -1, -1, 27, 1, 32 }, - { 0x181, 0x181, 223, 2403, -1, 27, 1, 32 }, + { 0x181, 0x181, 223, 2402, -1, 27, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, @@ -4034,126 +4085,126 @@ completer_table[] = { { 0x3, 0x3, 223, -1, -1, 34, 1, 38 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 65 }, { 0x3, 0x3, 223, -1, -1, 34, 1, 32 }, - { 0x3, 0x3, 223, 1888, -1, 34, 1, 32 }, - { 0x3, 0x3, 224, 401, 1210, 32, 1, 128 }, - { 0x3, 0x3, 224, 402, 1219, 32, 1, 128 }, - { 0x3, 0x3, 224, 403, 1228, 32, 1, 128 }, - { 0x3, 0x3, 224, 404, 1239, 32, 1, 128 }, - { 0x3, 0x3, 224, 405, 1248, 32, 1, 128 }, - { 0x3, 0x3, 224, 406, 1257, 32, 1, 128 }, - { 0x3, 0x3, 224, 407, 1266, 32, 1, 128 }, - { 0x3, 0x3, 224, 408, 1275, 32, 1, 128 }, - { 0x3, 0x3, 224, 409, 1284, 32, 1, 128 }, - { 0x3, 0x3, 224, 410, 1293, 32, 1, 128 }, - { 0x3, 0x3, 224, 411, 1303, 32, 1, 128 }, - { 0x3, 0x3, 224, 412, 1313, 32, 1, 128 }, - { 0x3, 0x3, 224, 425, 1326, 32, 1, 143 }, - { 0x3, 0x3, 224, 426, 1332, 32, 1, 143 }, - { 0x3, 0x3, 224, 427, 1338, 32, 1, 143 }, - { 0x3, 0x3, 224, 428, 1344, 32, 1, 143 }, - { 0x3, 0x3, 224, 429, 1350, 32, 1, 143 }, - { 0x3, 0x3, 224, 430, 1356, 32, 1, 143 }, - { 0x3, 0x3, 224, 431, 1362, 32, 1, 143 }, - { 0x3, 0x3, 224, 432, 1368, 32, 1, 143 }, - { 0x3, 0x3, 224, 433, 1374, 32, 1, 143 }, - { 0x3, 0x3, 224, 434, 1380, 32, 1, 143 }, - { 0x3, 0x3, 224, 435, 1386, 32, 1, 143 }, - { 0x3, 0x3, 224, 436, 1392, 32, 1, 143 }, - { 0x3, 0x3, 224, 437, 1398, 32, 1, 143 }, - { 0x3, 0x3, 224, 438, 1404, 32, 1, 143 }, - { 0x3, 0x3, 224, 439, 1410, 32, 1, 143 }, - { 0x3, 0x3, 224, 440, 1416, 32, 1, 143 }, - { 0x3, 0x3, 224, 441, 1422, 32, 1, 143 }, - { 0x3, 0x3, 224, 442, 1428, 32, 1, 143 }, + { 0x3, 0x3, 223, 1887, -1, 34, 1, 32 }, + { 0x3, 0x3, 224, 400, 1209, 32, 1, 128 }, + { 0x3, 0x3, 224, 401, 1218, 32, 1, 128 }, + { 0x3, 0x3, 224, 402, 1227, 32, 1, 128 }, + { 0x3, 0x3, 224, 403, 1238, 32, 1, 128 }, + { 0x3, 0x3, 224, 404, 1247, 32, 1, 128 }, + { 0x3, 0x3, 224, 405, 1256, 32, 1, 128 }, + { 0x3, 0x3, 224, 406, 1265, 32, 1, 128 }, + { 0x3, 0x3, 224, 407, 1274, 32, 1, 128 }, + { 0x3, 0x3, 224, 408, 1283, 32, 1, 128 }, + { 0x3, 0x3, 224, 409, 1292, 32, 1, 128 }, + { 0x3, 0x3, 224, 410, 1302, 32, 1, 128 }, + { 0x3, 0x3, 224, 411, 1312, 32, 1, 128 }, + { 0x3, 0x3, 224, 424, 1325, 32, 1, 143 }, + { 0x3, 0x3, 224, 425, 1331, 32, 1, 148 }, + { 0x3, 0x3, 224, 426, 1337, 32, 1, 148 }, + { 0x3, 0x3, 224, 427, 1343, 32, 1, 143 }, + { 0x3, 0x3, 224, 428, 1349, 32, 1, 148 }, + { 0x3, 0x3, 224, 429, 1355, 32, 1, 148 }, + { 0x3, 0x3, 224, 430, 1361, 32, 1, 143 }, + { 0x3, 0x3, 224, 431, 1367, 32, 1, 148 }, + { 0x3, 0x3, 224, 432, 1373, 32, 1, 148 }, + { 0x3, 0x3, 224, 433, 1379, 32, 1, 143 }, + { 0x3, 0x3, 224, 434, 1385, 32, 1, 148 }, + { 0x3, 0x3, 224, 435, 1391, 32, 1, 143 }, + { 0x3, 0x3, 224, 436, 1397, 32, 1, 148 }, + { 0x3, 0x3, 224, 437, 1403, 32, 1, 143 }, + { 0x3, 0x3, 224, 438, 1409, 32, 1, 148 }, + { 0x3, 0x3, 224, 439, 1415, 32, 1, 143 }, + { 0x3, 0x3, 224, 440, 1421, 32, 1, 148 }, + { 0x3, 0x3, 224, 441, 1427, 32, 1, 148 }, { 0x1, 0x1, 225, -1, -1, 28, 1, 33 }, { 0x1, 0x1, 225, -1, -1, 28, 1, 33 }, - { 0x0, 0x0, 232, 810, -1, 0, 1, 137 }, - { 0x0, 0x0, 232, 811, -1, 0, 1, 150 }, - { 0x1, 0x1, 233, -1, 1725, 33, 1, 133 }, - { 0x1, 0x1, 233, -1, 1728, 33, 1, 139 }, - { 0x0, 0x0, 233, -1, 1730, 0, 1, 145 }, - { 0x0, 0x0, 233, -1, 1731, 0, 1, 145 }, - { 0x0, 0x0, 234, 744, 823, 0, 0, -1 }, - { 0x0, 0x0, 234, 745, 831, 0, 0, -1 }, - { 0x0, 0x0, 234, 746, 827, 0, 0, -1 }, - { 0x1, 0x1, 234, 747, 481, 33, 1, 6 }, - { 0x8000001, 0x8000001, 234, 748, 489, 6, 1, 7 }, - { 0x1, 0x1, 234, 749, 485, 33, 1, 6 }, - { 0x0, 0x0, 234, 750, 835, 0, 0, -1 }, - { 0x1, 0x1, 234, 751, 501, 33, 1, 8 }, - { 0x0, 0x0, 234, 752, 839, 0, 0, -1 }, - { 0x1, 0x1, 234, 753, 513, 33, 1, 15 }, - { 0x0, 0x0, 234, 754, 844, 0, 0, -1 }, - { 0x0, 0x0, 234, 755, 848, 0, 0, -1 }, - { 0x1, 0x1, 234, 756, 536, 33, 1, 17 }, - { 0x1, 0x1, 234, 757, 540, 33, 1, 17 }, - { 0x0, 0x0, 234, 758, 852, 0, 0, -1 }, - { 0x0, 0x0, 234, 759, 856, 0, 0, -1 }, - { 0x1, 0x1, 234, 760, 560, 33, 1, 18 }, - { 0x8000001, 0x8000001, 234, 761, 564, 6, 1, 18 }, - { 0x0, 0x0, 234, 762, 860, 0, 0, -1 }, - { 0x1, 0x1, 234, 763, 576, 33, 1, 19 }, - { 0x0, 0x0, 234, 764, 864, 0, 0, -1 }, - { 0x0, 0x0, 234, 765, 868, 0, 0, -1 }, - { 0x1, 0x1, 234, 766, 596, 33, 1, 20 }, - { 0x8000001, 0x8000001, 234, 767, 600, 6, 1, 20 }, - { 0x0, 0x0, 234, 768, 872, 0, 0, -1 }, - { 0x1, 0x1, 234, 769, 612, 33, 1, 21 }, - { 0x0, 0x0, 234, 770, 877, 0, 0, -1 }, - { 0x0, 0x0, 234, 771, 881, 0, 0, -1 }, - { 0x1, 0x1, 234, 772, 635, 33, 1, 17 }, - { 0x1, 0x1, 234, 773, 639, 33, 1, 17 }, - { 0x0, 0x0, 234, 774, 885, 0, 0, -1 }, - { 0x1, 0x1, 234, 775, 651, 33, 1, 21 }, - { 0x0, 0x0, 235, 2323, 822, 0, 0, -1 }, - { 0x0, 0x0, 235, 2324, 830, 0, 0, -1 }, - { 0x0, 0x0, 235, 2325, 826, 0, 0, -1 }, - { 0x0, 0x0, 235, 2326, 480, 0, 1, 6 }, - { 0x1, 0x1, 235, 2327, 488, 6, 1, 7 }, - { 0x0, 0x0, 235, 2328, 484, 0, 1, 6 }, - { 0x0, 0x0, 235, 2329, 834, 0, 0, -1 }, - { 0x0, 0x0, 235, 2330, 500, 0, 1, 8 }, - { 0x0, 0x0, 235, 2331, 838, 0, 0, -1 }, - { 0x0, 0x0, 235, 2332, 512, 0, 1, 15 }, - { 0x0, 0x0, 235, 2333, 843, 0, 0, -1 }, - { 0x0, 0x0, 235, 2334, 847, 0, 0, -1 }, - { 0x0, 0x0, 235, 2335, 535, 0, 1, 17 }, - { 0x0, 0x0, 235, 2336, 539, 0, 1, 17 }, - { 0x0, 0x0, 235, 2337, 851, 0, 0, -1 }, - { 0x0, 0x0, 235, 2338, 855, 0, 0, -1 }, - { 0x0, 0x0, 235, 2339, 559, 0, 1, 18 }, - { 0x1, 0x1, 235, 2340, 563, 6, 1, 18 }, - { 0x0, 0x0, 235, 2341, 859, 0, 0, -1 }, - { 0x0, 0x0, 235, 2342, 575, 0, 1, 19 }, - { 0x0, 0x0, 235, 2343, 863, 0, 0, -1 }, - { 0x0, 0x0, 235, 2344, 867, 0, 0, -1 }, - { 0x0, 0x0, 235, 2345, 595, 0, 1, 20 }, - { 0x1, 0x1, 235, 2346, 599, 6, 1, 20 }, - { 0x0, 0x0, 235, 2347, 871, 0, 0, -1 }, - { 0x0, 0x0, 235, 2348, 611, 0, 1, 21 }, - { 0x0, 0x0, 235, 2349, 876, 0, 0, -1 }, - { 0x0, 0x0, 235, 2350, 880, 0, 0, -1 }, - { 0x0, 0x0, 235, 2351, 634, 0, 1, 17 }, - { 0x0, 0x0, 235, 2352, 638, 0, 1, 17 }, - { 0x0, 0x0, 235, 2353, 884, 0, 0, -1 }, - { 0x0, 0x0, 235, 2354, 650, 0, 1, 21 }, - { 0x1, 0x1, 235, 776, 973, 27, 1, 16 }, - { 0x0, 0x0, 235, 777, 971, 0, 1, 16 }, - { 0x0, 0x0, 235, 1021, 975, 0, 1, 22 }, - { 0x0, 0x1, 235, 983, 981, 20, 1, 67 }, - { 0x0, 0x0, 235, 110, 979, 0, 1, 67 }, + { 0x0, 0x0, 232, 809, -1, 0, 1, 137 }, + { 0x0, 0x0, 232, 810, -1, 0, 1, 155 }, + { 0x1, 0x1, 233, -1, 1724, 33, 1, 133 }, + { 0x1, 0x1, 233, -1, 1727, 33, 1, 139 }, + { 0x0, 0x0, 233, -1, 1729, 0, 1, 150 }, + { 0x0, 0x0, 233, -1, 1730, 0, 1, 156 }, + { 0x0, 0x0, 234, 743, 822, 0, 0, -1 }, + { 0x0, 0x0, 234, 744, 830, 0, 0, -1 }, + { 0x0, 0x0, 234, 745, 826, 0, 0, -1 }, + { 0x1, 0x1, 234, 746, 480, 33, 1, 6 }, + { 0x8000001, 0x8000001, 234, 747, 488, 6, 1, 7 }, + { 0x1, 0x1, 234, 748, 484, 33, 1, 6 }, + { 0x0, 0x0, 234, 749, 834, 0, 0, -1 }, + { 0x1, 0x1, 234, 750, 500, 33, 1, 8 }, + { 0x0, 0x0, 234, 751, 838, 0, 0, -1 }, + { 0x1, 0x1, 234, 752, 512, 33, 1, 15 }, + { 0x0, 0x0, 234, 753, 843, 0, 0, -1 }, + { 0x0, 0x0, 234, 754, 847, 0, 0, -1 }, + { 0x1, 0x1, 234, 755, 535, 33, 1, 17 }, + { 0x1, 0x1, 234, 756, 539, 33, 1, 17 }, + { 0x0, 0x0, 234, 757, 851, 0, 0, -1 }, + { 0x0, 0x0, 234, 758, 855, 0, 0, -1 }, + { 0x1, 0x1, 234, 759, 559, 33, 1, 18 }, + { 0x8000001, 0x8000001, 234, 760, 563, 6, 1, 18 }, + { 0x0, 0x0, 234, 761, 859, 0, 0, -1 }, + { 0x1, 0x1, 234, 762, 575, 33, 1, 19 }, + { 0x0, 0x0, 234, 763, 863, 0, 0, -1 }, + { 0x0, 0x0, 234, 764, 867, 0, 0, -1 }, + { 0x1, 0x1, 234, 765, 595, 33, 1, 20 }, + { 0x8000001, 0x8000001, 234, 766, 599, 6, 1, 20 }, + { 0x0, 0x0, 234, 767, 871, 0, 0, -1 }, + { 0x1, 0x1, 234, 768, 611, 33, 1, 21 }, + { 0x0, 0x0, 234, 769, 876, 0, 0, -1 }, + { 0x0, 0x0, 234, 770, 880, 0, 0, -1 }, + { 0x1, 0x1, 234, 771, 634, 33, 1, 17 }, + { 0x1, 0x1, 234, 772, 638, 33, 1, 17 }, + { 0x0, 0x0, 234, 773, 884, 0, 0, -1 }, + { 0x1, 0x1, 234, 774, 650, 33, 1, 21 }, + { 0x0, 0x0, 235, 2322, 821, 0, 0, -1 }, + { 0x0, 0x0, 235, 2323, 829, 0, 0, -1 }, + { 0x0, 0x0, 235, 2324, 825, 0, 0, -1 }, + { 0x0, 0x0, 235, 2325, 479, 0, 1, 6 }, + { 0x1, 0x1, 235, 2326, 487, 6, 1, 7 }, + { 0x0, 0x0, 235, 2327, 483, 0, 1, 6 }, + { 0x0, 0x0, 235, 2328, 833, 0, 0, -1 }, + { 0x0, 0x0, 235, 2329, 499, 0, 1, 8 }, + { 0x0, 0x0, 235, 2330, 837, 0, 0, -1 }, + { 0x0, 0x0, 235, 2331, 511, 0, 1, 15 }, + { 0x0, 0x0, 235, 2332, 842, 0, 0, -1 }, + { 0x0, 0x0, 235, 2333, 846, 0, 0, -1 }, + { 0x0, 0x0, 235, 2334, 534, 0, 1, 17 }, + { 0x0, 0x0, 235, 2335, 538, 0, 1, 17 }, + { 0x0, 0x0, 235, 2336, 850, 0, 0, -1 }, + { 0x0, 0x0, 235, 2337, 854, 0, 0, -1 }, + { 0x0, 0x0, 235, 2338, 558, 0, 1, 18 }, + { 0x1, 0x1, 235, 2339, 562, 6, 1, 18 }, + { 0x0, 0x0, 235, 2340, 858, 0, 0, -1 }, + { 0x0, 0x0, 235, 2341, 574, 0, 1, 19 }, + { 0x0, 0x0, 235, 2342, 862, 0, 0, -1 }, + { 0x0, 0x0, 235, 2343, 866, 0, 0, -1 }, + { 0x0, 0x0, 235, 2344, 594, 0, 1, 20 }, + { 0x1, 0x1, 235, 2345, 598, 6, 1, 20 }, + { 0x0, 0x0, 235, 2346, 870, 0, 0, -1 }, + { 0x0, 0x0, 235, 2347, 610, 0, 1, 21 }, + { 0x0, 0x0, 235, 2348, 875, 0, 0, -1 }, + { 0x0, 0x0, 235, 2349, 879, 0, 0, -1 }, + { 0x0, 0x0, 235, 2350, 633, 0, 1, 17 }, + { 0x0, 0x0, 235, 2351, 637, 0, 1, 17 }, + { 0x0, 0x0, 235, 2352, 883, 0, 0, -1 }, + { 0x0, 0x0, 235, 2353, 649, 0, 1, 21 }, + { 0x1, 0x1, 235, 775, 972, 27, 1, 16 }, + { 0x0, 0x0, 235, 776, 970, 0, 1, 16 }, + { 0x0, 0x0, 235, 1020, 974, 0, 1, 22 }, + { 0x0, 0x1, 235, 982, 980, 20, 1, 67 }, + { 0x0, 0x0, 235, 109, 978, 0, 1, 67 }, { 0x1, 0x1, 238, -1, -1, 29, 1, 0 }, { 0x0, 0x0, 238, -1, -1, 0, 1, 0 }, + { 0x1, 0x1, 238, 2494, -1, 27, 1, 0 }, { 0x1, 0x1, 238, 2495, -1, 27, 1, 0 }, { 0x1, 0x1, 238, 2496, -1, 27, 1, 0 }, { 0x1, 0x1, 238, 2497, -1, 27, 1, 0 }, - { 0x1, 0x1, 238, 2498, -1, 27, 1, 0 }, - { 0x0, 0x0, 260, -1, 1952, 0, 0, -1 }, - { 0x0, 0x0, 260, -1, 1954, 0, 0, -1 }, + { 0x0, 0x0, 260, -1, 1951, 0, 0, -1 }, + { 0x0, 0x0, 260, -1, 1953, 0, 0, -1 }, { 0x1, 0x1, 260, -1, -1, 28, 1, 29 }, { 0x1, 0x1, 260, -1, -1, 28, 1, 29 }, - { 0x0, 0x0, 260, -1, 1993, 0, 0, -1 }, - { 0x0, 0x0, 260, -1, 1995, 0, 0, -1 }, + { 0x0, 0x0, 260, -1, 1992, 0, 0, -1 }, + { 0x0, 0x0, 260, -1, 1994, 0, 0, -1 }, { 0x1, 0x1, 260, -1, -1, 28, 1, 29 }, { 0x1, 0x1, 260, -1, -1, 28, 1, 29 }, { 0x0, 0x0, 262, 22, -1, 0, 1, 0 }, @@ -4164,7 +4215,7 @@ completer_table[] = { { 0x0, 0x1, 262, -1, -1, 29, 1, 0 }, { 0x0, 0x1, 262, -1, -1, 29, 1, 0 }, { 0x0, 0x1, 262, -1, -1, 29, 1, 0 }, - { 0x0, 0x0, 262, 178, -1, 0, 1, 0 }, + { 0x0, 0x0, 262, 177, -1, 0, 1, 0 }, { 0x0, 0x1, 262, -1, -1, 29, 1, 0 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 2 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 2 }, @@ -4208,65 +4259,65 @@ completer_table[] = { { 0x1, 0x1, 263, -1, -1, 12, 1, 2 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 64 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 64 }, - { 0x0, 0x0, 263, -1, 1928, 0, 0, -1 }, - { 0x0, 0x0, 263, -1, 1930, 0, 0, -1 }, - { 0x0, 0x0, 263, -1, 1932, 0, 0, -1 }, - { 0x0, 0x0, 263, -1, 1934, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1927, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1929, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1931, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1933, 0, 0, -1 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 49 }, - { 0x0, 0x0, 263, -1, 1936, 0, 0, -1 }, - { 0x0, 0x0, 263, -1, 1938, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1935, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1937, 0, 0, -1 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, - { 0x0, 0x0, 263, -1, 1940, 0, 0, -1 }, - { 0x0, 0x0, 263, -1, 1942, 0, 0, -1 }, - { 0x0, 0x0, 263, -1, 1944, 0, 0, -1 }, - { 0x0, 0x0, 263, -1, 1946, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1939, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1941, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1943, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1945, 0, 0, -1 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 49 }, - { 0x0, 0x0, 263, -1, 1948, 0, 0, -1 }, - { 0x0, 0x0, 263, -1, 1950, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1947, 0, 0, -1 }, + { 0x0, 0x0, 263, -1, 1949, 0, 0, -1 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, { 0x1, 0x1, 263, -1, -1, 12, 1, 59 }, - { 0x1, 0x1, 263, 334, -1, 12, 1, 2 }, - { 0x1, 0x1, 263, 392, -1, 12, 1, 2 }, - { 0x1, 0x1, 263, 338, -1, 12, 1, 2 }, - { 0x1, 0x1, 263, 396, -1, 12, 1, 2 }, - { 0x0, 0x0, 264, -1, 1935, 0, 0, -1 }, - { 0x9, 0x9, 264, -1, 2465, 33, 1, 49 }, - { 0x0, 0x0, 264, 1173, 1984, 0, 0, -1 }, - { 0x3, 0x3, 264, 1174, -1, 27, 1, 49 }, - { 0x0, 0x0, 268, 2392, -1, 0, 1, 0 }, + { 0x1, 0x1, 263, 333, -1, 12, 1, 2 }, + { 0x1, 0x1, 263, 391, -1, 12, 1, 2 }, + { 0x1, 0x1, 263, 337, -1, 12, 1, 2 }, + { 0x1, 0x1, 263, 395, -1, 12, 1, 2 }, + { 0x0, 0x0, 264, -1, 1934, 0, 0, -1 }, + { 0x9, 0x9, 264, -1, 2464, 33, 1, 49 }, + { 0x0, 0x0, 264, 1172, 1983, 0, 0, -1 }, + { 0x3, 0x3, 264, 1173, -1, 27, 1, 49 }, + { 0x0, 0x0, 268, 2391, -1, 0, 1, 0 }, { 0x3, 0x3, 269, -1, -1, 27, 1, 0 }, { 0x3, 0x3, 269, -1, -1, 27, 1, 0 }, { 0x3, 0x3, 269, -1, -1, 27, 1, 0 }, { 0x3, 0x3, 269, -1, -1, 27, 1, 0 }, + { 0x1, 0x1, 270, 2490, -1, 28, 1, 0 }, { 0x1, 0x1, 270, 2491, -1, 28, 1, 0 }, { 0x1, 0x1, 270, 2492, -1, 28, 1, 0 }, { 0x1, 0x1, 270, 2493, -1, 28, 1, 0 }, - { 0x1, 0x1, 270, 2494, -1, 28, 1, 0 }, { 0x1, 0x1, 271, -1, -1, 27, 1, 93 }, { 0x1, 0x1, 271, -1, -1, 27, 1, 93 }, - { 0x0, 0x0, 271, -1, 820, 0, 0, -1 }, - { 0x0, 0x0, 272, 2504, 2369, 0, 0, -1 }, - { 0x0, 0x0, 272, 2505, 2371, 0, 0, -1 }, - { 0x0, 0x0, 273, -1, 2370, 0, 0, -1 }, - { 0x0, 0x0, 273, -1, 2372, 0, 0, -1 }, + { 0x0, 0x0, 271, -1, 819, 0, 0, -1 }, + { 0x0, 0x0, 272, 2503, 2368, 0, 0, -1 }, + { 0x0, 0x0, 272, 2504, 2370, 0, 0, -1 }, + { 0x0, 0x0, 273, -1, 2369, 0, 0, -1 }, + { 0x0, 0x0, 273, -1, 2371, 0, 0, -1 }, { 0x0, 0x0, 274, -1, -1, 0, 1, 40 }, { 0x0, 0x0, 274, -1, -1, 0, 1, 40 }, { 0x0, 0x0, 274, -1, -1, 0, 1, 40 }, { 0x0, 0x0, 279, -1, -1, 0, 1, 33 }, - { 0x0, 0x0, 283, -1, 1958, 0, 1, 29 }, + { 0x0, 0x0, 283, -1, 1957, 0, 1, 29 }, { 0x0, 0x0, 284, -1, -1, 0, 1, 0 }, { 0x0, 0x0, 284, -1, -1, 0, 1, 71 }, - { 0x0, 0x0, 284, 1744, 2482, 0, 1, 1 }, - { 0x0, 0x0, 284, -1, 393, 0, 0, -1 }, - { 0x0, 0x0, 284, 1746, 2484, 0, 1, 1 }, - { 0x0, 0x0, 284, -1, 397, 0, 0, -1 }, + { 0x0, 0x0, 284, 1743, 2481, 0, 1, 1 }, + { 0x0, 0x0, 284, -1, 392, 0, 0, -1 }, + { 0x0, 0x0, 284, 1745, 2483, 0, 1, 1 }, + { 0x0, 0x0, 284, -1, 396, 0, 0, -1 }, }; static const struct ia64_main_table @@ -4284,202 +4335,202 @@ main_table[] = { { 10, 1, 1, 0x0000010160000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 10, }, { 11, 1, 1, 0x0000010068000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 11, }, { 11, 1, 1, 0x0000010168000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 12, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011ffull, { 16, 0, 0, 0, 0 }, 0x40, 821, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x0, 686, }, - { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x40, 687, }, - { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x200, 1866, }, - { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x240, 1867, }, - { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x0, 443, }, - { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x40, 444, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011ffull, { 81, 0, 0, 0, 0 }, 0x40, 842, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x0, 688, }, - { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x40, 689, }, - { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x210, 2502, }, - { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x250, 2503, }, - { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x30, 451, }, - { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x70, 452, }, - { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x230, 449, }, - { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x270, 450, }, - { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 81, 0, 0, 0 }, 0x0, 445, }, - { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 81, 0, 0, 0 }, 0x40, 446, }, - { 15, 4, 0, 0x0000000000000000ull, 0x000001e1f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 398, }, - { 15, 5, 0, 0x0000000000000000ull, 0x000001e3f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 812, }, - { 15, 2, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 65, 0, 0, 0, 0 }, 0x2, 956, }, - { 15, 3, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 1047, }, - { 15, 6, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 69, 0, 0, 0, 0 }, 0x0, 2506, }, + { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011ffull, { 16, 0, 0, 0, 0 }, 0x40, 820, }, + { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x0, 685, }, + { 14, 4, 0, 0x0000000100000000ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x40, 686, }, + { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x200, 1865, }, + { 14, 4, 0, 0x0000000108000100ull, 0x000001eff80011c0ull, { 16, 0, 0, 0, 0 }, 0x240, 1866, }, + { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x0, 442, }, + { 14, 4, 1, 0x0000002100000000ull, 0x000001ef00001000ull, { 15, 16, 0, 0, 0 }, 0x40, 443, }, + { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011ffull, { 81, 0, 0, 0, 0 }, 0x40, 841, }, + { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x0, 687, }, + { 14, 4, 0, 0x0000008000000000ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x40, 688, }, + { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x210, 2501, }, + { 14, 4, 0, 0x0000008000000080ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x250, 2502, }, + { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x30, 450, }, + { 14, 4, 0, 0x0000008000000140ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x70, 451, }, + { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x230, 448, }, + { 14, 4, 0, 0x0000008000000180ull, 0x000001ee000011c0ull, { 81, 0, 0, 0, 0 }, 0x270, 449, }, + { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 81, 0, 0, 0 }, 0x0, 444, }, + { 14, 4, 1, 0x000000a000000000ull, 0x000001ee00001000ull, { 15, 81, 0, 0, 0 }, 0x40, 445, }, + { 15, 4, 0, 0x0000000000000000ull, 0x000001e1f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 397, }, + { 15, 5, 0, 0x0000000000000000ull, 0x000001e3f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 811, }, + { 15, 2, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 65, 0, 0, 0, 0 }, 0x2, 955, }, + { 15, 3, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 1046, }, + { 15, 6, 0, 0x0000000000000000ull, 0x000001eff8000000ull, { 69, 0, 0, 0, 0 }, 0x0, 2505, }, { 15, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 65, 0, 0, 0, 0 }, 0x0, 15, }, - { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011ffull, { 82, 0, 0, 0, 0 }, 0x40, 875, }, - { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x0, 690, }, - { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x40, 691, }, - { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x0, 447, }, - { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x40, 448, }, - { 17, 4, 0, 0x0000004080000000ull, 0x000001e9f8000018ull, { 16, 77, 0, 0, 0 }, 0x20, 2388, }, - { 17, 4, 0, 0x000000e000000000ull, 0x000001e800000018ull, { 81, 77, 0, 0, 0 }, 0x20, 2389, }, - { 18, 4, 0, 0x0000000060000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x2c, 219, }, - { 22, 2, 0, 0x0000000200000000ull, 0x000001ee00000000ull, { 25, 80, 0, 0, 0 }, 0x0, 1871, }, - { 22, 3, 0, 0x0000000800000000ull, 0x000001ee00000000ull, { 24, 81, 0, 0, 0 }, 0x0, 221, }, - { 22, 3, 0, 0x0000000c00000000ull, 0x000001ee00000000ull, { 18, 81, 0, 0, 0 }, 0x0, 222, }, - { 22, 3, 0, 0x0000002200000000ull, 0x000001ee00000000ull, { 25, 80, 0, 0, 0 }, 0x0, 1872, }, - { 22, 3, 0, 0x0000002600000000ull, 0x000001ee00000000ull, { 19, 80, 0, 0, 0 }, 0x0, 1873, }, - { 22, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 25, 80, 0, 0, 0 }, 0x0, 1874, }, + { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011ffull, { 82, 0, 0, 0, 0 }, 0x40, 874, }, + { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x0, 689, }, + { 16, 6, 0, 0x0000018000000000ull, 0x000001ee000011c0ull, { 82, 0, 0, 0, 0 }, 0x40, 690, }, + { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x0, 446, }, + { 16, 6, 1, 0x000001a000000000ull, 0x000001ee00001000ull, { 15, 82, 0, 0, 0 }, 0x40, 447, }, + { 17, 4, 0, 0x0000004080000000ull, 0x000001e9f8000018ull, { 16, 77, 0, 0, 0 }, 0x20, 2387, }, + { 17, 4, 0, 0x000000e000000000ull, 0x000001e800000018ull, { 81, 77, 0, 0, 0 }, 0x20, 2388, }, + { 18, 4, 0, 0x0000000060000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x2c, 218, }, + { 22, 2, 0, 0x0000000200000000ull, 0x000001ee00000000ull, { 25, 80, 0, 0, 0 }, 0x0, 1870, }, + { 22, 3, 0, 0x0000000800000000ull, 0x000001ee00000000ull, { 24, 81, 0, 0, 0 }, 0x0, 220, }, + { 22, 3, 0, 0x0000000c00000000ull, 0x000001ee00000000ull, { 18, 81, 0, 0, 0 }, 0x0, 221, }, + { 22, 3, 0, 0x0000002200000000ull, 0x000001ee00000000ull, { 25, 80, 0, 0, 0 }, 0x0, 1871, }, + { 22, 3, 0, 0x0000002600000000ull, 0x000001ee00000000ull, { 19, 80, 0, 0, 0 }, 0x0, 1872, }, + { 22, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 25, 80, 0, 0, 0 }, 0x0, 1873, }, { 25, 4, 0, 0x0000000020000000ull, 0x000001e1f8000000ull, { 0, 0, 0, 0, 0 }, 0x224, 17, }, - { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x0, 1023, }, - { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 22, 26, 25, 0 }, 0x0, 999, }, - { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 23, 26, 25, 0 }, 0x0, 925, }, - { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x0, 904, }, - { 26, 1, 2, 0x0000018200000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x40, 1157, }, - { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x0, 926, }, - { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 26, 7, 0 }, 0x40, 1025, }, - { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x40, 1002, }, - { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 23, 55, 26, 0 }, 0x0, 1027, }, - { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 23, 57, 26, 0 }, 0x0, 1003, }, - { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 22, 57, 26, 0 }, 0x0, 929, }, - { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 22, 55, 26, 0 }, 0x0, 908, }, - { 26, 1, 2, 0x0000018a00000000ull, 0x000001ee00001000ull, { 22, 23, 55, 26, 0 }, 0x40, 1160, }, - { 26, 1, 2, 0x000001a800000000ull, 0x000001ee00001000ull, { 22, 23, 59, 26, 0 }, 0x0, 1018, }, - { 26, 1, 2, 0x000001a800000000ull, 0x000001ee00001000ull, { 23, 22, 59, 26, 0 }, 0x0, 946, }, - { 26, 1, 2, 0x000001c200000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x40, 1161, }, - { 26, 1, 2, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 22, 7, 26, 0 }, 0x40, 1004, }, - { 26, 1, 2, 0x000001d000000000ull, 0x000001fe00001000ull, { 23, 22, 26, 7, 0 }, 0x40, 910, }, - { 26, 1, 2, 0x000001ca00000000ull, 0x000001ee00001000ull, { 23, 22, 55, 26, 0 }, 0x40, 1162, }, - { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x0, 1030, }, - { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 22, 26, 25, 0 }, 0x0, 1006, }, - { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 22, 23, 26, 25, 0 }, 0x0, 932, }, - { 27, 1, 2, 0x0000018400000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x0, 911, }, - { 27, 1, 2, 0x0000018600000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x40, 1165, }, - { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x0, 933, }, - { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 26, 7, 0 }, 0x40, 1032, }, - { 27, 1, 2, 0x0000019400000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x40, 1009, }, - { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 23, 55, 26, 0 }, 0x0, 1034, }, - { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 22, 23, 57, 26, 0 }, 0x0, 1010, }, - { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 22, 57, 26, 0 }, 0x0, 936, }, - { 27, 1, 2, 0x0000018c00000000ull, 0x000001ee00001000ull, { 23, 22, 55, 26, 0 }, 0x0, 915, }, - { 27, 1, 2, 0x0000018e00000000ull, 0x000001ee00001000ull, { 22, 23, 55, 26, 0 }, 0x40, 1168, }, - { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 22, 23, 56, 26, 0 }, 0x0, 1044, }, - { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 22, 23, 58, 26, 0 }, 0x0, 1020, }, - { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 23, 22, 58, 26, 0 }, 0x0, 948, }, - { 27, 1, 2, 0x000001ac00000000ull, 0x000001ee00001000ull, { 23, 22, 56, 26, 0 }, 0x0, 924, }, - { 27, 1, 2, 0x000001c600000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x40, 1169, }, - { 27, 1, 2, 0x000001d400000000ull, 0x000001fe00001000ull, { 23, 22, 7, 26, 0 }, 0x40, 1011, }, - { 27, 1, 2, 0x000001d400000000ull, 0x000001fe00001000ull, { 23, 22, 26, 7, 0 }, 0x40, 917, }, - { 27, 1, 2, 0x000001ce00000000ull, 0x000001ee00001000ull, { 23, 22, 55, 26, 0 }, 0x40, 1170, }, - { 28, 3, 1, 0x0000008808000000ull, 0x000001fff8000000ull, { 24, 33, 25, 1, 2 }, 0x0, 254, }, - { 29, 3, 1, 0x0000008008000000ull, 0x000001fff8000000ull, { 24, 33, 25, 2, 0 }, 0x0, 255, }, - { 30, 3, 1, 0x0000008048000000ull, 0x000001fff8000000ull, { 24, 33, 25, 2, 0 }, 0x0, 256, }, - { 31, 3, 1, 0x0000008088000000ull, 0x000001fff8000000ull, { 24, 33, 25, 2, 0 }, 0x0, 257, }, - { 32, 3, 1, 0x00000080c8000000ull, 0x000001fff8000000ull, { 24, 33, 25, 2, 0 }, 0x0, 258, }, + { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x0, 1022, }, + { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 22, 26, 25, 0 }, 0x0, 998, }, + { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 22, 23, 26, 25, 0 }, 0x0, 924, }, + { 26, 1, 2, 0x0000018000000000ull, 0x000001fe00001000ull, { 23, 22, 25, 26, 0 }, 0x0, 903, }, + { 26, 1, 2, 0x0000018200000000ull, 0x000001fe00001000ull, { 22, 23, 25, 26, 0 }, 0x40, 1156, }, + { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x0, 925, }, + { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 26, 7, 0 }, 0x40, 1024, }, + { 26, 1, 2, 0x0000019000000000ull, 0x000001fe00001000ull, { 22, 23, 7, 26, 0 }, 0x40, 1001, }, + { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 23, 55, 26, 0 }, 0x0, 1026, }, + { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 22, 23, 57, 26, 0 }, 0x0, 1002, }, + { 26, 1, 2, 0x0000018800000000ull, 0x000001ee00001000ull, { 23, 22, 57, 26, 0 }, 0x0, 928, }, + { 26, 1, 2, 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0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 1840, }, + { 105, 5, 1, 0x00000001e0000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 1839, }, { 106, 3, 0, 0x0000000100000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 65, }, { 108, 5, 1, 0x0000000178000000ull, 0x000001e3f8000000ull, { 18, 19, 20, 0, 0 }, 0x0, 66, }, - { 113, 3, 1, 0x0000008708000000ull, 0x000001ffc8000000ull, { 24, 19, 0, 0, 0 }, 0x0, 2317, }, - { 118, 4, 0, 0x0000004008000000ull, 0x000001e1f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 399, }, - { 118, 5, 0, 0x000000000c000000ull, 0x000001e3fc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 813, }, - { 118, 2, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x2, 959, }, - { 118, 3, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 1050, }, - { 118, 6, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 69, 0, 0, 0, 0 }, 0x0, 2507, }, + { 113, 3, 1, 0x0000008708000000ull, 0x000001ffc8000000ull, { 24, 19, 0, 0, 0 }, 0x0, 2316, }, + { 118, 4, 0, 0x0000004008000000ull, 0x000001e1f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 398, }, + { 118, 5, 0, 0x000000000c000000ull, 0x000001e3fc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 812, }, + { 118, 2, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x2, 958, }, + { 118, 3, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 1049, }, + { 118, 6, 0, 0x000000000c000000ull, 0x000001effc000000ull, { 69, 0, 0, 0, 0 }, 0x0, 2506, }, { 118, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 65, 0, 0, 0, 0 }, 0x0, 67, }, { 123, 3, 0, 0x0000000080000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 68, }, - { 123, 3, 0, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 0, 0, 0, 0 }, 0x0, 781, }, - { 123, 3, 0, 0x0000000098000000ull, 0x000001eff8000000ull, { 18, 0, 0, 0, 0 }, 0x0, 782, }, - { 124, 3, 0, 0x0000002170000000ull, 0x000001eff8000000ull, { 25, 0, 0, 0, 0 }, 0xc, 707, }, - { 125, 3, 1, 0x0000002070000000ull, 0x000001eff8000000ull, { 30, 25, 0, 0, 0 }, 0x8, 708, }, - { 125, 3, 1, 0x0000002078000000ull, 0x000001eff8000000ull, { 31, 25, 0, 0, 0 }, 0x8, 961, }, + { 123, 3, 0, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 0, 0, 0, 0 }, 0x0, 780, }, + { 123, 3, 0, 0x0000000098000000ull, 0x000001eff8000000ull, { 18, 0, 0, 0, 0 }, 0x0, 781, }, + { 124, 3, 0, 0x0000002170000000ull, 0x000001eff8000000ull, { 25, 0, 0, 0, 0 }, 0xc, 706, }, + { 125, 3, 1, 0x0000002070000000ull, 0x000001eff8000000ull, { 30, 25, 0, 0, 0 }, 0x8, 707, }, + { 125, 3, 1, 0x0000002078000000ull, 0x000001eff8000000ull, { 31, 25, 0, 0, 0 }, 0x8, 960, }, { 127, 3, 1, 0x0000008000000000ull, 0x000001fff8000000ull, { 24, 33, 0, 0, 0 }, 0x0, 69, }, { 127, 3, 1, 0x0000009000000000ull, 0x000001fff8000000ull, { 24, 33, 25, 0, 0 }, 0x400, 70, }, { 127, 3, 1, 0x000000a000000000ull, 0x000001eff0000000ull, { 24, 33, 62, 0, 0 }, 0x400, 71, }, @@ -4491,12 +4542,12 @@ main_table[] = { { 130, 3, 1, 0x0000009080000000ull, 0x000001fff8000000ull, { 24, 33, 25, 0, 0 }, 0x400, 77, }, { 130, 3, 1, 0x000000a080000000ull, 0x000001eff0000000ull, { 24, 33, 62, 0, 0 }, 0x400, 78, }, { 131, 3, 1, 0x00000080c0000000ull, 0x000001fff8000000ull, { 24, 33, 0, 0, 0 }, 0x0, 79, }, - { 131, 3, 1, 0x00000080c0000000ull, 0x000001fff8000000ull, { 24, 33, 83, 0, 0 }, 0x0, 1122, }, + { 131, 3, 1, 0x00000080c0000000ull, 0x000001fff8000000ull, { 24, 33, 83, 0, 0 }, 0x0, 1121, }, { 131, 3, 1, 0x00000090c0000000ull, 0x000001fff8000000ull, { 24, 33, 25, 0, 0 }, 0x400, 80, }, { 131, 3, 1, 0x000000a0c0000000ull, 0x000001eff0000000ull, { 24, 33, 62, 0, 0 }, 0x400, 81, }, - { 132, 3, 1, 0x000000c6c0000000ull, 0x000001fff8000000ull, { 18, 33, 0, 0, 0 }, 0x0, 891, }, - { 132, 3, 1, 0x000000d6c0000000ull, 0x000001fff8000000ull, { 18, 33, 25, 0, 0 }, 0x400, 892, }, - { 132, 3, 1, 0x000000e6c0000000ull, 0x000001eff0000000ull, { 18, 33, 62, 0, 0 }, 0x400, 893, }, + { 132, 3, 1, 0x000000c6c0000000ull, 0x000001fff8000000ull, { 18, 33, 0, 0, 0 }, 0x0, 890, }, + { 132, 3, 1, 0x000000d6c0000000ull, 0x000001fff8000000ull, { 18, 33, 25, 0, 0 }, 0x400, 891, }, + { 132, 3, 1, 0x000000e6c0000000ull, 0x000001eff0000000ull, { 18, 33, 62, 0, 0 }, 0x400, 892, }, { 133, 3, 1, 0x000000c040000000ull, 0x000001fff8000000ull, { 18, 33, 0, 0, 0 }, 0x0, 82, }, { 133, 3, 1, 0x000000d040000000ull, 0x000001fff8000000ull, { 18, 33, 25, 0, 0 }, 0x400, 83, }, { 133, 3, 1, 0x000000e040000000ull, 0x000001eff0000000ull, { 18, 33, 62, 0, 0 }, 0x400, 84, }, @@ -4520,164 +4571,163 @@ main_table[] = { { 142, 3, 0, 0x000000eb00000000ull, 0x000001eff0000000ull, { 33, 62, 0, 0, 0 }, 0x400, 102, }, { 143, 3, 0, 0x0000000050000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x21, 103, }, { 151, 3, 0, 0x0000000110000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 104, }, - { 152, 2, 1, 0x000000e880000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1841, }, - { 153, 2, 1, 0x000000ea80000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1842, }, - { 154, 2, 1, 0x000000f880000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1843, }, + { 152, 2, 1, 0x000000e880000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1840, }, + { 153, 2, 1, 0x000000ea80000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1841, }, + { 154, 2, 1, 0x000000f880000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1842, }, { 155, 1, 1, 0x0000010800000000ull, 0x000001fff80fe000ull, { 24, 26, 0, 0, 0 }, 0x0, 105, }, - { 155, 1, 1, 0x0000010800000000ull, 0x000001ee07f00000ull, { 24, 63, 0, 0, 0 }, 0x40, 106, }, - { 155, 1, 1, 0x0000012000000000ull, 0x000001e000300000ull, { 24, 66, 0, 0, 0 }, 0x40, 107, }, - { 155, 5, 1, 0x0000000080000000ull, 0x000001e3f8000000ull, { 18, 20, 0, 0, 0 }, 0xc0, 108, }, - { 155, 2, 1, 0x0000000e00100000ull, 0x000001ee00f00000ull, { 15, 25, 0, 0, 0 }, 0x40, 109, }, - { 155, 2, 1, 0x0000000e00000000ull, 0x000001ee00f00000ull, { 15, 25, 78, 0, 0 }, 0x0, 2391, }, - { 155, 2, 1, 0x0000000188000000ull, 0x000001eff8000000ull, { 24, 16, 0, 0, 0 }, 0x0, 111, }, - { 155, 2, 1, 0x0000000600000000ull, 0x000001ee00000000ull, { 9, 25, 64, 0, 0 }, 0x0, 112, }, - { 155, 2, 1, 0x0000000400000000ull, 0x000001ee00000000ull, { 10, 68, 0, 0, 0 }, 0x0, 113, }, - { 155, 2, 1, 0x0000000180000000ull, 0x000001eff8000000ull, { 24, 8, 0, 0, 0 }, 0x0, 114, }, - { 155, 2, 1, 0x0000000198000000ull, 0x000001eff8000000ull, { 24, 9, 0, 0, 0 }, 0x0, 115, }, - { 155, 2, 1, 0x0000000150000000ull, 0x000001eff8000000ull, { 14, 25, 0, 0, 0 }, 0x0, 962, }, - { 155, 2, 1, 0x0000000050000000ull, 0x000001eff8000000ull, { 14, 55, 0, 0, 0 }, 0x0, 963, }, - { 155, 2, 1, 0x0000000190000000ull, 0x000001eff8000000ull, { 24, 14, 0, 0, 0 }, 0x0, 964, }, - { 155, 3, 1, 0x0000000140000000ull, 0x000001eff8000000ull, { 14, 55, 0, 0, 0 }, 0x0, 1051, }, - { 155, 3, 1, 0x0000002150000000ull, 0x000001eff8000000ull, { 14, 25, 0, 0, 0 }, 0x0, 1052, }, - { 155, 3, 1, 0x0000002110000000ull, 0x000001eff8000000ull, { 24, 14, 0, 0, 0 }, 0x0, 1053, }, - { 155, 3, 1, 0x0000002160000000ull, 0x000001eff8000000ull, { 17, 25, 0, 0, 0 }, 0x8, 116, }, - { 155, 3, 1, 0x0000002120000000ull, 0x000001eff8000000ull, { 24, 17, 0, 0, 0 }, 0x8, 117, }, - { 155, 3, 1, 0x0000002168000000ull, 0x000001eff8000000ull, { 12, 25, 0, 0, 0 }, 0x8, 118, }, - { 155, 3, 1, 0x0000002148000000ull, 0x000001eff8000000ull, { 13, 25, 0, 0, 0 }, 0x0, 119, }, - { 155, 3, 1, 0x0000002128000000ull, 0x000001eff8000000ull, { 24, 11, 0, 0, 0 }, 0x8, 120, }, - { 155, 3, 1, 0x0000002108000000ull, 0x000001eff8000000ull, { 24, 13, 0, 0, 0 }, 0x0, 121, }, - { 155, 3, 1, 0x0000002000000000ull, 0x000001eff8000000ull, { 38, 25, 0, 0, 0 }, 0x8, 122, }, - { 155, 3, 1, 0x0000002008000000ull, 0x000001eff8000000ull, { 29, 25, 0, 0, 0 }, 0x8, 123, }, - { 155, 3, 1, 0x0000002010000000ull, 0x000001eff8000000ull, { 32, 25, 0, 0, 0 }, 0x8, 124, }, - { 155, 3, 1, 0x0000002018000000ull, 0x000001eff8000000ull, { 35, 25, 0, 0, 0 }, 0x8, 125, }, - { 155, 3, 1, 0x0000002020000000ull, 0x000001eff8000000ull, { 36, 25, 0, 0, 0 }, 0x8, 126, }, - { 155, 3, 1, 0x0000002028000000ull, 0x000001eff8000000ull, { 37, 25, 0, 0, 0 }, 0x8, 127, }, - { 155, 3, 1, 0x0000002030000000ull, 0x000001eff8000000ull, { 34, 25, 0, 0, 0 }, 0x8, 128, }, - { 155, 3, 1, 0x0000002080000000ull, 0x000001eff8000000ull, { 24, 38, 0, 0, 0 }, 0x8, 129, }, - { 155, 3, 1, 0x0000002088000000ull, 0x000001eff8000000ull, { 24, 29, 0, 0, 0 }, 0x8, 130, }, - { 155, 3, 1, 0x0000002090000000ull, 0x000001eff8000000ull, { 24, 32, 0, 0, 0 }, 0x8, 131, }, - { 155, 3, 1, 0x0000002098000000ull, 0x000001eff8000000ull, { 24, 35, 0, 0, 0 }, 0x8, 132, }, - { 155, 3, 1, 0x00000020a0000000ull, 0x000001eff8000000ull, { 24, 36, 0, 0, 0 }, 0x8, 133, }, - { 155, 3, 1, 0x00000020a8000000ull, 0x000001eff8000000ull, { 24, 37, 0, 0, 0 }, 0x0, 134, }, - { 155, 3, 1, 0x00000020b0000000ull, 0x000001eff8000000ull, { 24, 34, 0, 0, 0 }, 0x8, 135, }, - { 155, 3, 1, 0x00000020b8000000ull, 0x000001eff8000000ull, { 24, 28, 0, 0, 0 }, 0x0, 136, }, - { 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 24, 14, 0, 0, 0 }, 0x0, 137, }, - { 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 14, 55, 0, 0, 0 }, 0x0, 138, }, - { 155, 7, 1, 0x0000000000000000ull, 0x0000000000000000ull, { 14, 25, 0, 0, 0 }, 0x0, 139, }, - { 156, 6, 1, 0x000000c000000000ull, 0x000001e000100000ull, { 24, 70, 0, 0, 0 }, 0x0, 140, }, - { 157, 2, 1, 0x000000eca0000000ull, 0x000001fff0000000ull, { 24, 25, 74, 0, 0 }, 0x0, 141, }, - { 158, 2, 1, 0x000000eea0000000ull, 0x000001fff0000000ull, { 24, 25, 75, 0, 0 }, 0x0, 142, }, - { 168, 4, 0, 0x0000004000000000ull, 0x000001e1f8000000ull, { 65, 0, 0, 0, 0 }, 0x0, 400, }, - { 168, 5, 0, 0x0000000008000000ull, 0x000001e3fc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 814, }, - { 168, 2, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x2, 965, }, - { 168, 3, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 65, 0, 0, 0, 0 }, 0x0, 1054, }, - { 168, 6, 0, 0x0000000008000000ull, 0x000001effc000000ull, { 69, 0, 0, 0, 0 }, 0x0, 2508, }, - { 168, 7, 0, 0x0000000000000000ull, 0x0000000000000000ull, { 65, 0, 0, 0, 0 }, 0x0, 143, }, - { 175, 1, 1, 0x0000010070000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 144, }, - { 175, 1, 1, 0x0000010170000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 145, }, - { 178, 2, 1, 0x000000ea00000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2490, }, - { 179, 2, 1, 0x000000f820000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2393, }, - { 180, 1, 1, 0x0000010400000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 146, }, - { 181, 1, 1, 0x0000010600000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 147, }, - { 182, 1, 1, 0x0000011400000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 148, }, - { 183, 1, 1, 0x0000010450000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 149, }, - { 184, 1, 1, 0x0000010650000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 150, }, - { 185, 1, 1, 0x0000010470000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 151, }, - { 186, 1, 1, 0x0000010670000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 152, }, - { 187, 1, 1, 0x0000010520000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 800, }, - { 188, 1, 1, 0x0000010720000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 801, }, - { 189, 1, 1, 0x0000011520000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 802, }, - { 190, 2, 1, 0x000000e850000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2407, }, - { 191, 2, 1, 0x000000ea70000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 153, }, - { 192, 2, 1, 0x000000e810000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 2408, }, - { 193, 2, 1, 0x000000ea30000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 154, }, - { 194, 2, 1, 0x000000ead0000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 1844, }, - { 195, 2, 1, 0x000000e230000000ull, 0x000001ff30000000ull, { 24, 25, 26, 42, 0 }, 0x0, 155, }, - { 196, 2, 1, 0x000000e690000000ull, 0x000001fff0000000ull, { 24, 26, 0, 0, 0 }, 0x0, 156, }, - { 198, 3, 1, 0x00000021c0000000ull, 0x000001eff8000000ull, { 24, 26, 25, 0, 0 }, 0x0, 1845, }, - { 198, 3, 1, 0x00000020c0000000ull, 0x000001eff8000000ull, { 24, 26, 49, 0, 0 }, 0x0, 1846, }, - { 198, 3, 0, 0x0000002188000000ull, 0x000001eff8000000ull, { 26, 49, 0, 0, 0 }, 0x0, 1870, }, - { 199, 2, 1, 0x000000e8b0000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 157, }, - { 200, 2, 1, 0x000000e240000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 158, }, - { 200, 2, 1, 0x000000ee50000000ull, 0x000001fff0000000ull, { 24, 25, 39, 0, 0 }, 0x0, 159, }, - { 201, 2, 1, 0x000000f040000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 160, }, - { 201, 2, 1, 0x000000fc50000000ull, 0x000001fff0000000ull, { 24, 25, 39, 0, 0 }, 0x0, 161, }, - { 202, 1, 1, 0x0000010680000000ull, 0x000001ffe0000000ull, { 24, 25, 41, 26, 0 }, 0x0, 162, }, - { 203, 2, 1, 0x000000e220000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 163, }, - { 203, 2, 1, 0x000000e630000000ull, 0x000001fff0000000ull, { 24, 26, 43, 0, 0 }, 0x0, 164, }, - { 204, 2, 1, 0x000000f020000000ull, 0x000001fff0000000ull, { 24, 26, 25, 0, 0 }, 0x0, 165, }, - { 204, 2, 1, 0x000000f430000000ull, 0x000001fff0000000ull, { 24, 26, 43, 0, 0 }, 0x0, 166, }, - { 205, 1, 1, 0x00000106c0000000ull, 0x000001ffe0000000ull, { 24, 25, 41, 26, 0 }, 0x0, 167, }, - { 206, 1, 1, 0x0000010420000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 168, }, - { 207, 1, 1, 0x0000010620000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 169, }, - { 208, 1, 1, 0x0000011420000000ull, 0x000001fff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 170, }, - { 209, 3, 0, 0x0000002048000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 0 }, 0x8, 993, }, - { 209, 3, 0, 0x0000002050000000ull, 0x000001eff8000000ull, { 26, 25, 0, 0, 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0x000001eff0000000ull, { 33, 19, 61, 0, 0 }, 0x400, 197, }, + { 249, 1, 1, 0x0000010028000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 198, }, + { 249, 1, 1, 0x0000010020000000ull, 0x000001eff8000000ull, { 24, 25, 26, 4, 0 }, 0x0, 199, }, + { 249, 1, 1, 0x0000010128000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 200, }, + { 250, 3, 0, 0x0000000020000000ull, 0x000001ee78000000ull, { 67, 0, 0, 0, 0 }, 0x0, 201, }, + { 251, 2, 1, 0x00000000a0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 202, }, + { 252, 2, 1, 0x00000000a8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 203, }, + { 253, 2, 1, 0x00000000b0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 204, }, + { 254, 3, 0, 0x0000000198000000ull, 0x000001eff8000000ull, { 0, 0, 0, 0, 0 }, 0x0, 967, }, + { 255, 3, 1, 0x00000020f8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 205, }, + { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 22, 23, 26, 76, 0 }, 0x0, 2512, }, + { 256, 2, 2, 0x000000a000000000ull, 0x000001fe00003000ull, { 23, 22, 26, 76, 0 }, 0x40, 1744, }, + { 257, 3, 1, 0x00000020d0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 206, }, + { 258, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 22, 23, 26, 0, 0 }, 0x0, 2514, }, + { 258, 2, 2, 0x000000a000002000ull, 0x000001fe00003000ull, { 23, 22, 26, 0, 0 }, 0x40, 1746, }, + { 259, 3, 1, 0x00000020f0000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x8, 207, }, + { 261, 3, 1, 0x00000020d8000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 208, }, + { 265, 2, 1, 0x000000e840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 948, }, + { 266, 2, 1, 0x000000ea40000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 949, }, + { 267, 2, 1, 0x000000f840000000ull, 0x000001fff0000000ull, { 24, 25, 26, 0, 0 }, 0x0, 950, }, + { 275, 3, 1, 0x0000008208000000ull, 0x000001fff8000000ull, { 24, 33, 25, 0, 0 }, 0x0, 209, }, + { 276, 3, 1, 0x0000008248000000ull, 0x000001fff8000000ull, { 24, 33, 25, 0, 0 }, 0x0, 210, }, + { 277, 3, 1, 0x0000008288000000ull, 0x000001fff8000000ull, { 24, 33, 25, 0, 0 }, 0x0, 211, }, + { 278, 3, 1, 0x00000082c8000000ull, 0x000001fff8000000ull, { 24, 33, 25, 0, 0 }, 0x0, 212, }, + { 280, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x0, 996, }, + { 280, 5, 1, 0x000001d000000000ull, 0x000001fc00000000ull, { 18, 20, 21, 19, 0 }, 0x40, 1044, }, + { 281, 5, 1, 0x000001d000000000ull, 0x000001fc000fe000ull, { 18, 20, 21, 0, 0 }, 0x40, 997, }, + { 282, 1, 1, 0x0000010078000000ull, 0x000001eff8000000ull, { 24, 25, 26, 0, 0 }, 0x0, 213, }, + { 282, 1, 1, 0x0000010178000000ull, 0x000001eff8000000ull, { 24, 55, 26, 0, 0 }, 0x0, 214, }, + { 285, 2, 1, 0x0000000080000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 215, }, + { 286, 2, 1, 0x0000000088000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 216, }, + { 287, 2, 1, 0x0000000090000000ull, 0x000001eff8000000ull, { 24, 26, 0, 0, 0 }, 0x0, 217, }, }; static const char dis_table[] = { @@ -5206,7 +5256,7 @@ static const char dis_table[] = { 0xd8, 0x90, 0x28, 0x80, 0x30, 0x5a, 0x24, 0x02, 0xc8, 0x80, 0x10, 0x10, 0x10, 0x10, 0x90, 0x28, 0x80, 0x30, 0x53, 0x24, 0x02, 0xa0, 0xd7, 0x42, 0x00, 0xa4, 0x32, 0x30, 0x36, 0x48, 0xa4, 0x32, 0x10, 0x36, 0x44, 0xa0, -0x14, 0x90, 0xa0, 0x10, 0xb8, 0xa0, 0x0c, 0x88, 0x9e, 0x88, 0x09, 0xd0, +0x14, 0x68, 0xa0, 0x10, 0x90, 0xa0, 0x0c, 0x60, 0x9e, 0x88, 0x09, 0xd0, 0x94, 0xf0, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x31, 0xc0, 0x85, 0x34, 0xe3, 0xcb, 0x61, 0x2a, 0x80, 0x85, 0x34, 0xb9, 0x9a, 0x00, 0x03, 0xf8, 0x91, 0x98, 0x80, 0x91, 0x10, 0x90, 0xa0, 0x90, @@ -5221,7 +5271,7 @@ static const char dis_table[] = { 0x38, 0x95, 0x90, 0x28, 0x80, 0x38, 0x8e, 0x80, 0x38, 0x8d, 0x81, 0x10, 0x10, 0x80, 0xa4, 0x44, 0x88, 0x38, 0x92, 0xcb, 0x61, 0x2a, 0x40, 0x85, 0x34, 0xb8, 0x90, 0xd8, 0x88, 0x00, 0x90, 0x84, 0x90, 0x38, 0xc1, 0xc0, -0x85, 0x38, 0xb1, 0xc9, 0xe1, 0x31, 0x80, 0x85, 0x34, 0xdf, 0xcb, 0x61, +0x85, 0x38, 0xb0, 0xc9, 0xe1, 0x31, 0x80, 0x85, 0x34, 0xdf, 0xcb, 0x61, 0x2a, 0x00, 0x85, 0x34, 0xb7, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x31, 0x40, 0x85, 0x34, 0xdd, 0xcb, 0x61, 0x29, 0xc0, 0x85, 0x34, 0xb6, 0x91, 0xf8, 0x90, 0xb0, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, @@ -5233,86 +5283,85 @@ static const char dis_table[] = { 0xc9, 0xe1, 0x30, 0x40, 0x85, 0x34, 0xd5, 0xcb, 0x61, 0x28, 0xc0, 0x85, 0x34, 0xb2, 0x88, 0x00, 0x68, 0x84, 0x10, 0x10, 0xc9, 0xe1, 0x30, 0x00, 0x85, 0x34, 0xd3, 0xcb, 0x61, 0x28, 0x80, 0x85, 0x34, 0xb1, 0x92, 0x38, -0x81, 0x91, 0x68, 0x91, 0x18, 0x90, 0x80, 0x90, 0x40, 0x80, 0xa4, 0x46, -0x00, 0x38, 0xc1, 0x80, 0xa4, 0x45, 0xf8, 0x38, 0xbe, 0x90, 0x28, 0x81, -0x38, 0xbd, 0x90, 0x38, 0xa4, 0x45, 0xd8, 0x38, 0xbc, 0xa4, 0x45, 0xc8, -0x38, 0xba, 0x90, 0x28, 0x80, 0x38, 0xb8, 0x80, 0x38, 0xb7, 0x80, 0x90, -0x40, 0x10, 0x10, 0x80, 0x24, 0x45, 0xb0, 0x10, 0x10, 0x90, 0x38, 0xa4, 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0x10, 0x90, 0x80, 0x90, 0x40, 0xe5, 0x21, 0xf6, 0x40, 0x37, +0xd7, 0xe5, 0x21, 0xf4, 0xc0, 0x37, 0xdf, 0x90, 0x40, 0xe5, 0x21, 0xec, +0xc0, 0x37, 0xb1, 0xe5, 0x21, 0xeb, 0x40, 0x37, 0xb9, }; static const struct ia64_dis_names ia64_dis_names[] = { @@ -5382,7 +5431,7 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x2, 37, 0, 85 }, { 0x3, 37, 1, 84 }, { 0x4, 37, 0, 83 }, -{ 0x1, 293, 0, 87 }, +{ 0x1, 292, 0, 87 }, { 0x20, 246, 0, 98 }, { 0x220, 246, 0, 94 }, { 0x1220, 246, 0, 91 }, @@ -5399,16 +5448,16 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x4, 246, 0, 104 }, { 0x2, 246, 0, 105 }, { 0x1, 246, 0, 106 }, -{ 0x1, 367, 0, 108 }, -{ 0x3, 367, 0, 107 }, -{ 0x2, 373, 0, 109 }, -{ 0x1, 373, 0, 110 }, -{ 0x2, 369, 0, 111 }, -{ 0x1, 369, 0, 112 }, -{ 0x2, 371, 0, 113 }, -{ 0x1, 371, 0, 114 }, -{ 0x2, 375, 0, 115 }, -{ 0x1, 375, 0, 116 }, +{ 0x1, 366, 0, 108 }, +{ 0x3, 366, 0, 107 }, +{ 0x2, 372, 0, 109 }, +{ 0x1, 372, 0, 110 }, +{ 0x2, 368, 0, 111 }, +{ 0x1, 368, 0, 112 }, +{ 0x2, 370, 0, 113 }, +{ 0x1, 370, 0, 114 }, +{ 0x2, 374, 0, 115 }, +{ 0x1, 374, 0, 116 }, { 0x1, 225, 0, 143 }, { 0x5, 225, 0, 141 }, { 0x3, 225, 0, 142 }, @@ -5484,10 +5533,10 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x4, 243, 0, 189 }, { 0x2, 243, 0, 190 }, { 0x1, 243, 0, 191 }, -{ 0x8, 347, 0, 192 }, -{ 0x4, 347, 0, 193 }, -{ 0x2, 347, 0, 194 }, -{ 0x1, 347, 0, 195 }, +{ 0x8, 346, 0, 192 }, +{ 0x4, 346, 0, 193 }, +{ 0x2, 346, 0, 194 }, +{ 0x1, 346, 0, 195 }, { 0x20, 245, 0, 203 }, { 0x220, 245, 0, 199 }, { 0x1220, 245, 0, 196 }, @@ -5628,16 +5677,16 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x4, 239, 0, 333 }, { 0x2, 239, 0, 334 }, { 0x1, 239, 0, 335 }, -{ 0x1, 366, 0, 337 }, -{ 0x3, 366, 0, 336 }, -{ 0x2, 372, 0, 338 }, -{ 0x1, 372, 0, 339 }, -{ 0x2, 368, 0, 340 }, -{ 0x1, 368, 0, 341 }, -{ 0x2, 370, 0, 342 }, -{ 0x1, 370, 0, 343 }, -{ 0x2, 374, 0, 344 }, -{ 0x1, 374, 0, 345 }, +{ 0x1, 365, 0, 337 }, +{ 0x3, 365, 0, 336 }, +{ 0x2, 371, 0, 338 }, +{ 0x1, 371, 0, 339 }, +{ 0x2, 367, 0, 340 }, +{ 0x1, 367, 0, 341 }, +{ 0x2, 369, 0, 342 }, +{ 0x1, 369, 0, 343 }, +{ 0x2, 373, 0, 344 }, +{ 0x1, 373, 0, 345 }, { 0x1, 224, 0, 372 }, { 0x5, 224, 0, 370 }, { 0x3, 224, 0, 371 }, @@ -5788,24 +5837,24 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x4, 241, 0, 493 }, { 0x2, 241, 0, 494 }, { 0x1, 241, 0, 495 }, -{ 0x8, 365, 0, 497 }, -{ 0x18, 365, 0, 496 }, -{ 0x4, 365, 0, 499 }, -{ 0xc, 365, 0, 498 }, -{ 0x2, 365, 0, 506 }, -{ 0x1, 365, 0, 507 }, -{ 0x4, 363, 0, 501 }, -{ 0xc, 363, 0, 500 }, -{ 0x2, 363, 0, 508 }, -{ 0x1, 363, 0, 509 }, -{ 0x4, 361, 0, 503 }, -{ 0xc, 361, 0, 502 }, -{ 0x2, 361, 0, 510 }, -{ 0x1, 361, 0, 511 }, -{ 0x4, 358, 0, 505 }, -{ 0xc, 358, 0, 504 }, -{ 0x2, 358, 0, 512 }, -{ 0x1, 358, 0, 513 }, +{ 0x8, 364, 0, 497 }, +{ 0x18, 364, 0, 496 }, +{ 0x4, 364, 0, 499 }, +{ 0xc, 364, 0, 498 }, +{ 0x2, 364, 0, 506 }, +{ 0x1, 364, 0, 507 }, +{ 0x4, 362, 0, 501 }, +{ 0xc, 362, 0, 500 }, +{ 0x2, 362, 0, 508 }, +{ 0x1, 362, 0, 509 }, +{ 0x4, 360, 0, 503 }, +{ 0xc, 360, 0, 502 }, +{ 0x2, 360, 0, 510 }, +{ 0x1, 360, 0, 511 }, +{ 0x4, 357, 0, 505 }, +{ 0xc, 357, 0, 504 }, +{ 0x2, 357, 0, 512 }, +{ 0x1, 357, 0, 513 }, { 0xa00, 222, 0, 528 }, { 0x2a00, 222, 0, 526 }, { 0x1a00, 222, 0, 527 }, @@ -5933,18 +5982,18 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x1, 133, 0, 640 }, { 0x5, 133, 0, 638 }, { 0x3, 133, 0, 639 }, -{ 0x4, 398, 0, 641 }, -{ 0x2, 398, 0, 642 }, -{ 0x1, 398, 0, 643 }, -{ 0x4, 397, 0, 644 }, -{ 0x2, 397, 0, 645 }, -{ 0x1, 397, 0, 646 }, -{ 0x4, 396, 0, 647 }, -{ 0x2, 396, 0, 648 }, -{ 0x1, 396, 0, 649 }, -{ 0x4, 395, 0, 650 }, -{ 0x2, 395, 0, 651 }, -{ 0x1, 395, 0, 652 }, +{ 0x4, 397, 0, 641 }, +{ 0x2, 397, 0, 642 }, +{ 0x1, 397, 0, 643 }, +{ 0x4, 396, 0, 644 }, +{ 0x2, 396, 0, 645 }, +{ 0x1, 396, 0, 646 }, +{ 0x4, 395, 0, 647 }, +{ 0x2, 395, 0, 648 }, +{ 0x1, 395, 0, 649 }, +{ 0x4, 394, 0, 650 }, +{ 0x2, 394, 0, 651 }, +{ 0x1, 394, 0, 652 }, { 0x2, 92, 0, 655 }, { 0xa, 92, 0, 653 }, { 0x6, 92, 0, 654 }, @@ -5975,28 +6024,28 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x1, 93, 0, 682 }, { 0x5, 93, 0, 680 }, { 0x3, 93, 0, 681 }, -{ 0x4, 359, 0, 686 }, -{ 0xc, 359, 0, 685 }, -{ 0x2, 359, 0, 695 }, -{ 0x1, 359, 0, 696 }, -{ 0x8, 364, 0, 684 }, -{ 0x18, 364, 0, 683 }, -{ 0x4, 364, 0, 688 }, -{ 0xc, 364, 0, 687 }, -{ 0x2, 364, 0, 697 }, -{ 0x1, 364, 0, 698 }, -{ 0x4, 362, 0, 690 }, -{ 0xc, 362, 0, 689 }, -{ 0x2, 362, 0, 699 }, -{ 0x1, 362, 0, 700 }, -{ 0x4, 360, 0, 692 }, -{ 0xc, 360, 0, 691 }, -{ 0x2, 360, 0, 701 }, -{ 0x1, 360, 0, 702 }, -{ 0x4, 357, 0, 694 }, -{ 0xc, 357, 0, 693 }, -{ 0x2, 357, 0, 703 }, -{ 0x1, 357, 0, 704 }, +{ 0x4, 358, 0, 686 }, +{ 0xc, 358, 0, 685 }, +{ 0x2, 358, 0, 695 }, +{ 0x1, 358, 0, 696 }, +{ 0x8, 363, 0, 684 }, +{ 0x18, 363, 0, 683 }, +{ 0x4, 363, 0, 688 }, +{ 0xc, 363, 0, 687 }, +{ 0x2, 363, 0, 697 }, +{ 0x1, 363, 0, 698 }, +{ 0x4, 361, 0, 690 }, +{ 0xc, 361, 0, 689 }, +{ 0x2, 361, 0, 699 }, +{ 0x1, 361, 0, 700 }, +{ 0x4, 359, 0, 692 }, +{ 0xc, 359, 0, 691 }, +{ 0x2, 359, 0, 701 }, +{ 0x1, 359, 0, 702 }, +{ 0x4, 356, 0, 694 }, +{ 0xc, 356, 0, 693 }, +{ 0x2, 356, 0, 703 }, +{ 0x1, 356, 0, 704 }, { 0xa00, 221, 0, 719 }, { 0x2a00, 221, 0, 717 }, { 0x1a00, 221, 0, 718 }, @@ -6230,44 +6279,44 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x1, 114, 0, 936 }, { 0x1, 49, 0, 937 }, { 0x3, 48, 0, 938 }, -{ 0x1, 384, 0, 939 }, -{ 0x1, 390, 0, 940 }, -{ 0x2, 343, 0, 943 }, -{ 0x1, 343, 0, 944 }, -{ 0x2, 341, 0, 945 }, -{ 0x1, 341, 0, 946 }, -{ 0x1, 340, 0, 947 }, -{ 0x1, 285, 0, 952 }, -{ 0x1, 284, 0, 953 }, -{ 0x1, 283, 0, 954 }, -{ 0x1, 282, 0, 955 }, +{ 0x1, 383, 0, 939 }, +{ 0x1, 389, 0, 940 }, +{ 0x2, 342, 0, 943 }, +{ 0x1, 342, 0, 944 }, +{ 0x2, 340, 0, 945 }, +{ 0x1, 340, 0, 946 }, +{ 0x1, 339, 0, 947 }, +{ 0x1, 284, 0, 952 }, +{ 0x1, 283, 0, 953 }, +{ 0x1, 282, 0, 954 }, +{ 0x1, 281, 0, 955 }, { 0x1, 208, 0, 956 }, { 0x1, 207, 0, 957 }, -{ 0x1, 281, 0, 958 }, -{ 0x1, 280, 0, 959 }, -{ 0x1, 279, 0, 960 }, -{ 0x1, 278, 0, 961 }, -{ 0x1, 277, 0, 962 }, -{ 0x1, 276, 0, 963 }, -{ 0x1, 275, 0, 964 }, +{ 0x1, 280, 0, 958 }, +{ 0x1, 279, 0, 959 }, +{ 0x1, 278, 0, 960 }, +{ 0x1, 277, 0, 961 }, +{ 0x1, 276, 0, 962 }, +{ 0x1, 275, 0, 963 }, +{ 0x1, 274, 0, 964 }, { 0x2, 206, 0, 965 }, { 0x1, 206, 0, 966 }, -{ 0x2, 323, 0, 972 }, -{ 0x1, 323, 0, 973 }, -{ 0x1, 274, 0, 974 }, -{ 0x1, 273, 0, 975 }, -{ 0x1, 272, 0, 976 }, -{ 0x1, 271, 0, 977 }, +{ 0x2, 322, 0, 972 }, +{ 0x1, 322, 0, 973 }, +{ 0x1, 273, 0, 974 }, +{ 0x1, 272, 0, 975 }, +{ 0x1, 271, 0, 976 }, +{ 0x1, 270, 0, 977 }, { 0x1, 8, 0, 978 }, -{ 0x1, 270, 0, 979 }, -{ 0x1, 269, 0, 980 }, -{ 0x1, 268, 0, 981 }, -{ 0x1, 267, 0, 982 }, -{ 0x1, 345, 0, 983 }, -{ 0x1, 356, 0, 984 }, -{ 0x1, 346, 0, 985 }, -{ 0x1, 379, 0, 986 }, -{ 0x1, 266, 0, 990 }, +{ 0x1, 269, 0, 979 }, +{ 0x1, 268, 0, 980 }, +{ 0x1, 267, 0, 981 }, +{ 0x1, 266, 0, 982 }, +{ 0x1, 344, 0, 983 }, +{ 0x1, 355, 0, 984 }, +{ 0x1, 345, 0, 985 }, +{ 0x1, 378, 0, 986 }, +{ 0x1, 265, 0, 990 }, { 0x1, 205, 0, 991 }, { 0x1, 135, 0, 994 }, { 0x2, 248, 0, 998 }, @@ -6277,141 +6326,141 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x3, 47, 0, 1003 }, { 0x5, 46, 0, 1004 }, { 0x3, 46, 0, 1005 }, -{ 0x1, 322, 0, 1006 }, -{ 0x1, 330, 0, 1007 }, -{ 0x1, 328, 0, 1008 }, -{ 0x1, 349, 0, 1009 }, -{ 0x1, 329, 0, 1010 }, -{ 0x1, 327, 0, 1011 }, -{ 0x2, 335, 0, 1012 }, -{ 0x1, 335, 0, 1014 }, -{ 0x2, 333, 0, 1013 }, -{ 0x1, 333, 0, 1015 }, -{ 0x2, 353, 0, 1016 }, -{ 0x1, 353, 0, 1019 }, -{ 0x2, 334, 0, 1017 }, -{ 0x1, 334, 0, 1020 }, -{ 0x2, 332, 0, 1018 }, -{ 0x1, 332, 0, 1021 }, -{ 0x1, 295, 0, 1022 }, -{ 0x1, 294, 0, 1023 }, -{ 0x1, 326, 0, 1024 }, -{ 0x1, 317, 0, 1025 }, -{ 0x1, 319, 0, 1026 }, -{ 0x1, 316, 0, 1027 }, -{ 0x1, 318, 0, 1028 }, -{ 0x2, 394, 0, 1029 }, -{ 0x1, 394, 0, 1032 }, -{ 0x2, 393, 0, 1030 }, -{ 0x1, 393, 0, 1033 }, -{ 0x2, 392, 0, 1031 }, -{ 0x1, 392, 0, 1034 }, -{ 0x1, 305, 0, 1035 }, -{ 0x2, 304, 0, 1036 }, -{ 0x1, 304, 0, 1037 }, +{ 0x1, 321, 0, 1006 }, +{ 0x1, 329, 0, 1007 }, +{ 0x1, 327, 0, 1008 }, +{ 0x1, 348, 0, 1009 }, +{ 0x1, 328, 0, 1010 }, +{ 0x1, 326, 0, 1011 }, +{ 0x2, 334, 0, 1012 }, +{ 0x1, 334, 0, 1014 }, +{ 0x2, 332, 0, 1013 }, +{ 0x1, 332, 0, 1015 }, +{ 0x2, 352, 0, 1016 }, +{ 0x1, 352, 0, 1019 }, +{ 0x2, 333, 0, 1017 }, +{ 0x1, 333, 0, 1020 }, +{ 0x2, 331, 0, 1018 }, +{ 0x1, 331, 0, 1021 }, +{ 0x1, 294, 0, 1022 }, +{ 0x1, 293, 0, 1023 }, +{ 0x1, 325, 0, 1024 }, +{ 0x1, 316, 0, 1025 }, +{ 0x1, 318, 0, 1026 }, +{ 0x1, 315, 0, 1027 }, +{ 0x1, 317, 0, 1028 }, +{ 0x2, 393, 0, 1029 }, +{ 0x1, 393, 0, 1032 }, +{ 0x2, 392, 0, 1030 }, +{ 0x1, 392, 0, 1033 }, +{ 0x2, 391, 0, 1031 }, +{ 0x1, 391, 0, 1034 }, +{ 0x1, 304, 0, 1035 }, +{ 0x2, 303, 0, 1036 }, +{ 0x1, 303, 0, 1037 }, { 0x2, 251, 0, 1038 }, { 0x1, 251, 0, 1041 }, { 0x2, 250, 0, 1039 }, { 0x1, 250, 0, 1042 }, { 0x2, 249, 0, 1040 }, { 0x1, 249, 0, 1043 }, -{ 0x2, 320, 0, 1044 }, -{ 0x1, 320, 0, 1045 }, -{ 0x2, 321, 0, 1046 }, -{ 0x1, 321, 0, 1047 }, -{ 0xa, 388, 1, 1053 }, -{ 0xa, 389, 0, 1052 }, -{ 0x1a, 388, 1, 1049 }, -{ 0x32, 389, 0, 1048 }, -{ 0x6, 388, 1, 1057 }, -{ 0x6, 389, 0, 1056 }, -{ 0x1, 388, 1, 1063 }, -{ 0x1, 389, 0, 1062 }, -{ 0x9, 388, 1, 1055 }, -{ 0x9, 389, 0, 1054 }, -{ 0x19, 388, 1, 1051 }, -{ 0x31, 389, 0, 1050 }, -{ 0x5, 388, 1, 1059 }, -{ 0x5, 389, 0, 1058 }, -{ 0x3, 388, 1, 1061 }, -{ 0x3, 389, 0, 1060 }, -{ 0xa, 385, 1, 1069 }, -{ 0xa, 386, 0, 1068 }, -{ 0x1a, 385, 1, 1065 }, -{ 0x32, 386, 0, 1064 }, -{ 0x6, 385, 1, 1073 }, -{ 0x6, 386, 0, 1072 }, -{ 0x1, 385, 1, 1079 }, -{ 0x1, 386, 0, 1078 }, -{ 0x9, 385, 1, 1071 }, -{ 0x9, 386, 0, 1070 }, -{ 0x19, 385, 1, 1067 }, -{ 0x31, 386, 0, 1066 }, -{ 0x5, 385, 1, 1075 }, -{ 0x5, 386, 0, 1074 }, -{ 0x3, 385, 1, 1077 }, -{ 0x3, 386, 0, 1076 }, +{ 0x2, 319, 0, 1044 }, +{ 0x1, 319, 0, 1045 }, +{ 0x2, 320, 0, 1046 }, +{ 0x1, 320, 0, 1047 }, +{ 0xa, 387, 1, 1053 }, +{ 0xa, 388, 0, 1052 }, +{ 0x1a, 387, 1, 1049 }, +{ 0x32, 388, 0, 1048 }, +{ 0x6, 387, 1, 1057 }, +{ 0x6, 388, 0, 1056 }, +{ 0x1, 387, 1, 1063 }, +{ 0x1, 388, 0, 1062 }, +{ 0x9, 387, 1, 1055 }, +{ 0x9, 388, 0, 1054 }, +{ 0x19, 387, 1, 1051 }, +{ 0x31, 388, 0, 1050 }, +{ 0x5, 387, 1, 1059 }, +{ 0x5, 388, 0, 1058 }, +{ 0x3, 387, 1, 1061 }, +{ 0x3, 388, 0, 1060 }, +{ 0xa, 384, 1, 1069 }, +{ 0xa, 385, 0, 1068 }, +{ 0x1a, 384, 1, 1065 }, +{ 0x32, 385, 0, 1064 }, +{ 0x6, 384, 1, 1073 }, +{ 0x6, 385, 0, 1072 }, +{ 0x1, 384, 1, 1079 }, +{ 0x1, 385, 0, 1078 }, +{ 0x9, 384, 1, 1071 }, +{ 0x9, 385, 0, 1070 }, +{ 0x19, 384, 1, 1067 }, +{ 0x31, 385, 0, 1066 }, +{ 0x5, 384, 1, 1075 }, +{ 0x5, 385, 0, 1074 }, +{ 0x3, 384, 1, 1077 }, +{ 0x3, 385, 0, 1076 }, { 0x1, 103, 0, 1080 }, { 0x1, 102, 0, 1081 }, -{ 0x1, 348, 1, 1083 }, +{ 0x1, 347, 1, 1083 }, { 0x1, 101, 0, 1082 }, -{ 0x2, 352, 1, 1085 }, +{ 0x2, 351, 1, 1085 }, { 0x2, 105, 0, 1084 }, -{ 0x1, 352, 1, 1087 }, +{ 0x1, 351, 1, 1087 }, { 0x1, 105, 0, 1086 }, -{ 0x1, 354, 0, 1088 }, +{ 0x1, 353, 0, 1088 }, { 0x1, 100, 0, 1089 }, { 0x2, 99, 0, 1090 }, { 0x2, 98, 0, 1091 }, -{ 0x1, 406, 1, 1097 }, +{ 0x1, 405, 1, 1097 }, { 0x1, 204, 0, 992 }, -{ 0x1, 405, 0, 1098 }, -{ 0x1, 404, 1, 1099 }, +{ 0x1, 404, 0, 1098 }, +{ 0x1, 403, 1, 1099 }, { 0x1, 203, 0, 1001 }, -{ 0x1, 265, 0, 1100 }, -{ 0x1, 264, 1, 1101 }, +{ 0x1, 264, 0, 1100 }, +{ 0x1, 263, 1, 1101 }, { 0x1, 247, 0, 993 }, -{ 0x1, 263, 0, 1102 }, -{ 0x1, 262, 1, 1103 }, -{ 0x1, 383, 0, 995 }, -{ 0x1, 261, 1, 1104 }, -{ 0x1, 355, 0, 997 }, -{ 0x1, 260, 0, 1105 }, -{ 0x1, 259, 0, 1106 }, -{ 0x1, 258, 1, 1107 }, -{ 0x2, 355, 0, 996 }, -{ 0x10, 257, 0, 1111 }, -{ 0x90, 257, 0, 1109 }, -{ 0x190, 257, 0, 1108 }, -{ 0x50, 257, 0, 1110 }, -{ 0x30, 257, 0, 1113 }, -{ 0x70, 257, 0, 1112 }, -{ 0x8, 257, 0, 1115 }, -{ 0x18, 257, 0, 1114 }, -{ 0x4, 257, 0, 1116 }, -{ 0x1, 257, 0, 1119 }, -{ 0x3, 257, 0, 1118 }, -{ 0x1, 256, 1, 1120 }, -{ 0x2, 257, 0, 1117 }, +{ 0x1, 262, 0, 1102 }, +{ 0x1, 261, 1, 1103 }, +{ 0x1, 382, 0, 995 }, +{ 0x1, 260, 1, 1104 }, +{ 0x1, 354, 0, 997 }, +{ 0x1, 259, 0, 1105 }, +{ 0x1, 258, 0, 1106 }, +{ 0x1, 257, 1, 1107 }, +{ 0x2, 354, 0, 996 }, +{ 0x10, 256, 0, 1111 }, +{ 0x90, 256, 0, 1109 }, +{ 0x190, 256, 0, 1108 }, +{ 0x50, 256, 0, 1110 }, +{ 0x30, 256, 0, 1113 }, +{ 0x70, 256, 0, 1112 }, +{ 0x8, 256, 0, 1115 }, +{ 0x18, 256, 0, 1114 }, +{ 0x4, 256, 0, 1116 }, +{ 0x1, 256, 0, 1119 }, +{ 0x3, 256, 0, 1118 }, +{ 0x1, 255, 1, 1120 }, +{ 0x2, 256, 0, 1117 }, { 0x3, 45, 0, 1121 }, { 0x1, 199, 1, 1122 }, { 0x1, 200, 1, 987 }, { 0x1, 201, 0, 88 }, -{ 0x1, 298, 1, 1123 }, -{ 0x1, 299, 1, 988 }, -{ 0x1, 300, 0, 89 }, +{ 0x1, 297, 1, 1123 }, +{ 0x1, 298, 1, 988 }, +{ 0x1, 299, 0, 89 }, { 0x1, 33, 1, 1124 }, { 0x1, 34, 1, 989 }, { 0x1, 35, 0, 90 }, { 0x1, 188, 0, 1125 }, -{ 0x4, 399, 0, 1126 }, -{ 0x2, 399, 0, 1127 }, -{ 0x1, 399, 1, 1129 }, -{ 0x1, 400, 0, 1128 }, -{ 0x8, 401, 0, 1130 }, -{ 0x4, 401, 0, 1131 }, -{ 0x1, 401, 1, 1133 }, -{ 0x2, 401, 0, 1132 }, +{ 0x4, 398, 0, 1126 }, +{ 0x2, 398, 0, 1127 }, +{ 0x1, 398, 1, 1129 }, +{ 0x1, 399, 0, 1128 }, +{ 0x8, 400, 0, 1130 }, +{ 0x4, 400, 0, 1131 }, +{ 0x1, 400, 1, 1133 }, +{ 0x2, 400, 0, 1132 }, { 0x8, 177, 0, 1134 }, { 0x4, 177, 0, 1135 }, { 0x2, 177, 0, 1136 }, @@ -6700,25 +6749,25 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x142, 163, 0, 1420 }, { 0xc2, 163, 1, 1422 }, { 0x6, 164, 1, 1421 }, -{ 0x1, 391, 0, 941 }, +{ 0x1, 390, 0, 941 }, { 0x22, 163, 0, 1428 }, { 0x12, 163, 0, 1429 }, { 0xa, 163, 0, 1430 }, { 0x6, 163, 1, 1432 }, { 0x2, 164, 1, 1431 }, -{ 0x2, 324, 0, 970 }, +{ 0x2, 323, 0, 970 }, { 0x221, 163, 0, 1423 }, { 0x121, 163, 0, 1424 }, { 0xa1, 163, 0, 1425 }, { 0x61, 163, 1, 1427 }, { 0x3, 164, 1, 1426 }, -{ 0x1, 387, 0, 942 }, +{ 0x1, 386, 0, 942 }, { 0x11, 163, 0, 1433 }, { 0x9, 163, 0, 1434 }, { 0x5, 163, 0, 1435 }, { 0x3, 163, 1, 1437 }, { 0x1, 164, 1, 1436 }, -{ 0x1, 324, 0, 971 }, +{ 0x1, 323, 0, 971 }, { 0x4, 169, 0, 1438 }, { 0x1, 169, 0, 1440 }, { 0x1, 176, 0, 1441 }, @@ -6755,13 +6804,13 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x50, 160, 0, 1471 }, { 0x30, 160, 1, 1473 }, { 0x10, 161, 1, 1472 }, -{ 0x1, 342, 0, 934 }, +{ 0x1, 341, 0, 934 }, { 0x88, 160, 0, 1474 }, { 0x48, 160, 0, 1475 }, { 0x28, 160, 0, 1476 }, { 0x18, 160, 1, 1478 }, { 0x8, 161, 1, 1477 }, -{ 0xc, 325, 0, 967 }, +{ 0xc, 324, 0, 967 }, { 0x44, 160, 1, 1489 }, { 0x22, 162, 0, 1479 }, { 0x24, 160, 1, 1490 }, @@ -6772,7 +6821,7 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x4, 161, 1, 1492 }, { 0x6, 162, 1, 1483 }, { 0x2, 162, 1, 1482 }, -{ 0x6, 325, 0, 968 }, +{ 0x6, 324, 0, 968 }, { 0x22, 160, 1, 1494 }, { 0x11, 162, 0, 1484 }, { 0x12, 160, 1, 1495 }, @@ -6783,7 +6832,7 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x2, 161, 1, 1497 }, { 0x3, 162, 1, 1488 }, { 0x1, 162, 1, 1487 }, -{ 0x3, 325, 0, 969 }, +{ 0x3, 324, 0, 969 }, { 0x11, 160, 0, 1499 }, { 0x9, 160, 0, 1500 }, { 0x5, 160, 0, 1501 }, @@ -6794,25 +6843,25 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x2, 156, 0, 1506 }, { 0x1, 156, 1, 1508 }, { 0x1, 157, 1, 1507 }, -{ 0x1, 289, 0, 948 }, +{ 0x1, 288, 0, 948 }, { 0x8, 158, 0, 1509 }, { 0x4, 158, 0, 1510 }, { 0x2, 158, 0, 1511 }, { 0x1, 158, 1, 1513 }, { 0x1, 159, 1, 1512 }, -{ 0x1, 288, 0, 949 }, +{ 0x1, 287, 0, 949 }, { 0x8, 167, 0, 1514 }, { 0x4, 167, 0, 1515 }, { 0x2, 167, 0, 1516 }, { 0x1, 167, 1, 1518 }, { 0x1, 168, 1, 1517 }, -{ 0x1, 287, 0, 950 }, +{ 0x1, 286, 0, 950 }, { 0x8, 170, 0, 1519 }, { 0x4, 170, 0, 1520 }, { 0x2, 170, 0, 1521 }, { 0x1, 170, 1, 1523 }, { 0x1, 171, 1, 1522 }, -{ 0x1, 286, 0, 951 }, +{ 0x1, 285, 0, 951 }, { 0x8, 182, 0, 1524 }, { 0x4, 182, 0, 1525 }, { 0x2, 182, 0, 1526 }, @@ -6824,7 +6873,7 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x1, 180, 1, 1533 }, { 0x1, 181, 0, 1532 }, { 0x1, 198, 0, 1534 }, -{ 0x1, 297, 0, 1535 }, +{ 0x1, 296, 0, 1535 }, { 0x1, 32, 0, 1536 }, { 0x8, 115, 0, 1537 }, { 0x4, 115, 0, 1538 }, @@ -6882,7 +6931,7 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x1, 147, 1, 1590 }, { 0x2, 140, 0, 1587 }, { 0x1, 106, 0, 1591 }, -{ 0x1, 255, 1, 1592 }, +{ 0x1, 254, 1, 1592 }, { 0x1, 140, 0, 1588 }, { 0x8, 108, 0, 1593 }, { 0x4, 108, 0, 1594 }, @@ -6894,19 +6943,19 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x2, 110, 0, 1600 }, { 0x1, 110, 1, 1602 }, { 0x1, 111, 1, 1601 }, -{ 0x1, 382, 0, 1094 }, +{ 0x1, 381, 0, 1094 }, { 0x8, 138, 0, 1603 }, { 0x4, 138, 0, 1604 }, { 0x2, 138, 0, 1605 }, { 0x1, 138, 1, 1607 }, { 0x1, 139, 1, 1606 }, -{ 0x1, 381, 0, 1095 }, +{ 0x1, 380, 0, 1095 }, { 0x8, 141, 0, 1608 }, { 0x4, 141, 0, 1609 }, { 0x2, 141, 0, 1610 }, { 0x1, 141, 1, 1612 }, { 0x1, 142, 1, 1611 }, -{ 0x1, 380, 0, 1096 }, +{ 0x1, 379, 0, 1096 }, { 0x8, 186, 0, 1613 }, { 0x4, 186, 0, 1614 }, { 0x2, 186, 0, 1615 }, @@ -7124,7 +7173,7 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x3, 20, 1, 1826 }, { 0x4, 20, 0, 1825 }, { 0x1, 197, 0, 1829 }, -{ 0x1, 296, 0, 1830 }, +{ 0x1, 295, 0, 1830 }, { 0x14, 42, 0, 1833 }, { 0x34, 42, 0, 1831 }, { 0xc, 42, 0, 1834 }, @@ -7161,7 +7210,7 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x1, 104, 0, 1864 }, { 0x2, 44, 0, 1865 }, { 0x1, 44, 0, 1866 }, -{ 0x1, 344, 0, 1867 }, +{ 0x1, 343, 0, 1867 }, { 0x2, 51, 0, 1868 }, { 0x1, 51, 0, 1869 }, { 0x1, 97, 0, 1870 }, @@ -7504,59 +7553,58 @@ static const struct ia64_dis_names ia64_dis_names[] = { { 0x3, 54, 1, 2190 }, { 0x3, 55, 0, 2189 }, { 0x1, 4, 0, 2197 }, -{ 0x1, 254, 0, 2198 }, -{ 0x1, 336, 0, 2199 }, -{ 0x1, 331, 0, 2200 }, -{ 0x2, 315, 0, 2201 }, -{ 0x1, 315, 0, 2204 }, -{ 0x2, 314, 0, 2202 }, -{ 0x1, 314, 0, 2205 }, -{ 0x2, 313, 0, 2203 }, -{ 0x1, 313, 0, 2206 }, -{ 0x1, 312, 0, 2207 }, -{ 0x1, 311, 0, 2208 }, -{ 0x2, 310, 0, 2209 }, -{ 0x1, 310, 0, 2211 }, -{ 0x2, 309, 0, 2210 }, -{ 0x1, 309, 0, 2212 }, -{ 0x1, 339, 0, 2219 }, -{ 0x8, 338, 0, 2213 }, -{ 0x4, 338, 0, 2215 }, -{ 0x2, 338, 0, 2217 }, -{ 0x1, 338, 0, 2220 }, -{ 0x8, 337, 0, 2214 }, -{ 0x4, 337, 0, 2216 }, -{ 0x2, 337, 0, 2218 }, -{ 0x1, 337, 0, 2221 }, -{ 0x1, 308, 0, 2228 }, -{ 0x8, 307, 0, 2222 }, -{ 0x4, 307, 0, 2224 }, -{ 0x2, 307, 0, 2226 }, -{ 0x1, 307, 0, 2229 }, -{ 0x8, 306, 0, 2223 }, -{ 0x4, 306, 0, 2225 }, -{ 0x2, 306, 1, 2227 }, +{ 0x1, 253, 0, 2198 }, +{ 0x1, 335, 0, 2199 }, +{ 0x1, 330, 0, 2200 }, +{ 0x2, 314, 0, 2201 }, +{ 0x1, 314, 0, 2204 }, +{ 0x2, 313, 0, 2202 }, +{ 0x1, 313, 0, 2205 }, +{ 0x2, 312, 0, 2203 }, +{ 0x1, 312, 0, 2206 }, +{ 0x1, 311, 0, 2207 }, +{ 0x1, 310, 0, 2208 }, +{ 0x2, 309, 0, 2209 }, +{ 0x1, 309, 0, 2211 }, +{ 0x2, 308, 0, 2210 }, +{ 0x1, 308, 0, 2212 }, +{ 0x1, 338, 0, 2219 }, +{ 0x8, 337, 0, 2213 }, +{ 0x4, 337, 0, 2215 }, +{ 0x2, 337, 0, 2217 }, +{ 0x1, 337, 0, 2220 }, +{ 0x8, 336, 0, 2214 }, +{ 0x4, 336, 0, 2216 }, +{ 0x2, 336, 0, 2218 }, +{ 0x1, 336, 0, 2221 }, +{ 0x1, 307, 0, 2228 }, +{ 0x8, 306, 0, 2222 }, +{ 0x4, 306, 0, 2224 }, +{ 0x2, 306, 0, 2226 }, +{ 0x1, 306, 0, 2229 }, +{ 0x8, 305, 0, 2223 }, +{ 0x4, 305, 0, 2225 }, +{ 0x2, 305, 1, 2227 }, { 0x4, 107, 0, 1271 }, -{ 0x1, 306, 0, 2230 }, +{ 0x1, 305, 0, 2230 }, { 0x1, 6, 0, 2231 }, { 0x1, 7, 0, 2232 }, -{ 0x1, 253, 0, 2233 }, -{ 0x1, 252, 0, 2234 }, -{ 0x1, 403, 0, 2235 }, -{ 0x1, 303, 0, 2236 }, -{ 0x1, 12, 0, 2237 }, -{ 0x1, 10, 0, 2238 }, -{ 0x1, 378, 0, 2239 }, -{ 0x1, 351, 0, 2240 }, -{ 0x1, 350, 0, 2241 }, -{ 0x1, 402, 0, 2242 }, -{ 0x1, 302, 0, 2243 }, -{ 0x1, 11, 0, 2244 }, -{ 0x1, 9, 0, 2245 }, -{ 0x1, 5, 0, 2246 }, -{ 0x1, 377, 0, 2247 }, -{ 0x1, 376, 0, 2248 }, -{ 0x1, 1, 0, 2249 }, -{ 0x1, 0, 0, 2250 }, +{ 0x1, 252, 0, 2233 }, +{ 0x1, 402, 0, 2234 }, +{ 0x1, 302, 0, 2235 }, +{ 0x1, 12, 0, 2236 }, +{ 0x1, 10, 0, 2237 }, +{ 0x1, 377, 0, 2238 }, +{ 0x1, 350, 0, 2239 }, +{ 0x1, 349, 0, 2240 }, +{ 0x1, 401, 0, 2241 }, +{ 0x1, 301, 0, 2242 }, +{ 0x1, 11, 0, 2243 }, +{ 0x1, 9, 0, 2244 }, +{ 0x1, 5, 0, 2245 }, +{ 0x1, 376, 0, 2246 }, +{ 0x1, 375, 0, 2247 }, +{ 0x1, 1, 0, 2248 }, +{ 0x1, 0, 0, 2249 }, }; diff --git a/opcodes/ia64-gen.c b/opcodes/ia64-gen.c index a4e2cec..c38cc35 100644 --- a/opcodes/ia64-gen.c +++ b/opcodes/ia64-gen.c @@ -1134,7 +1134,13 @@ in_iclass (struct ia64_opcode *idesc, struct iclass *ic, else if (strcmp (ic->name, "invala") == 0) resolved = strcmp (idesc->name, ic->name) == 0; else if (strncmp (idesc->name, "st", 2) == 0 - && strstr (format, "M5") != NULL) + && (strstr (format, "M5") != NULL + || strstr (format, "M10") != NULL)) + resolved = idesc->flags & IA64_OPCODE_POSTINC; + else if (strncmp (idesc->name, "ld", 2) == 0 + && (strstr (format, "M2 M3") != NULL + || strstr (format, "M12") != NULL + || strstr (format, "M7 M8") != NULL)) resolved = idesc->flags & IA64_OPCODE_POSTINC; else resolved = 0; diff --git a/opcodes/ia64-opc-a.c b/opcodes/ia64-opc-a.c index c9e3162..9f1c5e3 100644 --- a/opcodes/ia64-opc-a.c +++ b/opcodes/ia64-opc-a.c @@ -107,7 +107,8 @@ struct ia64_opcode ia64_opcodes_a[] = {"or", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 2), {R1, IMM8, R3}, EMPTY}, {"xor", A, OpX2aVeX4X2b (8, 0, 0, 0xb, 3), {R1, IMM8, R3}, EMPTY}, {"mov", A, OpX2aVeImm14 (8, 2, 0, 0), {R1, R3}, EMPTY}, - {"mov", A, OpX2aVeR3a (8, 2, 0, 0), {R1, IMM14}, PSEUDO, 0, NULL}, + /* A mov immediate pseudo for adds was deleted. It failed for immediate + operands requiring relocs, e.g. @pltoff(a). */ {"adds", A, OpX2aVe (8, 2, 0), {R1, IMM14, R3}, EMPTY}, {"addp4", A, OpX2aVe (8, 3, 0), {R1, IMM14, R3}, EMPTY}, {"padd1", A, OpX2aZaZbX4X2b (8, 1, 0, 0, 0, 0), {R1, R2, R3}, EMPTY}, diff --git a/opcodes/m32r-asm.c b/opcodes/m32r-asm.c index 8c2cc81..87c33f0 100644 --- a/opcodes/m32r-asm.c +++ b/opcodes/m32r-asm.c @@ -4,7 +4,7 @@ THIS FILE IS MACHINE GENERATED WITH CGEN. - the resultant file is machine generated, cgen-asm.in isn't -Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc. +Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2004 Free Software Foundation, Inc. This file is part of the GNU Binutils and GDB, the GNU debugger. @@ -111,7 +111,10 @@ parse_hi16 (cd, strp, opindex, valuep) ++*strp; if (errmsg == NULL && result_type == CGEN_PARSE_OPERAND_RESULT_NUMBER) - value = (value >> 16) + (value & 0x8000 ? 1 : 0); + { + value = value + (value & 0x8000 ? 0x10000 : 0); + value >>= 16; + } *valuep = value; return errmsg; } diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c index bfd8c89..18489e3 100644 --- a/opcodes/m68k-dis.c +++ b/opcodes/m68k-dis.c @@ -1,6 +1,6 @@ /* Print Motorola 68k instructions. Copyright 1986, 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, - 1998, 1999, 2000, 2001, 2002, 2003 + 1998, 1999, 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. This file is free software; you can redistribute it and/or modify @@ -46,18 +46,31 @@ static int print_insn_arg PARAMS ((const char *, unsigned char *, unsigned char *, bfd_vma, disassemble_info *)); -const char * const fpcr_names[] = { +static bfd_boolean m68k_valid_ea (char code, int val); + +const char * const fpcr_names[] = +{ "", "%fpiar", "%fpsr", "%fpiar/%fpsr", "%fpcr", "%fpiar/%fpcr", "%fpsr/%fpcr", "%fpiar/%fpsr/%fpcr" }; -static char *const reg_names[] = { +static char *const reg_names[] = +{ "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%fp", "%sp", "%ps", "%pc" }; -/* Sign-extend an (unsigned char). */ +/* Name of register halves for MAC/EMAC. + Seperate from reg_names since 'spu', 'fpl' look weird. */ +static char *const reg_half_names[] = +{ + "%d0", "%d1", "%d2", "%d3", "%d4", "%d5", "%d6", "%d7", + "%a0", "%a1", "%a2", "%a3", "%a4", "%a5", "%a6", "%a7", + "%ps", "%pc" +}; + +/* Sign-extend an (unsigned char). */ #if __STDC__ == 1 #define COERCE_SIGNED_CHAR(ch) ((signed char) (ch)) #else @@ -169,6 +182,147 @@ dummy_print_address (vma, info) { } +/* Try to match the current instruction to best and if so, return the + number of bytes consumed from the instruction stream, else zero. */ + +static int +match_insn_m68k (bfd_vma memaddr, disassemble_info * info, + const struct m68k_opcode * best, struct private * priv) +{ + unsigned char *save_p; + unsigned char *p; + const char *d; + + bfd_byte *buffer = priv->the_buffer; + fprintf_ftype save_printer = info->fprintf_func; + void (* save_print_address) (bfd_vma, struct disassemble_info *) + = info->print_address_func; + + /* Point at first word of argument data, + and at descriptor for first argument. */ + p = buffer + 2; + + /* Figure out how long the fixed-size portion of the instruction is. + The only place this is stored in the opcode table is + in the arguments--look for arguments which specify fields in the 2nd + or 3rd words of the instruction. */ + for (d = best->args; *d; d += 2) + { + /* I don't think it is necessary to be checking d[0] here; + I suspect all this could be moved to the case statement below. */ + if (d[0] == '#') + { + if (d[1] == 'l' && p - buffer < 6) + p = buffer + 6; + else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8') + p = buffer + 4; + } + + if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4) + p = buffer + 4; + + switch (d[1]) + { + case '1': + case '2': + case '3': + case '7': + case '8': + case '9': + case 'i': + if (p - buffer < 4) + p = buffer + 4; + break; + case '4': + case '5': + case '6': + if (p - buffer < 6) + p = buffer + 6; + break; + default: + break; + } + } + + /* pflusha is an exceptions. It takes no arguments but is two words + long. Recognize it by looking at the lower 16 bits of the mask. */ + if (p - buffer < 4 && (best->match & 0xFFFF) != 0) + p = buffer + 4; + + /* lpstop is another exception. It takes a one word argument but is + three words long. */ + if (p - buffer < 6 + && (best->match & 0xffff) == 0xffff + && best->args[0] == '#' + && best->args[1] == 'w') + { + /* Copy the one word argument into the usual location for a one + word argument, to simplify printing it. We can get away with + this because we know exactly what the second word is, and we + aren't going to print anything based on it. */ + p = buffer + 6; + FETCH_DATA (info, p); + buffer[2] = buffer[4]; + buffer[3] = buffer[5]; + } + + FETCH_DATA (info, p); + + d = best->args; + + save_p = p; + info->print_address_func = dummy_print_address; + info->fprintf_func = (fprintf_ftype) dummy_printer; + + /* We scan the operands twice. The first time we don't print anything, + but look for errors. */ + for (; *d; d += 2) + { + int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); + + if (eaten >= 0) + p += eaten; + else if (eaten == -1) + { + info->fprintf_func = save_printer; + info->print_address_func = save_print_address; + return 0; + } + else + { + info->fprintf_func (info->stream, + /* xgettext:c-format */ + _("<internal error in opcode table: %s %s>\n"), + best->name, best->args); + info->fprintf_func = save_printer; + info->print_address_func = save_print_address; + return 2; + } + } + + p = save_p; + info->fprintf_func = save_printer; + info->print_address_func = save_print_address; + + d = best->args; + + info->fprintf_func (info->stream, "%s", best->name); + + if (*d) + info->fprintf_func (info->stream, " "); + + while (*d) + { + p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); + d += 2; + + if (*d && *(d - 2) != 'I' && *d != 'k') + info->fprintf_func (info->stream, ","); + } + + return p - buffer; +} + /* Print the m68k instruction at address MEMADDR in debugged memory, on INFO->STREAM. Returns length of the instruction, in bytes. */ @@ -177,38 +331,32 @@ print_insn_m68k (memaddr, info) bfd_vma memaddr; disassemble_info *info; { - register int i; - register unsigned char *p; - unsigned char *save_p; - register const char *d; - register unsigned long bestmask; - const struct m68k_opcode *best; + int i; + const char *d; unsigned int arch_mask; struct private priv; bfd_byte *buffer = priv.the_buffer; - fprintf_ftype save_printer = info->fprintf_func; - void (*save_print_address) PARAMS ((bfd_vma, struct disassemble_info *)) - = info->print_address_func; int major_opcode; static int numopcodes[16]; static const struct m68k_opcode **opcodes[16]; + int val; if (!opcodes[0]) { - /* Speed up the matching by sorting the opcode table on the upper - four bits of the opcode. */ + /* Speed up the matching by sorting the opcode + table on the upper four bits of the opcode. */ const struct m68k_opcode **opc_pointer[16]; /* First count how many opcodes are in each of the sixteen buckets. */ for (i = 0; i < m68k_numopcodes; i++) numopcodes[(m68k_opcodes[i].opcode >> 28) & 15]++; - /* Then create a sorted table of pointers that point into the - unsorted table. */ - opc_pointer[0] = ((const struct m68k_opcode **) - xmalloc (sizeof (struct m68k_opcode *) - * m68k_numopcodes)); + /* Then create a sorted table of pointers + that point into the unsorted table. */ + opc_pointer[0] = xmalloc (sizeof (struct m68k_opcode *) + * m68k_numopcodes); opcodes[0] = opc_pointer[0]; + for (i = 1; i < 16; i++) { opc_pointer[i] = opc_pointer[i - 1] + numopcodes[i - 1]; @@ -217,22 +365,21 @@ print_insn_m68k (memaddr, info) for (i = 0; i < m68k_numopcodes; i++) *opc_pointer[(m68k_opcodes[i].opcode >> 28) & 15]++ = &m68k_opcodes[i]; - } info->private_data = (PTR) &priv; - /* Tell objdump to use two bytes per chunk and six bytes per line for - displaying raw data. */ + /* Tell objdump to use two bytes per chunk + and six bytes per line for displaying raw data. */ info->bytes_per_chunk = 2; info->bytes_per_line = 6; info->display_endian = BFD_ENDIAN_BIG; priv.max_fetched = priv.the_buffer; priv.insn_start = memaddr; + if (setjmp (priv.bailout) != 0) /* Error return. */ return -1; - best = NULL; switch (info->mach) { default: @@ -240,48 +387,55 @@ print_insn_m68k (memaddr, info) arch_mask = (unsigned int) -1; break; case bfd_mach_m68000: - arch_mask = m68000; + arch_mask = m68000|m68881|m68851; break; case bfd_mach_m68008: - arch_mask = m68008; + arch_mask = m68008|m68881|m68851; break; case bfd_mach_m68010: - arch_mask = m68010; + arch_mask = m68010|m68881|m68851; break; case bfd_mach_m68020: - arch_mask = m68020; + arch_mask = m68020|m68881|m68851; break; case bfd_mach_m68030: - arch_mask = m68030; + arch_mask = m68030|m68881|m68851; break; case bfd_mach_m68040: - arch_mask = m68040; + arch_mask = m68040|m68881|m68851; break; case bfd_mach_m68060: - arch_mask = m68060; + arch_mask = m68060|m68881|m68851; break; case bfd_mach_mcf5200: - arch_mask = mcf5200; + arch_mask = mcfisa_a; break; + case bfd_mach_mcf521x: case bfd_mach_mcf528x: - arch_mask = mcf528x; + arch_mask = mcfisa_a|mcfhwdiv|mcfisa_aa|mcfusp|mcfemac; break; case bfd_mach_mcf5206e: - arch_mask = mcf5206e; + arch_mask = mcfisa_a|mcfhwdiv|mcfmac; + break; + case bfd_mach_mcf5249: + arch_mask = mcfisa_a|mcfhwdiv|mcfemac; break; case bfd_mach_mcf5307: - arch_mask = mcf5307; + arch_mask = mcfisa_a|mcfhwdiv|mcfmac; break; case bfd_mach_mcf5407: - arch_mask = mcf5407; + arch_mask = mcfisa_a|mcfhwdiv|mcfisa_b|mcfmac; + break; + case bfd_mach_mcf547x: + case bfd_mach_mcf548x: + case bfd_mach_mcfv4e: + arch_mask = mcfisa_a|mcfhwdiv|mcfisa_b|mcfusp|cfloat|mcfemac; break; } - arch_mask |= m68881 | m68851; - - bestmask = 0; FETCH_DATA (info, buffer + 2); major_opcode = (buffer[0] >> 4) & 15; + for (i = 0; i < numopcodes[major_opcode]; i++) { const struct m68k_opcode *opc = opcodes[major_opcode][i]; @@ -308,22 +462,20 @@ print_insn_m68k (memaddr, info) /* Don't use for printout the variants of most floating point coprocessor instructions which use the same - register number in two places, as above. */ + register number in two places, as above. */ if (*d == '\0') for (d = opc->args; *d; d += 2) if (d[1] == 't') break; - /* Don't match fmovel with more than one register; wait for - fmoveml. */ + /* Don't match fmovel with more than one register; + wait for fmoveml. */ if (*d == '\0') { for (d = opc->args; *d; d += 2) { if (d[0] == 's' && d[1] == '8') { - int val; - val = fetch_arg (buffer, d[1], 3, info); if ((val & (val - 1)) != 0) break; @@ -331,158 +483,35 @@ print_insn_m68k (memaddr, info) } } - if (*d == '\0' && match > bestmask) - { - best = opc; - bestmask = match; - } - } - } - - if (best == NULL) - goto invalid; - - /* Point at first word of argument data, - and at descriptor for first argument. */ - p = buffer + 2; - - /* Figure out how long the fixed-size portion of the instruction is. - The only place this is stored in the opcode table is - in the arguments--look for arguments which specify fields in the 2nd - or 3rd words of the instruction. */ - for (d = best->args; *d; d += 2) - { - /* I don't think it is necessary to be checking d[0] here; I suspect - all this could be moved to the case statement below. */ - if (d[0] == '#') - { - if (d[1] == 'l' && p - buffer < 6) - p = buffer + 6; - else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8') - p = buffer + 4; - } - if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4) - p = buffer + 4; - switch (d[1]) - { - case '1': - case '2': - case '3': - case '7': - case '8': - case '9': - case 'i': - if (p - buffer < 4) - p = buffer + 4; - break; - case '4': - case '5': - case '6': - if (p - buffer < 6) - p = buffer + 6; - break; - default: - break; - } - } - - /* pflusha is an exceptions. It takes no arguments but is two words - long. Recognize it by looking at the lower 16 bits of the mask. */ - if (p - buffer < 4 && (best->match & 0xFFFF) != 0) - p = buffer + 4; - - /* lpstop is another exception. It takes a one word argument but is - three words long. */ - if (p - buffer < 6 - && (best->match & 0xffff) == 0xffff - && best->args[0] == '#' - && best->args[1] == 'w') - { - /* Copy the one word argument into the usual location for a one - word argument, to simplify printing it. We can get away with - this because we know exactly what the second word is, and we - aren't going to print anything based on it. */ - p = buffer + 6; - FETCH_DATA (info, p); - buffer[2] = buffer[4]; - buffer[3] = buffer[5]; - } - - FETCH_DATA (info, p); - - d = best->args; - - /* We scan the operands twice. The first time we don't print anything, - but look for errors. */ - - save_p = p; - info->print_address_func = dummy_print_address; - info->fprintf_func = (fprintf_ftype) dummy_printer; - for (; *d; d += 2) - { - int eaten = print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); - if (eaten >= 0) - p += eaten; - else if (eaten == -1) - goto invalid; - else - { - (*info->fprintf_func) (info->stream, - /* xgettext:c-format */ - _("<internal error in opcode table: %s %s>\n"), - best->name, - best->args); - goto invalid; + if (*d == '\0') + if ((val = match_insn_m68k (memaddr, info, opc, & priv))) + return val; } - - } - p = save_p; - info->fprintf_func = save_printer; - info->print_address_func = save_print_address; - - d = best->args; - - (*info->fprintf_func) (info->stream, "%s", best->name); - - if (*d) - (*info->fprintf_func) (info->stream, " "); - - while (*d) - { - p += print_insn_arg (d, buffer, p, memaddr + (p - buffer), info); - d += 2; - if (*d && *(d - 2) != 'I' && *d != 'k') - (*info->fprintf_func) (info->stream, ","); } - return p - buffer; - invalid: /* Handle undefined instructions. */ - info->fprintf_func = save_printer; - info->print_address_func = save_print_address; - (*info->fprintf_func) (info->stream, "0%o", - (buffer[0] << 8) + buffer[1]); + info->fprintf_func (info->stream, "0%o", (buffer[0] << 8) + buffer[1]); return 2; } /* Returns number of bytes "eaten" by the operand, or return -1 if an invalid operand was found, or -2 if - an opcode tabe error was found. */ + an opcode tabe error was found. */ static int print_insn_arg (d, buffer, p0, addr, info) const char *d; unsigned char *buffer; unsigned char *p0; - bfd_vma addr; /* PC for this arg to be relative to */ + bfd_vma addr; /* PC for this arg to be relative to. */ disassemble_info *info; { - register int val = 0; - register int place = d[1]; - register unsigned char *p = p0; + int val = 0; + int place = d[1]; + unsigned char *p = p0; int regno; - register const char *regname; - register unsigned char *p1; + const char *regname; + unsigned char *p1; double flval; int flt_p; bfd_signed_vma disp; @@ -490,7 +519,7 @@ print_insn_arg (d, buffer, p0, addr, info) switch (*d) { - case 'c': /* cache identifier */ + case 'c': /* Cache identifier. */ { static char *const cacheFieldName[] = { "nc", "dc", "ic", "bc" }; val = fetch_arg (buffer, place, 2, info); @@ -498,7 +527,7 @@ print_insn_arg (d, buffer, p0, addr, info) break; } - case 'a': /* address register indirect only. Cf. case '+'. */ + case 'a': /* Address register indirect only. Cf. case '+'. */ { (*info->fprintf_func) (info->stream, @@ -507,7 +536,7 @@ print_insn_arg (d, buffer, p0, addr, info) break; } - case '_': /* 32-bit absolute address for move16. */ + case '_': /* 32-bit absolute address for move16. */ { uval = NEXTULONG (p); (*info->print_address_func) (uval, info); @@ -736,6 +765,26 @@ print_insn_arg (d, buffer, p0, addr, info) fpcr_names[fetch_arg (buffer, place, 3, info)]); break; + case 'e': + val = fetch_arg(buffer, place, 2, info); + (*info->fprintf_func) (info->stream, "%%acc%d", val); + break; + + case 'g': + val = fetch_arg(buffer, place, 1, info); + (*info->fprintf_func) (info->stream, "%%accext%s", val==0 ? "01" : "23"); + break; + + case 'i': + val = fetch_arg(buffer, place, 2, info); + if (val == 1) + (*info->fprintf_func) (info->stream, "<<"); + else if (val == 3) + (*info->fprintf_func) (info->stream, ">>"); + else + return -1; + break; + case 'I': /* Get coprocessor ID... */ val = fetch_arg (buffer, 'd', 3, info); @@ -744,6 +793,7 @@ print_insn_arg (d, buffer, p0, addr, info) (*info->fprintf_func) (info->stream, "(cpid=%d) ", val); break; + case '4': case '*': case '~': case '%': @@ -775,6 +825,10 @@ print_insn_arg (d, buffer, p0, addr, info) else val = fetch_arg (buffer, 's', 6, info); + /* If the <ea> is invalid for *d, then reject this match. */ + if (!m68k_valid_ea (*d, val)) + return -1; + /* Get register number assuming address register. */ regno = (val & 7) + 8; regname = reg_names[regno]; @@ -881,6 +935,16 @@ print_insn_arg (d, buffer, p0, addr, info) return -1; } } + + /* If place is '/', then this is the case of the mask bit for + mac/emac loads. Now that the arg has been printed, grab the + mask bit and if set, add a '&' to the arg. */ + if (place == '/') + { + val = fetch_arg (buffer, place, 1, info); + if (val) + info->fprintf_func (info->stream, "&"); + } break; case 'L': @@ -1048,7 +1112,7 @@ print_insn_arg (d, buffer, p0, addr, info) reg &= 0xf; } (*info->fprintf_func) (info->stream, "%s%s", - reg_names[reg], + reg_half_names[reg], is_upper ? "u" : "l"); } break; @@ -1060,6 +1124,106 @@ print_insn_arg (d, buffer, p0, addr, info) return p - p0; } +/* Check if an EA is valid for a particular code. This is required + for the EMAC instructions since the type of source address determines + if it is a EMAC-load instruciton if the EA is mode 2-5, otherwise it + is a non-load EMAC instruction and the bits mean register Ry. + A similar case exists for the movem instructions where the register + mask is interpreted differently for different EAs. */ + +static bfd_boolean +m68k_valid_ea (char code, int val) +{ + int mode, mask; +#define M(n0,n1,n2,n3,n4,n5,n6,n70,n71,n72,n73,n74) \ + (n0 | n1 << 1 | n2 << 2 | n3 << 3 | n4 << 4 | n5 << 5 | n6 << 6 \ + | n70 << 7 | n71 << 8 | n72 << 9 | n73 << 10 | n74 << 11) + + switch (code) + { + case '*': + mask = M (1,1,1,1,1,1,1,1,1,1,1,1); + break; + case '~': + mask = M (0,0,1,1,1,1,1,1,1,0,0,0); + break; + case '%': + mask = M (1,1,1,1,1,1,1,1,1,0,0,0); + break; + case ';': + mask = M (1,0,1,1,1,1,1,1,1,1,1,1); + break; + case '@': + mask = M (1,0,1,1,1,1,1,1,1,1,1,0); + break; + case '!': + mask = M (0,0,1,0,0,1,1,1,1,1,1,0); + break; + case '&': + mask = M (0,0,1,0,0,1,1,1,1,0,0,0); + break; + case '$': + mask = M (1,0,1,1,1,1,1,1,1,0,0,0); + break; + case '?': + mask = M (0,1,0,0,1,1,1,1,1,0,0,0); + break; + case '/': + mask = M (1,0,1,0,0,1,1,1,1,1,1,0); + break; + case '|': + mask = M (0,0,1,0,0,1,1,1,1,1,1,0); + break; + case '>': + mask = M (0,0,1,0,1,1,1,1,1,1,1,0); + break; + case '<': + mask = M (0,0,1,1,0,1,1,1,1,0,0,0); + break; + case 'm': + mask = M (1,1,1,1,1,0,0,0,0,0,0,0); + break; + case 'n': + mask = M (0,0,0,0,0,1,0,0,0,1,0,0); + break; + case 'o': + mask = M (0,0,0,0,0,0,1,1,1,0,1,1); + break; + case 'p': + mask = M (1,1,1,1,1,1,0,0,0,0,0,0); + break; + case 'q': + mask = M (1,0,1,1,1,1,0,0,0,0,0,0); + break; + case 'v': + mask = M (1,0,1,1,1,1,0,1,1,0,0,0); + break; + case 'b': + mask = M (1,0,1,1,1,1,0,0,0,1,0,0); + break; + case 'w': + mask = M (0,0,1,1,1,1,0,0,0,1,0,0); + break; + case 'y': + mask = M (0,0,1,0,0,1,0,0,0,0,0,0); + break; + case 'z': + mask = M (0,0,1,0,0,1,0,0,0,1,0,0); + break; + case '4': + mask = M (0,0,1,1,1,1,0,0,0,0,0,0); + break; + default: + abort (); + } +#undef M + + mode = (val >> 3) & 7; + if (mode == 7) + mode += val & 7; + return (mask & (1 << mode)) != 0; +} + /* Fetch BITS bits from a position in the instruction specified by CODE. CODE is a "place to put an argument", or 'x' for a destination that is a general address (mode and register). @@ -1072,9 +1236,38 @@ fetch_arg (buffer, code, bits, info) int bits; disassemble_info *info; { - register int val = 0; + int val = 0; + switch (code) { + case '/': /* MAC/EMAC mask bit. */ + val = buffer[3] >> 5; + break; + + case 'G': /* EMAC ACC load. */ + val = ((buffer[3] >> 3) & 0x2) | ((~buffer[1] >> 7) & 0x1); + break; + + case 'H': /* EMAC ACC !load. */ + val = ((buffer[3] >> 3) & 0x2) | ((buffer[1] >> 7) & 0x1); + break; + + case ']': /* EMAC ACCEXT bit. */ + val = buffer[0] >> 2; + break; + + case 'I': /* MAC/EMAC scale factor. */ + val = buffer[2] >> 1; + break; + + case 'F': /* EMAC ACCx. */ + val = buffer[0] >> 1; + break; + + case 'f': + val = buffer[1]; + break; + case 's': val = buffer[1]; break; @@ -1171,11 +1364,11 @@ fetch_arg (buffer, code, bits, info) break; case 'M': - val = buffer[1] | (buffer[3] & 0x40 ? 0x10 : 0); + val = (buffer[1] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0); break; case 'N': - val = buffer[3] | (buffer[3] & 0x40 ? 0x10 : 0); + val = (buffer[3] & 0xf) | (buffer[3] & 0x40 ? 0x10 : 0); break; case 'h': @@ -1222,7 +1415,7 @@ print_indexed (basereg, p, addr, info) bfd_vma addr; disassemble_info *info; { - register int word; + int word; static char *const scales[] = { "", ":2", ":4", ":8" }; bfd_vma base_disp; bfd_vma outer_disp; diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c index 8fa6c0e..82d1c42 100644 --- a/opcodes/m68k-opc.c +++ b/opcodes/m68k-opc.c @@ -1,6 +1,6 @@ /* Opcode table for m680[012346]0/m6888[12]/m68851/mcf5200. Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, - 2000, 2001, 2003 + 2000, 2001, 2003, 2004 Free Software Foundation, Inc. This file is part of GDB, GAS, and the GNU binutils. @@ -32,1471 +32,1460 @@ const struct m68k_opcode m68k_opcodes[] = { -{"abcd", one(0140400), one(0170770), "DsDd", m68000up }, -{"abcd", one(0140410), one(0170770), "-s-d", m68000up }, +{"abcd", 2, one(0140400), one(0170770), "DsDd", m68000up }, +{"abcd", 2, one(0140410), one(0170770), "-s-d", m68000up }, -{"addaw", one(0150300), one(0170700), "*wAd", m68000up }, -{"addal", one(0150700), one(0170700), "*lAd", m68000up | mcf }, +{"addaw", 2, one(0150300), one(0170700), "*wAd", m68000up }, +{"addal", 2, one(0150700), one(0170700), "*lAd", m68000up | mcfisa_a }, -{"addib", one(0003000), one(0177700), "#b$s", m68000up }, -{"addiw", one(0003100), one(0177700), "#w$s", m68000up }, -{"addil", one(0003200), one(0177700), "#l$s", m68000up }, -{"addil", one(0003200), one(0177700), "#lDs", mcf }, +{"addib", 4, one(0003000), one(0177700), "#b$s", m68000up }, +{"addiw", 4, one(0003100), one(0177700), "#w$s", m68000up }, +{"addil", 6, one(0003200), one(0177700), "#l$s", m68000up }, +{"addil", 6, one(0003200), one(0177700), "#lDs", mcfisa_a }, -{"addqb", one(0050000), one(0170700), "Qd$b", m68000up }, -{"addqw", one(0050100), one(0170700), "Qd%w", m68000up }, -{"addql", one(0050200), one(0170700), "Qd%l", m68000up | mcf }, +{"addqb", 2, one(0050000), one(0170700), "Qd$b", m68000up }, +{"addqw", 2, one(0050100), one(0170700), "Qd%w", m68000up }, +{"addql", 2, one(0050200), one(0170700), "Qd%l", m68000up | mcfisa_a }, /* The add opcode can generate the adda, addi, and addq instructions. */ -{"addb", one(0050000), one(0170700), "Qd$b", m68000up }, -{"addb", one(0003000), one(0177700), "#b$s", m68000up }, -{"addb", one(0150000), one(0170700), ";bDd", m68000up }, -{"addb", one(0150400), one(0170700), "Dd~b", m68000up }, -{"addw", one(0050100), one(0170700), "Qd%w", m68000up }, -{"addw", one(0150300), one(0170700), "*wAd", m68000up }, -{"addw", one(0003100), one(0177700), "#w$s", m68000up }, -{"addw", one(0150100), one(0170700), "*wDd", m68000up }, -{"addw", one(0150500), one(0170700), "Dd~w", m68000up }, -{"addl", one(0050200), one(0170700), "Qd%l", m68000up | mcf }, -{"addl", one(0003200), one(0177700), "#l$s", m68000up }, -{"addl", one(0003200), one(0177700), "#lDs", mcf }, -{"addl", one(0150700), one(0170700), "*lAd", m68000up | mcf }, -{"addl", one(0150200), one(0170700), "*lDd", m68000up | mcf }, -{"addl", one(0150600), one(0170700), "Dd~l", m68000up | mcf }, - -{"addxb", one(0150400), one(0170770), "DsDd", m68000up }, -{"addxb", one(0150410), one(0170770), "-s-d", m68000up }, -{"addxw", one(0150500), one(0170770), "DsDd", m68000up }, -{"addxw", one(0150510), one(0170770), "-s-d", m68000up }, -{"addxl", one(0150600), one(0170770), "DsDd", m68000up | mcf }, -{"addxl", one(0150610), one(0170770), "-s-d", m68000up }, - -{"andib", one(0001000), one(0177700), "#b$s", m68000up }, -{"andib", one(0001074), one(0177777), "#bCs", m68000up }, -{"andiw", one(0001100), one(0177700), "#w$s", m68000up }, -{"andiw", one(0001174), one(0177777), "#wSs", m68000up }, -{"andil", one(0001200), one(0177700), "#l$s", m68000up }, -{"andil", one(0001200), one(0177700), "#lDs", mcf }, -{"andi", one(0001100), one(0177700), "#w$s", m68000up }, -{"andi", one(0001074), one(0177777), "#bCs", m68000up }, -{"andi", one(0001174), one(0177777), "#wSs", m68000up }, +{"addb", 2, one(0050000), one(0170700), "Qd$b", m68000up }, +{"addb", 4, one(0003000), one(0177700), "#b$s", m68000up }, +{"addb", 2, one(0150000), one(0170700), ";bDd", m68000up }, +{"addb", 2, one(0150400), one(0170700), "Dd~b", m68000up }, +{"addw", 2, one(0050100), one(0170700), "Qd%w", m68000up }, +{"addw", 2, one(0150300), one(0170700), "*wAd", m68000up }, +{"addw", 4, one(0003100), one(0177700), "#w$s", m68000up }, +{"addw", 2, one(0150100), one(0170700), "*wDd", m68000up }, +{"addw", 2, one(0150500), one(0170700), "Dd~w", m68000up }, +{"addl", 2, one(0050200), one(0170700), "Qd%l", m68000up | mcfisa_a }, +{"addl", 6, one(0003200), one(0177700), "#l$s", m68000up }, +{"addl", 6, one(0003200), one(0177700), "#lDs", mcfisa_a }, +{"addl", 2, one(0150700), one(0170700), "*lAd", m68000up | mcfisa_a }, +{"addl", 2, one(0150200), one(0170700), "*lDd", m68000up | mcfisa_a }, +{"addl", 2, one(0150600), one(0170700), "Dd~l", m68000up | mcfisa_a }, + +{"addxb", 2, one(0150400), one(0170770), "DsDd", m68000up }, +{"addxb", 2, one(0150410), one(0170770), "-s-d", m68000up }, +{"addxw", 2, one(0150500), one(0170770), "DsDd", m68000up }, +{"addxw", 2, one(0150510), one(0170770), "-s-d", m68000up }, +{"addxl", 2, one(0150600), one(0170770), "DsDd", m68000up | mcfisa_a }, +{"addxl", 2, one(0150610), one(0170770), "-s-d", m68000up }, + +{"andib", 4, one(0001000), one(0177700), "#b$s", m68000up }, +{"andib", 4, one(0001074), one(0177777), "#bCs", m68000up }, +{"andiw", 4, one(0001100), one(0177700), "#w$s", m68000up }, +{"andiw", 4, one(0001174), one(0177777), "#wSs", m68000up }, +{"andil", 6, one(0001200), one(0177700), "#l$s", m68000up }, +{"andil", 6, one(0001200), one(0177700), "#lDs", mcfisa_a }, +{"andi", 4, one(0001100), one(0177700), "#w$s", m68000up }, +{"andi", 4, one(0001074), one(0177777), "#bCs", m68000up }, +{"andi", 4, one(0001174), one(0177777), "#wSs", m68000up }, /* The and opcode can generate the andi instruction. */ -{"andb", one(0001000), one(0177700), "#b$s", m68000up }, -{"andb", one(0001074), one(0177777), "#bCs", m68000up }, -{"andb", one(0140000), one(0170700), ";bDd", m68000up }, -{"andb", one(0140400), one(0170700), "Dd~b", m68000up }, -{"andw", one(0001100), one(0177700), "#w$s", m68000up }, -{"andw", one(0001174), one(0177777), "#wSs", m68000up }, -{"andw", one(0140100), one(0170700), ";wDd", m68000up }, -{"andw", one(0140500), one(0170700), "Dd~w", m68000up }, -{"andl", one(0001200), one(0177700), "#l$s", m68000up }, -{"andl", one(0001200), one(0177700), "#lDs", mcf }, -{"andl", one(0140200), one(0170700), ";lDd", m68000up | mcf }, -{"andl", one(0140600), one(0170700), "Dd~l", m68000up | mcf }, -{"and", one(0001100), one(0177700), "#w$w", m68000up }, -{"and", one(0001074), one(0177777), "#bCs", m68000up }, -{"and", one(0001174), one(0177777), "#wSs", m68000up }, -{"and", one(0140100), one(0170700), ";wDd", m68000up }, -{"and", one(0140500), one(0170700), "Dd~w", m68000up }, - -{"aslb", one(0160400), one(0170770), "QdDs", m68000up }, -{"aslb", one(0160440), one(0170770), "DdDs", m68000up }, -{"aslw", one(0160500), one(0170770), "QdDs", m68000up }, -{"aslw", one(0160540), one(0170770), "DdDs", m68000up }, -{"aslw", one(0160700), one(0177700), "~s", m68000up }, -{"asll", one(0160600), one(0170770), "QdDs", m68000up | mcf }, -{"asll", one(0160640), one(0170770), "DdDs", m68000up | mcf }, - -{"asrb", one(0160000), one(0170770), "QdDs", m68000up }, -{"asrb", one(0160040), one(0170770), "DdDs", m68000up }, -{"asrw", one(0160100), one(0170770), "QdDs", m68000up }, -{"asrw", one(0160140), one(0170770), "DdDs", m68000up }, -{"asrw", one(0160300), one(0177700), "~s", m68000up }, -{"asrl", one(0160200), one(0170770), "QdDs", m68000up | mcf }, -{"asrl", one(0160240), one(0170770), "DdDs", m68000up | mcf }, - -{"bhiw", one(0061000), one(0177777), "BW", m68000up | mcf }, -{"blsw", one(0061400), one(0177777), "BW", m68000up | mcf }, -{"bccw", one(0062000), one(0177777), "BW", m68000up | mcf }, -{"bcsw", one(0062400), one(0177777), "BW", m68000up | mcf }, -{"bnew", one(0063000), one(0177777), "BW", m68000up | mcf }, -{"beqw", one(0063400), one(0177777), "BW", m68000up | mcf }, -{"bvcw", one(0064000), one(0177777), "BW", m68000up | mcf }, -{"bvsw", one(0064400), one(0177777), "BW", m68000up | mcf }, -{"bplw", one(0065000), one(0177777), "BW", m68000up | mcf }, -{"bmiw", one(0065400), one(0177777), "BW", m68000up | mcf }, -{"bgew", one(0066000), one(0177777), "BW", m68000up | mcf }, -{"bltw", one(0066400), one(0177777), "BW", m68000up | mcf }, -{"bgtw", one(0067000), one(0177777), "BW", m68000up | mcf }, -{"blew", one(0067400), one(0177777), "BW", m68000up | mcf }, - -{"bhil", one(0061377), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"blsl", one(0061777), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bccl", one(0062377), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bcsl", one(0062777), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bnel", one(0063377), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"beql", one(0063777), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bvcl", one(0064377), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bvsl", one(0064777), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bpll", one(0065377), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bmil", one(0065777), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bgel", one(0066377), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bltl", one(0066777), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bgtl", one(0067377), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"blel", one(0067777), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, - -{"bhis", one(0061000), one(0177400), "BB", m68000up | mcf }, -{"blss", one(0061400), one(0177400), "BB", m68000up | mcf }, -{"bccs", one(0062000), one(0177400), "BB", m68000up | mcf }, -{"bcss", one(0062400), one(0177400), "BB", m68000up | mcf }, -{"bnes", one(0063000), one(0177400), "BB", m68000up | mcf }, -{"beqs", one(0063400), one(0177400), "BB", m68000up | mcf }, -{"bvcs", one(0064000), one(0177400), "BB", m68000up | mcf }, -{"bvss", one(0064400), one(0177400), "BB", m68000up | mcf }, -{"bpls", one(0065000), one(0177400), "BB", m68000up | mcf }, -{"bmis", one(0065400), one(0177400), "BB", m68000up | mcf }, -{"bges", one(0066000), one(0177400), "BB", m68000up | mcf }, -{"blts", one(0066400), one(0177400), "BB", m68000up | mcf }, -{"bgts", one(0067000), one(0177400), "BB", m68000up | mcf }, -{"bles", one(0067400), one(0177400), "BB", m68000up | mcf }, - -{"jhi", one(0061000), one(0177400), "Bg", m68000up | mcf }, -{"jls", one(0061400), one(0177400), "Bg", m68000up | mcf }, -{"jcc", one(0062000), one(0177400), "Bg", m68000up | mcf }, -{"jcs", one(0062400), one(0177400), "Bg", m68000up | mcf }, -{"jne", one(0063000), one(0177400), "Bg", m68000up | mcf }, -{"jeq", one(0063400), one(0177400), "Bg", m68000up | mcf }, -{"jvc", one(0064000), one(0177400), "Bg", m68000up | mcf }, -{"jvs", one(0064400), one(0177400), "Bg", m68000up | mcf }, -{"jpl", one(0065000), one(0177400), "Bg", m68000up | mcf }, -{"jmi", one(0065400), one(0177400), "Bg", m68000up | mcf }, -{"jge", one(0066000), one(0177400), "Bg", m68000up | mcf }, -{"jlt", one(0066400), one(0177400), "Bg", m68000up | mcf }, -{"jgt", one(0067000), one(0177400), "Bg", m68000up | mcf }, -{"jle", one(0067400), one(0177400), "Bg", m68000up | mcf }, - -{"bchg", one(0000500), one(0170700), "Dd$s", m68000up | mcf }, -{"bchg", one(0004100), one(0177700), "#b$s", m68000up }, -{"bchg", one(0004100), one(0177700), "#bqs", mcf }, - -{"bclr", one(0000600), one(0170700), "Dd$s", m68000up | mcf }, -{"bclr", one(0004200), one(0177700), "#b$s", m68000up }, -{"bclr", one(0004200), one(0177700), "#bqs", mcf }, - -{"bfchg", two(0165300, 0), two(0177700, 0170000), "?sO2O3", m68020up }, -{"bfclr", two(0166300, 0), two(0177700, 0170000), "?sO2O3", m68020up }, -{"bfexts", two(0165700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up }, -{"bfextu", two(0164700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up }, -{"bfffo", two(0166700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up }, -{"bfins", two(0167700, 0), two(0177700, 0100000), "D1?sO2O3", m68020up }, -{"bfset", two(0167300, 0), two(0177700, 0170000), "?sO2O3", m68020up }, -{"bftst", two(0164300, 0), two(0177700, 0170000), "/sO2O3", m68020up }, - -{"bgnd", one(0045372), one(0177777), "", cpu32 }, - -{"bitrev", one(0000300), one(0177770), "Ds", mcf528x}, - -{"bkpt", one(0044110), one(0177770), "ts", m68010up }, - -{"braw", one(0060000), one(0177777), "BW", m68000up | mcf }, -{"bral", one(0060377), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bras", one(0060000), one(0177400), "BB", m68000up | mcf }, - -{"bset", one(0000700), one(0170700), "Dd$s", m68000up | mcf }, -{"bset", one(0000700), one(0170700), "Ddvs", mcf }, -{"bset", one(0004300), one(0177700), "#b$s", m68000up }, -{"bset", one(0004300), one(0177700), "#bqs", mcf }, - -{"bsrw", one(0060400), one(0177777), "BW", m68000up | mcf }, -{"bsrl", one(0060777), one(0177777), "BL", m68020up | cpu32 | mcfv4up}, -{"bsrs", one(0060400), one(0177400), "BB", m68000up | mcf }, - -{"btst", one(0000400), one(0170700), "Dd;b", m68000up | mcf }, -{"btst", one(0004000), one(0177700), "#b@s", m68000up }, -{"btst", one(0004000), one(0177700), "#bqs", mcf }, - -{"byterev", one(0001300), one(0177770), "Ds", mcf528x}, - -{"callm", one(0003300), one(0177700), "#b!s", m68020 }, - -{"cas2w", two(0006374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up }, -{"cas2w", two(0006374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up }, -{"cas2l", two(0007374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up }, -{"cas2l", two(0007374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up }, - -{"casb", two(0005300, 0), two(0177700, 0177070), "D3D2~s", m68020up }, -{"casw", two(0006300, 0), two(0177700, 0177070), "D3D2~s", m68020up }, -{"casl", two(0007300, 0), two(0177700, 0177070), "D3D2~s", m68020up }, - -{"chk2b", two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 }, -{"chk2w", two(0001300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 }, -{"chk2l", two(0002300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 }, - -{"chkl", one(0040400), one(0170700), ";lDd", m68000up }, -{"chkw", one(0040600), one(0170700), ";wDd", m68000up }, +{"andb", 4, one(0001000), one(0177700), "#b$s", m68000up }, +{"andb", 4, one(0001074), one(0177777), "#bCs", m68000up }, +{"andb", 2, one(0140000), one(0170700), ";bDd", m68000up }, +{"andb", 2, one(0140400), one(0170700), "Dd~b", m68000up }, +{"andw", 4, one(0001100), one(0177700), "#w$s", m68000up }, +{"andw", 4, one(0001174), one(0177777), "#wSs", m68000up }, +{"andw", 2, one(0140100), one(0170700), ";wDd", m68000up }, +{"andw", 2, one(0140500), one(0170700), "Dd~w", m68000up }, +{"andl", 6, one(0001200), one(0177700), "#l$s", m68000up }, +{"andl", 6, one(0001200), one(0177700), "#lDs", mcfisa_a }, +{"andl", 2, one(0140200), one(0170700), ";lDd", m68000up | mcfisa_a }, +{"andl", 2, one(0140600), one(0170700), "Dd~l", m68000up | mcfisa_a }, +{"and", 4, one(0001100), one(0177700), "#w$w", m68000up }, +{"and", 4, one(0001074), one(0177777), "#bCs", m68000up }, +{"and", 4, one(0001174), one(0177777), "#wSs", m68000up }, +{"and", 2, one(0140100), one(0170700), ";wDd", m68000up }, +{"and", 2, one(0140500), one(0170700), "Dd~w", m68000up }, + +{"aslb", 2, one(0160400), one(0170770), "QdDs", m68000up }, +{"aslb", 2, one(0160440), one(0170770), "DdDs", m68000up }, +{"aslw", 2, one(0160500), one(0170770), "QdDs", m68000up }, +{"aslw", 2, one(0160540), one(0170770), "DdDs", m68000up }, +{"aslw", 2, one(0160700), one(0177700), "~s", m68000up }, +{"asll", 2, one(0160600), one(0170770), "QdDs", m68000up | mcfisa_a }, +{"asll", 2, one(0160640), one(0170770), "DdDs", m68000up | mcfisa_a }, + +{"asrb", 2, one(0160000), one(0170770), "QdDs", m68000up }, +{"asrb", 2, one(0160040), one(0170770), "DdDs", m68000up }, +{"asrw", 2, one(0160100), one(0170770), "QdDs", m68000up }, +{"asrw", 2, one(0160140), one(0170770), "DdDs", m68000up }, +{"asrw", 2, one(0160300), one(0177700), "~s", m68000up }, +{"asrl", 2, one(0160200), one(0170770), "QdDs", m68000up | mcfisa_a }, +{"asrl", 2, one(0160240), one(0170770), "DdDs", m68000up | mcfisa_a }, + +{"bhiw", 2, one(0061000), one(0177777), "BW", m68000up | mcfisa_a }, +{"blsw", 2, one(0061400), one(0177777), "BW", m68000up | mcfisa_a }, +{"bccw", 2, one(0062000), one(0177777), "BW", m68000up | mcfisa_a }, +{"bcsw", 2, one(0062400), one(0177777), "BW", m68000up | mcfisa_a }, +{"bnew", 2, one(0063000), one(0177777), "BW", m68000up | mcfisa_a }, +{"beqw", 2, one(0063400), one(0177777), "BW", m68000up | mcfisa_a }, +{"bvcw", 2, one(0064000), one(0177777), "BW", m68000up | mcfisa_a }, +{"bvsw", 2, one(0064400), one(0177777), "BW", m68000up | mcfisa_a }, +{"bplw", 2, one(0065000), one(0177777), "BW", m68000up | mcfisa_a }, +{"bmiw", 2, one(0065400), one(0177777), "BW", m68000up | mcfisa_a }, +{"bgew", 2, one(0066000), one(0177777), "BW", m68000up | mcfisa_a }, +{"bltw", 2, one(0066400), one(0177777), "BW", m68000up | mcfisa_a }, +{"bgtw", 2, one(0067000), one(0177777), "BW", m68000up | mcfisa_a }, +{"blew", 2, one(0067400), one(0177777), "BW", m68000up | mcfisa_a }, + +{"bhil", 2, one(0061377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"blsl", 2, one(0061777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bccl", 2, one(0062377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bcsl", 2, one(0062777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bnel", 2, one(0063377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"beql", 2, one(0063777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bvcl", 2, one(0064377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bvsl", 2, one(0064777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bpll", 2, one(0065377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bmil", 2, one(0065777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bgel", 2, one(0066377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bltl", 2, one(0066777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bgtl", 2, one(0067377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"blel", 2, one(0067777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, + +{"bhis", 2, one(0061000), one(0177400), "BB", m68000up | mcfisa_a }, +{"blss", 2, one(0061400), one(0177400), "BB", m68000up | mcfisa_a }, +{"bccs", 2, one(0062000), one(0177400), "BB", m68000up | mcfisa_a }, +{"bcss", 2, one(0062400), one(0177400), "BB", m68000up | mcfisa_a }, +{"bnes", 2, one(0063000), one(0177400), "BB", m68000up | mcfisa_a }, +{"beqs", 2, one(0063400), one(0177400), "BB", m68000up | mcfisa_a }, +{"bvcs", 2, one(0064000), one(0177400), "BB", m68000up | mcfisa_a }, +{"bvss", 2, one(0064400), one(0177400), "BB", m68000up | mcfisa_a }, +{"bpls", 2, one(0065000), one(0177400), "BB", m68000up | mcfisa_a }, +{"bmis", 2, one(0065400), one(0177400), "BB", m68000up | mcfisa_a }, +{"bges", 2, one(0066000), one(0177400), "BB", m68000up | mcfisa_a }, +{"blts", 2, one(0066400), one(0177400), "BB", m68000up | mcfisa_a }, +{"bgts", 2, one(0067000), one(0177400), "BB", m68000up | mcfisa_a }, +{"bles", 2, one(0067400), one(0177400), "BB", m68000up | mcfisa_a }, + +{"jhi", 2, one(0061000), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jls", 2, one(0061400), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jcc", 2, one(0062000), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jcs", 2, one(0062400), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jne", 2, one(0063000), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jeq", 2, one(0063400), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jvc", 2, one(0064000), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jvs", 2, one(0064400), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jpl", 2, one(0065000), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jmi", 2, one(0065400), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jge", 2, one(0066000), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jlt", 2, one(0066400), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jgt", 2, one(0067000), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jle", 2, one(0067400), one(0177400), "Bg", m68000up | mcfisa_a }, + +{"bchg", 2, one(0000500), one(0170700), "Dd$s", m68000up | mcfisa_a }, +{"bchg", 4, one(0004100), one(0177700), "#b$s", m68000up }, +{"bchg", 4, one(0004100), one(0177700), "#bqs", mcfisa_a }, + +{"bclr", 2, one(0000600), one(0170700), "Dd$s", m68000up | mcfisa_a }, +{"bclr", 4, one(0004200), one(0177700), "#b$s", m68000up }, +{"bclr", 4, one(0004200), one(0177700), "#bqs", mcfisa_a }, + +{"bfchg", 4, two(0165300, 0), two(0177700, 0170000), "?sO2O3", m68020up }, +{"bfclr", 4, two(0166300, 0), two(0177700, 0170000), "?sO2O3", m68020up }, +{"bfexts", 4, two(0165700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up }, +{"bfextu", 4, two(0164700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up }, +{"bfffo", 4, two(0166700, 0), two(0177700, 0100000), "/sO2O3D1", m68020up }, +{"bfins", 4, two(0167700, 0), two(0177700, 0100000), "D1?sO2O3", m68020up }, +{"bfset", 4, two(0167300, 0), two(0177700, 0170000), "?sO2O3", m68020up }, +{"bftst", 4, two(0164300, 0), two(0177700, 0170000), "/sO2O3", m68020up }, + +{"bgnd", 2, one(0045372), one(0177777), "", cpu32 }, + +{"bitrev", 2, one(0000300), one(0177770), "Ds", mcfisa_aa}, + +{"bkpt", 2, one(0044110), one(0177770), "ts", m68010up }, + +{"braw", 2, one(0060000), one(0177777), "BW", m68000up | mcfisa_a }, +{"bral", 2, one(0060377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bras", 2, one(0060000), one(0177400), "BB", m68000up | mcfisa_a }, + +{"bset", 2, one(0000700), one(0170700), "Dd$s", m68000up | mcfisa_a }, +{"bset", 2, one(0000700), one(0170700), "Ddvs", mcfisa_a }, +{"bset", 4, one(0004300), one(0177700), "#b$s", m68000up }, +{"bset", 4, one(0004300), one(0177700), "#bqs", mcfisa_a }, + +{"bsrw", 2, one(0060400), one(0177777), "BW", m68000up | mcfisa_a }, +{"bsrl", 2, one(0060777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b}, +{"bsrs", 2, one(0060400), one(0177400), "BB", m68000up | mcfisa_a }, + +{"btst", 2, one(0000400), one(0170700), "Dd;b", m68000up | mcfisa_a }, +{"btst", 4, one(0004000), one(0177700), "#b@s", m68000up }, +{"btst", 4, one(0004000), one(0177700), "#bqs", mcfisa_a }, + +{"byterev", 2, one(0001300), one(0177770), "Ds", mcfisa_aa}, + +{"callm", 4, one(0003300), one(0177700), "#b!s", m68020 }, + +{"cas2w", 6, two(0006374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up }, +{"cas2w", 6, two(0006374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up }, +{"cas2l", 6, two(0007374,0), two(0177777,0007070), "D3D6D2D5r1r4", m68020up }, +{"cas2l", 6, two(0007374,0), two(0177777,0007070), "D3D6D2D5R1R4", m68020up }, + +{"casb", 4, two(0005300, 0), two(0177700, 0177070), "D3D2~s", m68020up }, +{"casw", 4, two(0006300, 0), two(0177700, 0177070), "D3D2~s", m68020up }, +{"casl", 4, two(0007300, 0), two(0177700, 0177070), "D3D2~s", m68020up }, + +{"chk2b", 4, two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 }, +{"chk2w", 4, two(0001300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 }, +{"chk2l", 4, two(0002300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 }, + +{"chkl", 2, one(0040400), one(0170700), ";lDd", m68000up }, +{"chkw", 2, one(0040600), one(0170700), ";wDd", m68000up }, #define SCOPE_LINE (0x1 << 3) #define SCOPE_PAGE (0x2 << 3) #define SCOPE_ALL (0x3 << 3) -{"cinva", one(0xf400|SCOPE_ALL), one(0xff38), "ce", m68040up }, -{"cinvl", one(0xf400|SCOPE_LINE), one(0xff38), "ceas", m68040up }, -{"cinvp", one(0xf400|SCOPE_PAGE), one(0xff38), "ceas", m68040up }, +{"cinva", 2, one(0xf400|SCOPE_ALL), one(0xff38), "ce", m68040up }, +{"cinvl", 2, one(0xf400|SCOPE_LINE), one(0xff38), "ceas", m68040up }, +{"cinvp", 2, one(0xf400|SCOPE_PAGE), one(0xff38), "ceas", m68040up }, -{"cpusha", one(0xf420|SCOPE_ALL), one(0xff38), "ce", m68040up }, -{"cpushl", one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up | mcf }, -{"cpushp", one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up }, +{"cpusha", 2, one(0xf420|SCOPE_ALL), one(0xff38), "ce", m68040up }, +{"cpushl", 2, one(0xf420|SCOPE_LINE), one(0xff38), "ceas", m68040up | mcfisa_a }, +{"cpushp", 2, one(0xf420|SCOPE_PAGE), one(0xff38), "ceas", m68040up }, #undef SCOPE_LINE #undef SCOPE_PAGE #undef SCOPE_ALL -{"clrb", one(0041000), one(0177700), "$s", m68000up | mcf }, -{"clrw", one(0041100), one(0177700), "$s", m68000up | mcf }, -{"clrl", one(0041200), one(0177700), "$s", m68000up | mcf }, +{"clrb", 2, one(0041000), one(0177700), "$s", m68000up | mcfisa_a }, +{"clrw", 2, one(0041100), one(0177700), "$s", m68000up | mcfisa_a }, +{"clrl", 2, one(0041200), one(0177700), "$s", m68000up | mcfisa_a }, -{"cmp2b", two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 }, -{"cmp2w", two(0001300,0), two(0177700,07777), "!sR1", m68020up | cpu32 }, -{"cmp2l", two(0002300,0), two(0177700,07777), "!sR1", m68020up | cpu32 }, +{"cmp2b", 4, two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 }, +{"cmp2w", 4, two(0001300,0), two(0177700,07777), "!sR1", m68020up | cpu32 }, +{"cmp2l", 4, two(0002300,0), two(0177700,07777), "!sR1", m68020up | cpu32 }, -{"cmpaw", one(0130300), one(0170700), "*wAd", m68000up }, -{"cmpal", one(0130700), one(0170700), "*lAd", m68000up | mcf }, +{"cmpaw", 2, one(0130300), one(0170700), "*wAd", m68000up }, +{"cmpal", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a }, -{"cmpib", one(0006000), one(0177700), "#b@s", m68000up }, -{"cmpib", one(0006000), one(0177700), "#bDs", mcfv4up }, -{"cmpiw", one(0006100), one(0177700), "#w@s", m68000up }, -{"cmpiw", one(0006100), one(0177700), "#wDs", mcfv4up }, -{"cmpil", one(0006200), one(0177700), "#l@s", m68000up }, -{"cmpil", one(0006200), one(0177700), "#lDs", mcf }, +{"cmpib", 4, one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpib", 4, one(0006000), one(0177700), "#bDs", mcfisa_b }, +{"cmpiw", 4, one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpiw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b }, +{"cmpil", 6, one(0006200), one(0177700), "#l@s", m68000up }, +{"cmpil", 6, one(0006200), one(0177700), "#lDs", mcfisa_a }, -{"cmpmb", one(0130410), one(0170770), "+s+d", m68000up }, -{"cmpmw", one(0130510), one(0170770), "+s+d", m68000up }, -{"cmpml", one(0130610), one(0170770), "+s+d", m68000up }, +{"cmpmb", 2, one(0130410), one(0170770), "+s+d", m68000up }, +{"cmpmw", 2, one(0130510), one(0170770), "+s+d", m68000up }, +{"cmpml", 2, one(0130610), one(0170770), "+s+d", m68000up }, /* The cmp opcode can generate the cmpa, cmpm, and cmpi instructions. */ -{"cmpb", one(0006000), one(0177700), "#b@s", m68000up }, -{"cmpb", one(0006000), one(0177700), "#bDs", mcfv4up }, -{"cmpb", one(0130410), one(0170770), "+s+d", m68000up }, -{"cmpb", one(0130000), one(0170700), ";bDd", m68000up }, -{"cmpb", one(0130000), one(0170700), "*bDd", mcfv4up }, -{"cmpw", one(0130300), one(0170700), "*wAd", m68000up }, -{"cmpw", one(0006100), one(0177700), "#w@s", m68000up }, -{"cmpw", one(0006100), one(0177700), "#wDs", mcfv4up }, -{"cmpw", one(0130510), one(0170770), "+s+d", m68000up }, -{"cmpw", one(0130100), one(0170700), "*wDd", m68000up | mcfv4up }, -{"cmpl", one(0130700), one(0170700), "*lAd", m68000up | mcf }, -{"cmpl", one(0006200), one(0177700), "#l@s", m68000up }, -{"cmpl", one(0006200), one(0177700), "#lDs", mcf }, -{"cmpl", one(0130610), one(0170770), "+s+d", m68000up }, -{"cmpl", one(0130200), one(0170700), "*lDd", m68000up | mcf }, - -{"dbcc", one(0052310), one(0177770), "DsBw", m68000up }, -{"dbcs", one(0052710), one(0177770), "DsBw", m68000up }, -{"dbeq", one(0053710), one(0177770), "DsBw", m68000up }, -{"dbf", one(0050710), one(0177770), "DsBw", m68000up }, -{"dbge", one(0056310), one(0177770), "DsBw", m68000up }, -{"dbgt", one(0057310), one(0177770), "DsBw", m68000up }, -{"dbhi", one(0051310), one(0177770), "DsBw", m68000up }, -{"dble", one(0057710), one(0177770), "DsBw", m68000up }, -{"dbls", one(0051710), one(0177770), "DsBw", m68000up }, -{"dblt", one(0056710), one(0177770), "DsBw", m68000up }, -{"dbmi", one(0055710), one(0177770), "DsBw", m68000up }, -{"dbne", one(0053310), one(0177770), "DsBw", m68000up }, -{"dbpl", one(0055310), one(0177770), "DsBw", m68000up }, -{"dbt", one(0050310), one(0177770), "DsBw", m68000up }, -{"dbvc", one(0054310), one(0177770), "DsBw", m68000up }, -{"dbvs", one(0054710), one(0177770), "DsBw", m68000up }, - -{"divsw", one(0100700), one(0170700), ";wDd", m68000up | mcf5206eup }, - -{"divsl", two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 }, -{"divsl", two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 }, -{"divsl", two(0046100,0004000),two(0177700,0107770),"qsDD", mcf5206eup }, - -{"divsll", two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 }, -{"divsll", two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 }, - -{"divuw", one(0100300), one(0170700), ";wDd", m68000up | mcf5206eup }, - -{"divul", two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 }, -{"divul", two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 }, -{"divul", two(0046100,0000000),two(0177700,0107770),"qsDD", mcf5206eup }, - -{"divull", two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 }, -{"divull", two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 }, - -{"eorib", one(0005000), one(0177700), "#b$s", m68000up }, -{"eorib", one(0005074), one(0177777), "#bCs", m68000up }, -{"eoriw", one(0005100), one(0177700), "#w$s", m68000up }, -{"eoriw", one(0005174), one(0177777), "#wSs", m68000up }, -{"eoril", one(0005200), one(0177700), "#l$s", m68000up }, -{"eoril", one(0005200), one(0177700), "#lDs", mcf }, -{"eori", one(0005074), one(0177777), "#bCs", m68000up }, -{"eori", one(0005174), one(0177777), "#wSs", m68000up }, -{"eori", one(0005100), one(0177700), "#w$s", m68000up }, +{"cmpb", 4, one(0006000), one(0177700), "#b@s", m68000up }, +{"cmpb", 4, one(0006000), one(0177700), "#bDs", mcfisa_b }, +{"cmpb", 2, one(0130410), one(0170770), "+s+d", m68000up }, +{"cmpb", 2, one(0130000), one(0170700), ";bDd", m68000up }, +{"cmpb", 2, one(0130000), one(0170700), "*bDd", mcfisa_b }, +{"cmpw", 2, one(0130300), one(0170700), "*wAd", m68000up }, +{"cmpw", 4, one(0006100), one(0177700), "#w@s", m68000up }, +{"cmpw", 4, one(0006100), one(0177700), "#wDs", mcfisa_b }, +{"cmpw", 2, one(0130510), one(0170770), "+s+d", m68000up }, +{"cmpw", 2, one(0130100), one(0170700), "*wDd", m68000up | mcfisa_b }, +{"cmpl", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a }, +{"cmpl", 6, one(0006200), one(0177700), "#l@s", m68000up }, +{"cmpl", 6, one(0006200), one(0177700), "#lDs", mcfisa_a }, +{"cmpl", 2, one(0130610), one(0170770), "+s+d", m68000up }, +{"cmpl", 2, one(0130200), one(0170700), "*lDd", m68000up | mcfisa_a }, + +{"dbcc", 2, one(0052310), one(0177770), "DsBw", m68000up }, +{"dbcs", 2, one(0052710), one(0177770), "DsBw", m68000up }, +{"dbeq", 2, one(0053710), one(0177770), "DsBw", m68000up }, +{"dbf", 2, one(0050710), one(0177770), "DsBw", m68000up }, +{"dbge", 2, one(0056310), one(0177770), "DsBw", m68000up }, +{"dbgt", 2, one(0057310), one(0177770), "DsBw", m68000up }, +{"dbhi", 2, one(0051310), one(0177770), "DsBw", m68000up }, +{"dble", 2, one(0057710), one(0177770), "DsBw", m68000up }, +{"dbls", 2, one(0051710), one(0177770), "DsBw", m68000up }, +{"dblt", 2, one(0056710), one(0177770), "DsBw", m68000up }, +{"dbmi", 2, one(0055710), one(0177770), "DsBw", m68000up }, +{"dbne", 2, one(0053310), one(0177770), "DsBw", m68000up }, +{"dbpl", 2, one(0055310), one(0177770), "DsBw", m68000up }, +{"dbt", 2, one(0050310), one(0177770), "DsBw", m68000up }, +{"dbvc", 2, one(0054310), one(0177770), "DsBw", m68000up }, +{"dbvs", 2, one(0054710), one(0177770), "DsBw", m68000up }, + +{"divsw", 2, one(0100700), one(0170700), ";wDd", m68000up | mcfhwdiv }, + +{"divsl", 4, two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 }, +{"divsl", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 }, +{"divsl", 4, two(0046100,0004000),two(0177700,0107770),"qsDD", mcfhwdiv }, + +{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 }, +{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 }, + +{"divuw", 2, one(0100300), one(0170700), ";wDd", m68000up | mcfhwdiv }, + +{"divul", 4, two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 }, +{"divul", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 }, +{"divul", 4, two(0046100,0000000),two(0177700,0107770),"qsDD", mcfhwdiv }, + +{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 }, +{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 }, + +{"eorib", 4, one(0005000), one(0177700), "#b$s", m68000up }, +{"eorib", 4, one(0005074), one(0177777), "#bCs", m68000up }, +{"eoriw", 4, one(0005100), one(0177700), "#w$s", m68000up }, +{"eoriw", 4, one(0005174), one(0177777), "#wSs", m68000up }, +{"eoril", 6, one(0005200), one(0177700), "#l$s", m68000up }, +{"eoril", 6, one(0005200), one(0177700), "#lDs", mcfisa_a }, +{"eori", 4, one(0005074), one(0177777), "#bCs", m68000up }, +{"eori", 4, one(0005174), one(0177777), "#wSs", m68000up }, +{"eori", 4, one(0005100), one(0177700), "#w$s", m68000up }, /* The eor opcode can generate the eori instruction. */ -{"eorb", one(0005000), one(0177700), "#b$s", m68000up }, -{"eorb", one(0005074), one(0177777), "#bCs", m68000up }, -{"eorb", one(0130400), one(0170700), "Dd$s", m68000up }, -{"eorw", one(0005100), one(0177700), "#w$s", m68000up }, -{"eorw", one(0005174), one(0177777), "#wSs", m68000up }, -{"eorw", one(0130500), one(0170700), "Dd$s", m68000up }, -{"eorl", one(0005200), one(0177700), "#l$s", m68000up }, -{"eorl", one(0005200), one(0177700), "#lDs", mcf }, -{"eorl", one(0130600), one(0170700), "Dd$s", m68000up | mcf }, -{"eor", one(0005074), one(0177777), "#bCs", m68000up }, -{"eor", one(0005174), one(0177777), "#wSs", m68000up }, -{"eor", one(0005100), one(0177700), "#w$s", m68000up }, -{"eor", one(0130500), one(0170700), "Dd$s", m68000up }, - -{"exg", one(0140500), one(0170770), "DdDs", m68000up }, -{"exg", one(0140510), one(0170770), "AdAs", m68000up }, -{"exg", one(0140610), one(0170770), "DdAs", m68000up }, -{"exg", one(0140610), one(0170770), "AsDd", m68000up }, - -{"extw", one(0044200), one(0177770), "Ds", m68000up|mcf }, -{"extl", one(0044300), one(0177770), "Ds", m68000up|mcf }, -{"extbl", one(0044700), one(0177770), "Ds", m68020up|cpu32|mcf }, - -{"ff1", one(0002300), one(0177770), "Ds", mcf528x}, +{"eorb", 4, one(0005000), one(0177700), "#b$s", m68000up }, +{"eorb", 4, one(0005074), one(0177777), "#bCs", m68000up }, +{"eorb", 2, one(0130400), one(0170700), "Dd$s", m68000up }, +{"eorw", 4, one(0005100), one(0177700), "#w$s", m68000up }, +{"eorw", 4, one(0005174), one(0177777), "#wSs", m68000up }, +{"eorw", 2, one(0130500), one(0170700), "Dd$s", m68000up }, +{"eorl", 6, one(0005200), one(0177700), "#l$s", m68000up }, +{"eorl", 6, one(0005200), one(0177700), "#lDs", mcfisa_a }, +{"eorl", 2, one(0130600), one(0170700), "Dd$s", m68000up | mcfisa_a }, +{"eor", 4, one(0005074), one(0177777), "#bCs", m68000up }, +{"eor", 4, one(0005174), one(0177777), "#wSs", m68000up }, +{"eor", 4, one(0005100), one(0177700), "#w$s", m68000up }, +{"eor", 2, one(0130500), one(0170700), "Dd$s", m68000up }, + +{"exg", 2, one(0140500), one(0170770), "DdDs", m68000up }, +{"exg", 2, one(0140510), one(0170770), "AdAs", m68000up }, +{"exg", 2, one(0140610), one(0170770), "DdAs", m68000up }, +{"exg", 2, one(0140610), one(0170770), "AsDd", m68000up }, + +{"extw", 2, one(0044200), one(0177770), "Ds", m68000up|mcfisa_a }, +{"extl", 2, one(0044300), one(0177770), "Ds", m68000up|mcfisa_a }, +{"extbl", 2, one(0044700), one(0177770), "Ds", m68020up|cpu32|mcfisa_a }, + +{"ff1", 2, one(0002300), one(0177770), "Ds", mcfisa_aa}, /* float stuff starts here */ -{"fabsb", two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fabsb", two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fabsd", two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fabsd", two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fabsd", two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fabsd", two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fabsl", two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fabsl", two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fabsp", two(0xF000, 0x4C18), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fabss", two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", cfloat }, -{"fabss", two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fabsw", two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fabsw", two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fabsx", two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fabsx", two(0xF000, 0x4818), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fabsx", two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fsabsb", two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fsabsb", two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsabsd", two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fsabsd", two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fsabsd", two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fsabsd", two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fsabsl", two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fsabsl", two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsabsp", two(0xF000, 0x4C58), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fsabss", two(0xF000, 0x4258), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsabss", two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fsabsw", two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fsabsw", two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsabsx", two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fsabsx", two(0xF000, 0x4858), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fsabsx", two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", m68040up }, - -{"fdabsb", two(0xF000, 0x585C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdabsb", two(0xF000, 0x585c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up}, -{"fdabsd", two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fdabsd", two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fdabsd", two(0xF000, 0x545C), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fdabsd", two(0xF000, 0x545c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up}, -{"fdabsl", two(0xF000, 0x405C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdabsl", two(0xF000, 0x405c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up}, -{"fdabsp", two(0xF000, 0x4C5c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up}, -{"fdabss", two(0xF000, 0x425C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdabss", two(0xF000, 0x445c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up}, -{"fdabsw", two(0xF000, 0x505C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdabsw", two(0xF000, 0x505c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up}, -{"fdabsx", two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up}, -{"fdabsx", two(0xF000, 0x485c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up}, -{"fdabsx", two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiFt", m68040up}, - -{"facosb", two(0xF000, 0x581C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"facosd", two(0xF000, 0x541C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"facosl", two(0xF000, 0x401C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"facosp", two(0xF000, 0x4C1C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"facoss", two(0xF000, 0x441C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"facosw", two(0xF000, 0x501C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"facosx", two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"facosx", two(0xF000, 0x481C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"facosx", two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"faddb", two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"faddb", two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"faddd", two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"faddd", two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"faddd", two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"faddd", two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"faddl", two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"faddl", two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"faddp", two(0xF000, 0x4C22), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fadds", two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fadds", two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"faddw", two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"faddw", two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"faddx", two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"faddx", two(0xF000, 0x4822), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, - -{"fsaddb", two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fsaddb", two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsaddd", two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fsaddd", two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fsaddd", two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fsaddl", two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fsaddl", two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsaddp", two(0xF000, 0x4C62), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fsadds", two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fsadds", two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsaddw", two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fsaddw", two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsaddx", two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fsaddx", two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, - -{"fdaddb", two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdaddb", two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fdaddd", two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fdaddd", two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdaddd", two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fdaddl", two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fdaddl", two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fdaddp", two(0xF000, 0x4C66), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fdadds", two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fdadds", two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdaddw", two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdaddw", two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fdaddx", two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fdaddx", two(0xF000, 0x4866), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, - -{"fasinb", two(0xF000, 0x580C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fasind", two(0xF000, 0x540C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fasinl", two(0xF000, 0x400C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fasinp", two(0xF000, 0x4C0C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fasins", two(0xF000, 0x440C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fasinw", two(0xF000, 0x500C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fasinx", two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fasinx", two(0xF000, 0x480C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fasinx", two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fatanb", two(0xF000, 0x580A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fatand", two(0xF000, 0x540A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fatanl", two(0xF000, 0x400A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fatanp", two(0xF000, 0x4C0A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fatans", two(0xF000, 0x440A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fatanw", two(0xF000, 0x500A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fatanx", two(0xF000, 0x000A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fatanx", two(0xF000, 0x480A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fatanx", two(0xF000, 0x000A), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fatanhb", two(0xF000, 0x580D), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fatanhd", two(0xF000, 0x540D), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fatanhl", two(0xF000, 0x400D), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fatanhp", two(0xF000, 0x4C0D), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fatanhs", two(0xF000, 0x440D), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fatanhw", two(0xF000, 0x500D), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fatanhx", two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fatanhx", two(0xF000, 0x480D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fatanhx", two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fbeq", one(0xF081), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbf", one(0xF080), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbge", one(0xF093), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbgl", one(0xF096), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbgle", one(0xF097), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbgt", one(0xF092), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fble", one(0xF095), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fblt", one(0xF094), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbne", one(0xF08E), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbnge", one(0xF09C), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbngl", one(0xF099), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbngle", one(0xF098), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbngt", one(0xF09D), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbnle", one(0xF09A), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbnlt", one(0xF09B), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fboge", one(0xF083), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbogl", one(0xF086), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbogt", one(0xF082), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbole", one(0xF085), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbolt", one(0xF084), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbor", one(0xF087), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbseq", one(0xF091), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbsf", one(0xF090), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbsne", one(0xF09E), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbst", one(0xF09F), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbt", one(0xF08F), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbueq", one(0xF089), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbuge", one(0xF08B), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbugt", one(0xF08A), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbule", one(0xF08D), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbult", one(0xF08C), one(0xF1FF), "IdBW", mfloat | cfloat }, -{"fbun", one(0xF088), one(0xF1FF), "IdBW", mfloat | cfloat }, - -{"fbeql", one(0xF0C1), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbfl", one(0xF0C0), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbgel", one(0xF0D3), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbgll", one(0xF0D6), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbglel", one(0xF0D7), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbgtl", one(0xF0D2), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fblel", one(0xF0D5), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbltl", one(0xF0D4), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbnel", one(0xF0CE), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbngel", one(0xF0DC), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbngll", one(0xF0D9), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbnglel", one(0xF0D8), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbngtl", one(0xF0DD), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbnlel", one(0xF0DA), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbnltl", one(0xF0DB), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbogel", one(0xF0C3), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbogll", one(0xF0C6), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbogtl", one(0xF0C2), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbolel", one(0xF0C5), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fboltl", one(0xF0C4), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fborl", one(0xF0C7), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbseql", one(0xF0D1), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbsfl", one(0xF0D0), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbsnel", one(0xF0DE), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbstl", one(0xF0DF), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbtl", one(0xF0CF), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbueql", one(0xF0C9), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbugel", one(0xF0CB), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbugtl", one(0xF0CA), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbulel", one(0xF0CD), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbultl", one(0xF0CC), one(0xF1FF), "IdBC", mfloat | cfloat }, -{"fbunl", one(0xF0C8), one(0xF1FF), "IdBC", mfloat | cfloat }, - -{"fjeq", one(0xF081), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjf", one(0xF080), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjge", one(0xF093), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjgl", one(0xF096), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjgle", one(0xF097), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjgt", one(0xF092), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjle", one(0xF095), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjlt", one(0xF094), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjne", one(0xF08E), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjnge", one(0xF09C), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjngl", one(0xF099), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjngle", one(0xF098), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjngt", one(0xF09D), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjnle", one(0xF09A), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjnlt", one(0xF09B), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjoge", one(0xF083), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjogl", one(0xF086), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjogt", one(0xF082), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjole", one(0xF085), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjolt", one(0xF084), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjor", one(0xF087), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjseq", one(0xF091), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjsf", one(0xF090), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjsne", one(0xF09E), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjst", one(0xF09F), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjt", one(0xF08F), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjueq", one(0xF089), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjuge", one(0xF08B), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjugt", one(0xF08A), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjule", one(0xF08D), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjult", one(0xF08C), one(0xF1BF), "IdBc", mfloat | cfloat }, -{"fjun", one(0xF088), one(0xF1BF), "IdBc", mfloat | cfloat }, - -{"fcmpb", two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fcmpb", two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fcmpd", two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fcmpd", two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fcmpd", two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fcmpl", two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fcmpl", two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fcmpp", two(0xF000, 0x4C38), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fcmps", two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fcmps", two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fcmpw", two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fcmpw", two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fcmpx", two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fcmpx", two(0xF000, 0x4838), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, - -{"fcosb", two(0xF000, 0x581D), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fcosd", two(0xF000, 0x541D), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fcosl", two(0xF000, 0x401D), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fcosp", two(0xF000, 0x4C1D), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fcoss", two(0xF000, 0x441D), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fcosw", two(0xF000, 0x501D), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fcosx", two(0xF000, 0x001D), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fcosx", two(0xF000, 0x481D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fcosx", two(0xF000, 0x001D), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fcoshb", two(0xF000, 0x5819), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fcoshd", two(0xF000, 0x5419), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fcoshl", two(0xF000, 0x4019), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fcoshp", two(0xF000, 0x4C19), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fcoshs", two(0xF000, 0x4419), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fcoshw", two(0xF000, 0x5019), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fcoshx", two(0xF000, 0x0019), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fcoshx", two(0xF000, 0x4819), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fcoshx", two(0xF000, 0x0019), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fdbeq", two(0xF048, 0x0001), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbf", two(0xF048, 0x0000), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbge", two(0xF048, 0x0013), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbgl", two(0xF048, 0x0016), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbgle", two(0xF048, 0x0017), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbgt", two(0xF048, 0x0012), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdble", two(0xF048, 0x0015), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdblt", two(0xF048, 0x0014), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbne", two(0xF048, 0x000E), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbnge", two(0xF048, 0x001C), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbngl", two(0xF048, 0x0019), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbngle", two(0xF048, 0x0018), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbngt", two(0xF048, 0x001D), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbnle", two(0xF048, 0x001A), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbnlt", two(0xF048, 0x001B), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdboge", two(0xF048, 0x0003), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbogl", two(0xF048, 0x0006), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbogt", two(0xF048, 0x0002), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbole", two(0xF048, 0x0005), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbolt", two(0xF048, 0x0004), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbor", two(0xF048, 0x0007), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbseq", two(0xF048, 0x0011), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbsf", two(0xF048, 0x0010), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbsne", two(0xF048, 0x001E), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbst", two(0xF048, 0x001F), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbt", two(0xF048, 0x000F), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbueq", two(0xF048, 0x0009), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbuge", two(0xF048, 0x000B), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbugt", two(0xF048, 0x000A), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbule", two(0xF048, 0x000D), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbult", two(0xF048, 0x000C), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, -{"fdbun", two(0xF048, 0x0008), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, - -{"fdivb", two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fdivb", two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdivd", two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fdivd", two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fdivd", two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fdivl", two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fdivl", two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdivp", two(0xF000, 0x4C20), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fdivs", two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fdivs", two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdivw", two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fdivw", two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdivx", two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fdivx", two(0xF000, 0x4820), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, - -{"fsdivb", two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fsdivb", two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsdivd", two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fsdivd", two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fsdivd", two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fsdivl", two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fsdivl", two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsdivp", two(0xF000, 0x4C60), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fsdivs", two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fsdivs", two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsdivw", two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fsdivw", two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsdivx", two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fsdivx", two(0xF000, 0x4860), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, - -{"fddivb", two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fddivb", two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fddivd", two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fddivd", two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fddivd", two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fddivl", two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fddivl", two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fddivp", two(0xF000, 0x4C64), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fddivs", two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fddivs", two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fddivw", two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fddivw", two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fddivx", two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fddivx", two(0xF000, 0x4864), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, - -{"fetoxb", two(0xF000, 0x5810), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fetoxd", two(0xF000, 0x5410), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fetoxl", two(0xF000, 0x4010), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fetoxp", two(0xF000, 0x4C10), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fetoxs", two(0xF000, 0x4410), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fetoxw", two(0xF000, 0x5010), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fetoxx", two(0xF000, 0x0010), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fetoxx", two(0xF000, 0x4810), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fetoxx", two(0xF000, 0x0010), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fetoxm1b", two(0xF000, 0x5808), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fetoxm1d", two(0xF000, 0x5408), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fetoxm1l", two(0xF000, 0x4008), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fetoxm1p", two(0xF000, 0x4C08), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fetoxm1s", two(0xF000, 0x4408), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fetoxm1w", two(0xF000, 0x5008), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fetoxm1x", two(0xF000, 0x0008), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fetoxm1x", two(0xF000, 0x4808), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fetoxm1x", two(0xF000, 0x0008), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fgetexpb", two(0xF000, 0x581E), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fgetexpd", two(0xF000, 0x541E), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fgetexpl", two(0xF000, 0x401E), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fgetexpp", two(0xF000, 0x4C1E), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fgetexps", two(0xF000, 0x441E), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fgetexpw", two(0xF000, 0x501E), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fgetexpx", two(0xF000, 0x001E), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fgetexpx", two(0xF000, 0x481E), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fgetexpx", two(0xF000, 0x001E), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fgetmanb", two(0xF000, 0x581F), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fgetmand", two(0xF000, 0x541F), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fgetmanl", two(0xF000, 0x401F), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fgetmanp", two(0xF000, 0x4C1F), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fgetmans", two(0xF000, 0x441F), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fgetmanw", two(0xF000, 0x501F), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fgetmanx", two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fgetmanx", two(0xF000, 0x481F), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fgetmanx", two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fintb", two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fintb", two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fintd", two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fintd", two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fintd", two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fintd", two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fintl", two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fintl", two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fintp", two(0xF000, 0x4C01), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fints", two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fints", two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fintw", two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fintw", two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fintx", two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fintx", two(0xF000, 0x4801), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fintx", two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fintrzb", two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fintrzb", two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fintrzd", two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fintrzd", two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fintrzd", two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fintrzd", two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fintrzl", two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fintrzl", two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fintrzp", two(0xF000, 0x4C03), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fintrzs", two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fintrzs", two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fintrzw", two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fintrzw", two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fintrzx", two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fintrzx", two(0xF000, 0x4803), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fintrzx", two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"flog10b", two(0xF000, 0x5815), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"flog10d", two(0xF000, 0x5415), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"flog10l", two(0xF000, 0x4015), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"flog10p", two(0xF000, 0x4C15), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"flog10s", two(0xF000, 0x4415), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"flog10w", two(0xF000, 0x5015), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"flog10x", two(0xF000, 0x0015), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"flog10x", two(0xF000, 0x4815), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"flog10x", two(0xF000, 0x0015), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"flog2b", two(0xF000, 0x5816), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"flog2d", two(0xF000, 0x5416), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"flog2l", two(0xF000, 0x4016), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"flog2p", two(0xF000, 0x4C16), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"flog2s", two(0xF000, 0x4416), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"flog2w", two(0xF000, 0x5016), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"flog2x", two(0xF000, 0x0016), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"flog2x", two(0xF000, 0x4816), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"flog2x", two(0xF000, 0x0016), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"flognb", two(0xF000, 0x5814), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"flognd", two(0xF000, 0x5414), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"flognl", two(0xF000, 0x4014), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"flognp", two(0xF000, 0x4C14), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"flogns", two(0xF000, 0x4414), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"flognw", two(0xF000, 0x5014), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"flognx", two(0xF000, 0x0014), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"flognx", two(0xF000, 0x4814), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"flognx", two(0xF000, 0x0014), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"flognp1b", two(0xF000, 0x5806), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"flognp1d", two(0xF000, 0x5406), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"flognp1l", two(0xF000, 0x4006), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"flognp1p", two(0xF000, 0x4C06), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"flognp1s", two(0xF000, 0x4406), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"flognp1w", two(0xF000, 0x5006), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"flognp1x", two(0xF000, 0x0006), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"flognp1x", two(0xF000, 0x4806), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"flognp1x", two(0xF000, 0x0006), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fmodb", two(0xF000, 0x5821), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fmodd", two(0xF000, 0x5421), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fmodl", two(0xF000, 0x4021), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fmodp", two(0xF000, 0x4C21), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fmods", two(0xF000, 0x4421), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fmodw", two(0xF000, 0x5021), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fmodx", two(0xF000, 0x0021), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fmodx", two(0xF000, 0x4821), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, - -{"fmoveb", two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fmoveb", two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat }, -{"fmoveb", two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fmoveb", two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7$b", mfloat }, -{"fmoved", two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fmoved", two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7~F", mfloat }, -{"fmoved", two(0xF000, 0x0000), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fmoved", two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fmoved", two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat }, -{"fmovel", two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fmovel", two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7$l", mfloat }, +{"fabsb", 4, two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fabsb", 4, two(0xF000, 0x5818), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fabsd", 4, two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fabsd", 4, two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fabsd", 4, two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fabsd", 4, two(0xF000, 0x5418), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fabsl", 4, two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fabsl", 4, two(0xF000, 0x4018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fabsp", 4, two(0xF000, 0x4C18), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fabss", 4, two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", cfloat }, +{"fabss", 4, two(0xF000, 0x4418), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fabsw", 4, two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fabsw", 4, two(0xF000, 0x5018), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fabsx", 4, two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fabsx", 4, two(0xF000, 0x4818), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fabsx", 4, two(0xF000, 0x0018), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fsabsb", 4, two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fsabsb", 4, two(0xF000, 0x5858), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsabsd", 4, two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fsabsd", 4, two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fsabsd", 4, two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fsabsd", 4, two(0xF000, 0x5458), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fsabsl", 4, two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fsabsl", 4, two(0xF000, 0x4058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsabsp", 4, two(0xF000, 0x4C58), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fsabss", 4, two(0xF000, 0x4258), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsabss", 4, two(0xF000, 0x4458), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fsabsw", 4, two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fsabsw", 4, two(0xF000, 0x5058), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsabsx", 4, two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fsabsx", 4, two(0xF000, 0x4858), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fsabsx", 4, two(0xF000, 0x0058), two(0xF1C0, 0xE07F), "IiFt", m68040up }, + +{"fdabsb", 4, two(0xF000, 0x585C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdabsb", 4, two(0xF000, 0x585c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up}, +{"fdabsd", 4, two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fdabsd", 4, two(0xF000, 0x005C), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fdabsd", 4, two(0xF000, 0x545C), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fdabsd", 4, two(0xF000, 0x545c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up}, +{"fdabsl", 4, two(0xF000, 0x405C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdabsl", 4, two(0xF000, 0x405c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up}, +{"fdabsp", 4, two(0xF000, 0x4C5c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up}, +{"fdabss", 4, two(0xF000, 0x425C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdabss", 4, two(0xF000, 0x445c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up}, +{"fdabsw", 4, two(0xF000, 0x505C), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdabsw", 4, two(0xF000, 0x505c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up}, +{"fdabsx", 4, two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up}, +{"fdabsx", 4, two(0xF000, 0x485c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up}, +{"fdabsx", 4, two(0xF000, 0x005c), two(0xF1C0, 0xE07F), "IiFt", m68040up}, + +{"facosb", 4, two(0xF000, 0x581C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"facosd", 4, two(0xF000, 0x541C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"facosl", 4, two(0xF000, 0x401C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"facosp", 4, two(0xF000, 0x4C1C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"facoss", 4, two(0xF000, 0x441C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"facosw", 4, two(0xF000, 0x501C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"facosx", 4, two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"facosx", 4, two(0xF000, 0x481C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"facosx", 4, two(0xF000, 0x001C), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"faddb", 4, two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"faddb", 4, two(0xF000, 0x5822), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"faddd", 4, two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"faddd", 4, two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"faddd", 4, two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"faddd", 4, two(0xF000, 0x5422), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"faddl", 4, two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"faddl", 4, two(0xF000, 0x4022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"faddp", 4, two(0xF000, 0x4C22), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fadds", 4, two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fadds", 4, two(0xF000, 0x4422), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"faddw", 4, two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"faddw", 4, two(0xF000, 0x5022), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"faddx", 4, two(0xF000, 0x0022), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"faddx", 4, two(0xF000, 0x4822), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, + +{"fsaddb", 4, two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fsaddb", 4, two(0xF000, 0x5862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsaddd", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fsaddd", 4, two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fsaddd", 4, two(0xF000, 0x5462), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fsaddl", 4, two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fsaddl", 4, two(0xF000, 0x4062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsaddp", 4, two(0xF000, 0x4C62), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fsadds", 4, two(0xF000, 0x4462), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fsadds", 4, two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsaddw", 4, two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fsaddw", 4, two(0xF000, 0x5062), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsaddx", 4, two(0xF000, 0x0062), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fsaddx", 4, two(0xF000, 0x4862), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, + +{"fdaddb", 4, two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdaddb", 4, two(0xF000, 0x5866), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fdaddd", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fdaddd", 4, two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdaddd", 4, two(0xF000, 0x5466), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fdaddl", 4, two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fdaddl", 4, two(0xF000, 0x4066), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fdaddp", 4, two(0xF000, 0x4C66), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fdadds", 4, two(0xF000, 0x4466), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fdadds", 4, two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdaddw", 4, two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdaddw", 4, two(0xF000, 0x5066), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fdaddx", 4, two(0xF000, 0x0066), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fdaddx", 4, two(0xF000, 0x4866), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, + +{"fasinb", 4, two(0xF000, 0x580C), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fasind", 4, two(0xF000, 0x540C), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fasinl", 4, two(0xF000, 0x400C), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fasinp", 4, two(0xF000, 0x4C0C), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fasins", 4, two(0xF000, 0x440C), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fasinw", 4, two(0xF000, 0x500C), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fasinx", 4, two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fasinx", 4, two(0xF000, 0x480C), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fasinx", 4, two(0xF000, 0x000C), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fatanb", 4, two(0xF000, 0x580A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fatand", 4, two(0xF000, 0x540A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fatanl", 4, two(0xF000, 0x400A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fatanp", 4, two(0xF000, 0x4C0A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fatans", 4, two(0xF000, 0x440A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fatanw", 4, two(0xF000, 0x500A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fatanx", 4, two(0xF000, 0x000A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fatanx", 4, two(0xF000, 0x480A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fatanx", 4, two(0xF000, 0x000A), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fatanhb", 4, two(0xF000, 0x580D), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fatanhd", 4, two(0xF000, 0x540D), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fatanhl", 4, two(0xF000, 0x400D), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fatanhp", 4, two(0xF000, 0x4C0D), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fatanhs", 4, two(0xF000, 0x440D), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fatanhw", 4, two(0xF000, 0x500D), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fatanhx", 4, two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fatanhx", 4, two(0xF000, 0x480D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fatanhx", 4, two(0xF000, 0x000D), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fbeq", 2, one(0xF081), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbf", 2, one(0xF080), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbge", 2, one(0xF093), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbgl", 2, one(0xF096), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbgle", 2, one(0xF097), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbgt", 2, one(0xF092), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fble", 2, one(0xF095), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fblt", 2, one(0xF094), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbne", 2, one(0xF08E), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbnge", 2, one(0xF09C), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbngl", 2, one(0xF099), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbngle", 2, one(0xF098), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbngt", 2, one(0xF09D), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbnle", 2, one(0xF09A), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbnlt", 2, one(0xF09B), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fboge", 2, one(0xF083), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbogl", 2, one(0xF086), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbogt", 2, one(0xF082), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbole", 2, one(0xF085), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbolt", 2, one(0xF084), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbor", 2, one(0xF087), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbseq", 2, one(0xF091), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbsf", 2, one(0xF090), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbsne", 2, one(0xF09E), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbst", 2, one(0xF09F), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbt", 2, one(0xF08F), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbueq", 2, one(0xF089), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbuge", 2, one(0xF08B), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbugt", 2, one(0xF08A), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbule", 2, one(0xF08D), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbult", 2, one(0xF08C), one(0xF1FF), "IdBW", mfloat | cfloat }, +{"fbun", 2, one(0xF088), one(0xF1FF), "IdBW", mfloat | cfloat }, + +{"fbeql", 2, one(0xF0C1), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbfl", 2, one(0xF0C0), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbgel", 2, one(0xF0D3), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbgll", 2, one(0xF0D6), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbglel", 2, one(0xF0D7), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbgtl", 2, one(0xF0D2), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fblel", 2, one(0xF0D5), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbltl", 2, one(0xF0D4), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbnel", 2, one(0xF0CE), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbngel", 2, one(0xF0DC), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbngll", 2, one(0xF0D9), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbnglel", 2, one(0xF0D8), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbngtl", 2, one(0xF0DD), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbnlel", 2, one(0xF0DA), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbnltl", 2, one(0xF0DB), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbogel", 2, one(0xF0C3), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbogll", 2, one(0xF0C6), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbogtl", 2, one(0xF0C2), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbolel", 2, one(0xF0C5), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fboltl", 2, one(0xF0C4), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fborl", 2, one(0xF0C7), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbseql", 2, one(0xF0D1), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbsfl", 2, one(0xF0D0), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbsnel", 2, one(0xF0DE), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbstl", 2, one(0xF0DF), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbtl", 2, one(0xF0CF), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbueql", 2, one(0xF0C9), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbugel", 2, one(0xF0CB), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbugtl", 2, one(0xF0CA), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbulel", 2, one(0xF0CD), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbultl", 2, one(0xF0CC), one(0xF1FF), "IdBC", mfloat | cfloat }, +{"fbunl", 2, one(0xF0C8), one(0xF1FF), "IdBC", mfloat | cfloat }, + +{"fjeq", 2, one(0xF081), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjf", 2, one(0xF080), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjge", 2, one(0xF093), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjgl", 2, one(0xF096), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjgle", 2, one(0xF097), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjgt", 2, one(0xF092), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjle", 2, one(0xF095), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjlt", 2, one(0xF094), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjne", 2, one(0xF08E), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjnge", 2, one(0xF09C), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjngl", 2, one(0xF099), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjngle", 2, one(0xF098), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjngt", 2, one(0xF09D), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjnle", 2, one(0xF09A), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjnlt", 2, one(0xF09B), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjoge", 2, one(0xF083), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjogl", 2, one(0xF086), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjogt", 2, one(0xF082), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjole", 2, one(0xF085), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjolt", 2, one(0xF084), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjor", 2, one(0xF087), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjseq", 2, one(0xF091), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjsf", 2, one(0xF090), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjsne", 2, one(0xF09E), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjst", 2, one(0xF09F), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjt", 2, one(0xF08F), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjueq", 2, one(0xF089), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjuge", 2, one(0xF08B), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjugt", 2, one(0xF08A), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjule", 2, one(0xF08D), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjult", 2, one(0xF08C), one(0xF1BF), "IdBc", mfloat | cfloat }, +{"fjun", 2, one(0xF088), one(0xF1BF), "IdBc", mfloat | cfloat }, + +{"fcmpb", 4, two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fcmpb", 4, two(0xF000, 0x5838), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fcmpd", 4, two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fcmpd", 4, two(0xF000, 0x5438), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fcmpd", 4, two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fcmpl", 4, two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fcmpl", 4, two(0xF000, 0x4038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fcmpp", 4, two(0xF000, 0x4C38), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fcmps", 4, two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fcmps", 4, two(0xF000, 0x4438), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fcmpw", 4, two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fcmpw", 4, two(0xF000, 0x5038), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fcmpx", 4, two(0xF000, 0x0038), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fcmpx", 4, two(0xF000, 0x4838), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, + +{"fcosb", 4, two(0xF000, 0x581D), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fcosd", 4, two(0xF000, 0x541D), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fcosl", 4, two(0xF000, 0x401D), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fcosp", 4, two(0xF000, 0x4C1D), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fcoss", 4, two(0xF000, 0x441D), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fcosw", 4, two(0xF000, 0x501D), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fcosx", 4, two(0xF000, 0x001D), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fcosx", 4, two(0xF000, 0x481D), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fcosx", 4, two(0xF000, 0x001D), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fcoshb", 4, two(0xF000, 0x5819), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fcoshd", 4, two(0xF000, 0x5419), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fcoshl", 4, two(0xF000, 0x4019), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fcoshp", 4, two(0xF000, 0x4C19), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fcoshs", 4, two(0xF000, 0x4419), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fcoshw", 4, two(0xF000, 0x5019), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fcoshx", 4, two(0xF000, 0x0019), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fcoshx", 4, two(0xF000, 0x4819), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fcoshx", 4, two(0xF000, 0x0019), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fdbeq", 4, two(0xF048, 0x0001), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbf", 4, two(0xF048, 0x0000), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbge", 4, two(0xF048, 0x0013), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbgl", 4, two(0xF048, 0x0016), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbgle", 4, two(0xF048, 0x0017), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbgt", 4, two(0xF048, 0x0012), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdble", 4, two(0xF048, 0x0015), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdblt", 4, two(0xF048, 0x0014), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbne", 4, two(0xF048, 0x000E), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbnge", 4, two(0xF048, 0x001C), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbngl", 4, two(0xF048, 0x0019), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbngle", 4, two(0xF048, 0x0018), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbngt", 4, two(0xF048, 0x001D), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbnle", 4, two(0xF048, 0x001A), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbnlt", 4, two(0xF048, 0x001B), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdboge", 4, two(0xF048, 0x0003), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbogl", 4, two(0xF048, 0x0006), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbogt", 4, two(0xF048, 0x0002), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbole", 4, two(0xF048, 0x0005), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbolt", 4, two(0xF048, 0x0004), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbor", 4, two(0xF048, 0x0007), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbseq", 4, two(0xF048, 0x0011), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbsf", 4, two(0xF048, 0x0010), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbsne", 4, two(0xF048, 0x001E), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbst", 4, two(0xF048, 0x001F), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbt", 4, two(0xF048, 0x000F), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbueq", 4, two(0xF048, 0x0009), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbuge", 4, two(0xF048, 0x000B), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbugt", 4, two(0xF048, 0x000A), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbule", 4, two(0xF048, 0x000D), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbult", 4, two(0xF048, 0x000C), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, +{"fdbun", 4, two(0xF048, 0x0008), two(0xF1F8, 0xFFFF), "IiDsBw", mfloat }, + +{"fdivb", 4, two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fdivb", 4, two(0xF000, 0x5820), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdivd", 4, two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fdivd", 4, two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fdivd", 4, two(0xF000, 0x5420), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fdivl", 4, two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fdivl", 4, two(0xF000, 0x4020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdivp", 4, two(0xF000, 0x4C20), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fdivs", 4, two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fdivs", 4, two(0xF000, 0x4420), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdivw", 4, two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fdivw", 4, two(0xF000, 0x5020), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdivx", 4, two(0xF000, 0x0020), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fdivx", 4, two(0xF000, 0x4820), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, + +{"fsdivb", 4, two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fsdivb", 4, two(0xF000, 0x5860), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsdivd", 4, two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fsdivd", 4, two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fsdivd", 4, two(0xF000, 0x5460), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fsdivl", 4, two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fsdivl", 4, two(0xF000, 0x4060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsdivp", 4, two(0xF000, 0x4C60), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fsdivs", 4, two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fsdivs", 4, two(0xF000, 0x4460), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsdivw", 4, two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fsdivw", 4, two(0xF000, 0x5060), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsdivx", 4, two(0xF000, 0x0060), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fsdivx", 4, two(0xF000, 0x4860), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, + +{"fddivb", 4, two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fddivb", 4, two(0xF000, 0x5864), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fddivd", 4, two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fddivd", 4, two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fddivd", 4, two(0xF000, 0x5464), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fddivl", 4, two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fddivl", 4, two(0xF000, 0x4064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fddivp", 4, two(0xF000, 0x4C64), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fddivs", 4, two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fddivs", 4, two(0xF000, 0x4464), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fddivw", 4, two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fddivw", 4, two(0xF000, 0x5064), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fddivx", 4, two(0xF000, 0x0064), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fddivx", 4, two(0xF000, 0x4864), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, + +{"fetoxb", 4, two(0xF000, 0x5810), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fetoxd", 4, two(0xF000, 0x5410), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fetoxl", 4, two(0xF000, 0x4010), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fetoxp", 4, two(0xF000, 0x4C10), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fetoxs", 4, two(0xF000, 0x4410), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fetoxw", 4, two(0xF000, 0x5010), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fetoxx", 4, two(0xF000, 0x0010), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fetoxx", 4, two(0xF000, 0x4810), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fetoxx", 4, two(0xF000, 0x0010), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fetoxm1b", 4, two(0xF000, 0x5808), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fetoxm1d", 4, two(0xF000, 0x5408), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fetoxm1l", 4, two(0xF000, 0x4008), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fetoxm1p", 4, two(0xF000, 0x4C08), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fetoxm1s", 4, two(0xF000, 0x4408), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fetoxm1w", 4, two(0xF000, 0x5008), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fetoxm1x", 4, two(0xF000, 0x0008), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fetoxm1x", 4, two(0xF000, 0x4808), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fetoxm1x", 4, two(0xF000, 0x0008), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fgetexpb", 4, two(0xF000, 0x581E), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fgetexpd", 4, two(0xF000, 0x541E), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fgetexpl", 4, two(0xF000, 0x401E), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fgetexpp", 4, two(0xF000, 0x4C1E), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fgetexps", 4, two(0xF000, 0x441E), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fgetexpw", 4, two(0xF000, 0x501E), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fgetexpx", 4, two(0xF000, 0x001E), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fgetexpx", 4, two(0xF000, 0x481E), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fgetexpx", 4, two(0xF000, 0x001E), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fgetmanb", 4, two(0xF000, 0x581F), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fgetmand", 4, two(0xF000, 0x541F), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fgetmanl", 4, two(0xF000, 0x401F), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fgetmanp", 4, two(0xF000, 0x4C1F), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fgetmans", 4, two(0xF000, 0x441F), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fgetmanw", 4, two(0xF000, 0x501F), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fgetmanx", 4, two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fgetmanx", 4, two(0xF000, 0x481F), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fgetmanx", 4, two(0xF000, 0x001F), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fintb", 4, two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fintb", 4, two(0xF000, 0x5801), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fintd", 4, two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fintd", 4, two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fintd", 4, two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fintd", 4, two(0xF000, 0x5401), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fintl", 4, two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fintl", 4, two(0xF000, 0x4001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fintp", 4, two(0xF000, 0x4C01), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fints", 4, two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fints", 4, two(0xF000, 0x4401), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fintw", 4, two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fintw", 4, two(0xF000, 0x5001), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fintx", 4, two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fintx", 4, two(0xF000, 0x4801), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fintx", 4, two(0xF000, 0x0001), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fintrzb", 4, two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fintrzb", 4, two(0xF000, 0x5803), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fintrzd", 4, two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fintrzd", 4, two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fintrzd", 4, two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fintrzd", 4, two(0xF000, 0x5403), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fintrzl", 4, two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fintrzl", 4, two(0xF000, 0x4003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fintrzp", 4, two(0xF000, 0x4C03), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fintrzs", 4, two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fintrzs", 4, two(0xF000, 0x4403), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fintrzw", 4, two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fintrzw", 4, two(0xF000, 0x5003), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fintrzx", 4, two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fintrzx", 4, two(0xF000, 0x4803), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fintrzx", 4, two(0xF000, 0x0003), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"flog10b", 4, two(0xF000, 0x5815), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"flog10d", 4, two(0xF000, 0x5415), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"flog10l", 4, two(0xF000, 0x4015), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"flog10p", 4, two(0xF000, 0x4C15), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"flog10s", 4, two(0xF000, 0x4415), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"flog10w", 4, two(0xF000, 0x5015), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"flog10x", 4, two(0xF000, 0x0015), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"flog10x", 4, two(0xF000, 0x4815), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"flog10x", 4, two(0xF000, 0x0015), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"flog2b", 4, two(0xF000, 0x5816), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"flog2d", 4, two(0xF000, 0x5416), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"flog2l", 4, two(0xF000, 0x4016), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"flog2p", 4, two(0xF000, 0x4C16), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"flog2s", 4, two(0xF000, 0x4416), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"flog2w", 4, two(0xF000, 0x5016), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"flog2x", 4, two(0xF000, 0x0016), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"flog2x", 4, two(0xF000, 0x4816), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"flog2x", 4, two(0xF000, 0x0016), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"flognb", 4, two(0xF000, 0x5814), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"flognd", 4, two(0xF000, 0x5414), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"flognl", 4, two(0xF000, 0x4014), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"flognp", 4, two(0xF000, 0x4C14), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"flogns", 4, two(0xF000, 0x4414), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"flognw", 4, two(0xF000, 0x5014), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"flognx", 4, two(0xF000, 0x0014), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"flognx", 4, two(0xF000, 0x4814), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"flognx", 4, two(0xF000, 0x0014), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"flognp1b", 4, two(0xF000, 0x5806), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"flognp1d", 4, two(0xF000, 0x5406), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"flognp1l", 4, two(0xF000, 0x4006), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"flognp1p", 4, two(0xF000, 0x4C06), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"flognp1s", 4, two(0xF000, 0x4406), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"flognp1w", 4, two(0xF000, 0x5006), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"flognp1x", 4, two(0xF000, 0x0006), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"flognp1x", 4, two(0xF000, 0x4806), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"flognp1x", 4, two(0xF000, 0x0006), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fmodb", 4, two(0xF000, 0x5821), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fmodd", 4, two(0xF000, 0x5421), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fmodl", 4, two(0xF000, 0x4021), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fmodp", 4, two(0xF000, 0x4C21), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fmods", 4, two(0xF000, 0x4421), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fmodw", 4, two(0xF000, 0x5021), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fmodx", 4, two(0xF000, 0x0021), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fmodx", 4, two(0xF000, 0x4821), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, + +{"fmoveb", 4, two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fmoveb", 4, two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat }, +{"fmoveb", 4, two(0xF000, 0x5800), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fmoveb", 4, two(0xF000, 0x7800), two(0xF1C0, 0xFC7F), "IiF7$b", mfloat }, +{"fmoved", 4, two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fmoved", 4, two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7~F", mfloat }, +{"fmoved", 4, two(0xF000, 0x0000), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fmoved", 4, two(0xF000, 0x5400), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fmoved", 4, two(0xF000, 0x7400), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat }, +{"fmovel", 4, two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fmovel", 4, two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7$l", mfloat }, /* FIXME: the next two variants should not permit moving an address register to anything but the floating point instruction register. */ -{"fmovel", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat }, -{"fmovel", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ls8", mfloat }, -{"fmovel", two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fmovel", two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat }, - /* Move the FP control registers */ -{"fmovel", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8ps", cfloat }, -{"fmovel", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Iibss8", cfloat }, -{"fmovep", two(0xF000, 0x4C00), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fmovep", two(0xF000, 0x6C00), two(0xF1C0, 0xFC00), "IiF7~pkC", mfloat }, -{"fmovep", two(0xF000, 0x7C00), two(0xF1C0, 0xFC0F), "IiF7~pDk", mfloat }, -{"fmoves", two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fmoves", two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7$f", mfloat }, -{"fmoves", two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fmoves", two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fmovew", two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fmovew", two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7$w", mfloat }, -{"fmovew", two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fmovew", two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fmovex", two(0xF000, 0x0000), two(0xF1FF, 0xE07F), "IiF8F7", mfloat }, -{"fmovex", two(0xF000, 0x4800), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fmovex", two(0xF000, 0x6800), two(0xF1C0, 0xFC7F), "IiF7~x", mfloat }, - -{"fsmoveb", two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fsmoveb", two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsmoveb", two(0xF000, 0x7840), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fsmoved", two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fsmoved", two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fsmoved", two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fsmoved", two(0xF000, 0x7440), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat }, -{"fsmovel", two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fsmovel", two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsmovel", two(0xF000, 0x6040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fsmoves", two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fsmoves", two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsmoves", two(0xF000, 0x6440), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fsmovew", two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fsmovew", two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsmovew", two(0xF000, 0x7040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fsmovex", two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fsmovex", two(0xF000, 0x4840), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fsmovep", two(0xF000, 0x4C40), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, - -{"fdmoveb", two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fdmoveb", two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdmoveb", two(0xF000, 0x7844), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fdmoved", two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fdmoved", two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fdmoved", two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fdmoved", two(0xF000, 0x7444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fdmovel", two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fdmovel", two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdmovel", two(0xF000, 0x6044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fdmoves", two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fdmoves", two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdmoves", two(0xF000, 0x6444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fdmovew", two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fdmovew", two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdmovew", two(0xF000, 0x7044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, -{"fdmovex", two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fdmovex", two(0xF000, 0x4844), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fdmovep", two(0xF000, 0x4C44), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, - -{"fmovecrx", two(0xF000, 0x5C00), two(0xF1FF, 0xFC00), "Ii#CF7", mfloat }, - -{"fmovemd", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizsl3", cfloat }, -{"fmovemd", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat }, -{"fmovemd", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat }, -{"fmovemd", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Iil3ys", cfloat }, - -{"fmovemx", two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat }, -{"fmovemx", two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat }, -{"fmovemx", two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat }, -{"fmovemx", two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat }, -{"fmovemx", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat }, -{"fmovemx", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat }, -{"fmovemx", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat }, -{"fmovemx", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat }, -{"fmovemx", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat }, -{"fmovemx", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat }, -{"fmovemx", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat }, -{"fmovemx", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat }, - -{"fmoveml", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat }, -{"fmoveml", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat }, +{"fmovel", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat }, +{"fmovel", 4, two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ls8", mfloat }, +{"fmovel", 4, two(0xF000, 0x4000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fmovel", 4, two(0xF000, 0x6000), two(0xF1C0, 0xFC7F), "IiF7bs", cfloat }, + /* Move the FP control registers. */ +{"fmovel", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8ps", cfloat }, +{"fmovel", 4, two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Iibss8", cfloat }, +{"fmovep", 4, two(0xF000, 0x4C00), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fmovep", 4, two(0xF000, 0x6C00), two(0xF1C0, 0xFC00), "IiF7~pkC", mfloat }, +{"fmovep", 4, two(0xF000, 0x7C00), two(0xF1C0, 0xFC0F), "IiF7~pDk", mfloat }, +{"fmoves", 4, two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fmoves", 4, two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7$f", mfloat }, +{"fmoves", 4, two(0xF000, 0x4400), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fmoves", 4, two(0xF000, 0x6400), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fmovew", 4, two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fmovew", 4, two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7$w", mfloat }, +{"fmovew", 4, two(0xF000, 0x5000), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fmovew", 4, two(0xF000, 0x7000), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fmovex", 4, two(0xF000, 0x0000), two(0xF1FF, 0xE07F), "IiF8F7", mfloat }, +{"fmovex", 4, two(0xF000, 0x4800), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fmovex", 4, two(0xF000, 0x6800), two(0xF1C0, 0xFC7F), "IiF7~x", mfloat }, + +{"fsmoveb", 4, two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fsmoveb", 4, two(0xF000, 0x5840), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsmoveb", 4, two(0xF000, 0x7840), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fsmoved", 4, two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fsmoved", 4, two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fsmoved", 4, two(0xF000, 0x5440), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fsmoved", 4, two(0xF000, 0x7440), two(0xF1C0, 0xFC7F), "IiF7ws", cfloat }, +{"fsmovel", 4, two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fsmovel", 4, two(0xF000, 0x4040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsmovel", 4, two(0xF000, 0x6040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fsmoves", 4, two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fsmoves", 4, two(0xF000, 0x4440), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsmoves", 4, two(0xF000, 0x6440), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fsmovew", 4, two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fsmovew", 4, two(0xF000, 0x5040), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsmovew", 4, two(0xF000, 0x7040), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fsmovex", 4, two(0xF000, 0x0040), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fsmovex", 4, two(0xF000, 0x4840), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fsmovep", 4, two(0xF000, 0x4C40), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, + +{"fdmoveb", 4, two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fdmoveb", 4, two(0xF000, 0x5844), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdmoveb", 4, two(0xF000, 0x7844), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fdmoved", 4, two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fdmoved", 4, two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fdmoved", 4, two(0xF000, 0x5444), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fdmoved", 4, two(0xF000, 0x7444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fdmovel", 4, two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fdmovel", 4, two(0xF000, 0x4044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdmovel", 4, two(0xF000, 0x6044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fdmoves", 4, two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fdmoves", 4, two(0xF000, 0x4444), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdmoves", 4, two(0xF000, 0x6444), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fdmovew", 4, two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fdmovew", 4, two(0xF000, 0x5044), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdmovew", 4, two(0xF000, 0x7044), two(0xF1C0, 0xFC7F), "IiF7qs", cfloat }, +{"fdmovex", 4, two(0xF000, 0x0044), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fdmovex", 4, two(0xF000, 0x4844), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fdmovep", 4, two(0xF000, 0x4C44), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, + +{"fmovecrx", 4, two(0xF000, 0x5C00), two(0xF1FF, 0xFC00), "Ii#CF7", mfloat }, + +{"fmovemd", 4, two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizsl3", cfloat }, +{"fmovemd", 4, two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat }, +{"fmovemd", 4, two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat }, +{"fmovemd", 4, two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Iil3ys", cfloat }, + +{"fmovemx", 4, two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat }, +{"fmovemx", 4, two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat }, +{"fmovemx", 4, two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat }, +{"fmovemx", 4, two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat }, +{"fmovemx", 4, two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat }, +{"fmovemx", 4, two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat }, +{"fmovemx", 4, two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat }, +{"fmovemx", 4, two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat }, +{"fmovemx", 4, two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat }, +{"fmovemx", 4, two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat }, +{"fmovemx", 4, two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat }, +{"fmovemx", 4, two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat }, + +{"fmoveml", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat }, +{"fmoveml", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat }, /* FIXME: In the next instruction, we should only permit %dn if the target is a single register. We should only permit %an if the target is a single %fpiar. */ -{"fmoveml", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*lL8", mfloat }, - -{"fmovem", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "IizsL3", cfloat }, -{"fmovem", two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat }, -{"fmovem", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat }, -{"fmovem", two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "IiL3ys", cfloat }, - -{"fmovem", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat }, -{"fmovem", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat }, -{"fmovem", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat }, -{"fmovem", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat }, -{"fmovem", two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat }, -{"fmovem", two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat }, -{"fmovem", two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat }, -{"fmovem", two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat }, -{"fmovem", two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat }, -{"fmovem", two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat }, -{"fmovem", two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat }, -{"fmovem", two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat }, -{"fmovem", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat }, -{"fmovem", two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ss8", mfloat }, -{"fmovem", two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat }, -{"fmovem", two(0xF000, 0x8000), two(0xF2C0, 0xE3FF), "Ii*sL8", mfloat }, - -{"fmulb", two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fmulb", two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fmuld", two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fmuld", two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fmuld", two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fmull", two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fmull", two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fmulp", two(0xF000, 0x4C23), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fmuls", two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fmuls", two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fmulw", two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fmulw", two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fmulx", two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fmulx", two(0xF000, 0x4823), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, - -{"fsmulb", two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fsmulb", two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsmuld", two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fsmuld", two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fsmuld", two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fsmull", two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fsmull", two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsmulp", two(0xF000, 0x4C63), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fsmuls", two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fsmuls", two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsmulw", two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fsmulw", two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsmulx", two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fsmulx", two(0xF000, 0x4863), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, - -{"fdmulb", two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fdmulb", two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdmuld", two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fdmuld", two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fdmuld", two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fdmull", two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fdmull", two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdmulp", two(0xF000, 0x4C67), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fdmuls", two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fdmuls", two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdmulw", two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fdmulw", two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdmulx", two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fdmulx", two(0xF000, 0x4867), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, - -{"fnegb", two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fnegb", two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fnegd", two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fnegd", two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fnegd", two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fnegd", two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fnegl", two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fnegl", two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fnegp", two(0xF000, 0x4C1A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fnegs", two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fnegs", two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fnegw", two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fnegw", two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fnegx", two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fnegx", two(0xF000, 0x481A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fnegx", two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fsnegb", two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fsnegb", two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsnegd", two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fsnegd", two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fsnegd", two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fsnegd", two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fsnegl", two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fsnegl", two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsnegp", two(0xF000, 0x4C5A), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fsnegs", two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fsnegs", two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsnegw", two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fsnegw", two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsnegx", two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fsnegx", two(0xF000, 0x485A), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fsnegx", two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt", m68040up }, - -{"fdnegb", two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fdnegb", two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdnegd", two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fdnegd", two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fdnegd", two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fdnegd", two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fdnegl", two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fdnegl", two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdnegp", two(0xF000, 0x4C5E), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fdnegs", two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fdnegs", two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdnegw", two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fdnegw", two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdnegx", two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fdnegx", two(0xF000, 0x485E), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fdnegx", two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt", m68040up }, - -{"fnop", two(0xF280, 0x0000), two(0xFFFF, 0xFFFF), "Ii", mfloat | cfloat }, - -{"fremb", two(0xF000, 0x5825), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fremd", two(0xF000, 0x5425), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"freml", two(0xF000, 0x4025), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fremp", two(0xF000, 0x4C25), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"frems", two(0xF000, 0x4425), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fremw", two(0xF000, 0x5025), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fremx", two(0xF000, 0x0025), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fremx", two(0xF000, 0x4825), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, - -{"frestore", one(0xF140), one(0xF1C0), "Id<s", mfloat }, -{"frestore", one(0xF140), one(0xF1C0), "Idys", cfloat }, - -{"fsave", one(0xF100), one(0xF1C0), "Id>s", mfloat }, -{"fsave", one(0xF100), one(0xF1C0), "Idzs", cfloat }, - -{"fscaleb", two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fscaled", two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fscalel", two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fscalep", two(0xF000, 0x4C26), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fscales", two(0xF000, 0x4426), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fscalew", two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fscalex", two(0xF000, 0x0026), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fscalex", two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fmoveml", 4, two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*lL8", mfloat }, + +{"fmovem", 4, two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "IizsL3", cfloat }, +{"fmovem", 4, two(0xF000, 0xD000), two(0xFFC0, 0xFF00), "Iizs#3", cfloat }, +{"fmovem", 4, two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "Ii#3ys", cfloat }, +{"fmovem", 4, two(0xF000, 0xF000), two(0xFFC0, 0xFF00), "IiL3ys", cfloat }, + +{"fmovem", 4, two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "IdL3-s", mfloat }, +{"fmovem", 4, two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Idl3&s", mfloat }, +{"fmovem", 4, two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+sl3", mfloat }, +{"fmovem", 4, two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&sl3", mfloat }, +{"fmovem", 4, two(0xF020, 0xE000), two(0xF1F8, 0xFF00), "Id#3-s", mfloat }, +{"fmovem", 4, two(0xF020, 0xE800), two(0xF1F8, 0xFF8F), "IiDk-s", mfloat }, +{"fmovem", 4, two(0xF000, 0xF000), two(0xF1C0, 0xFF00), "Id#3&s", mfloat }, +{"fmovem", 4, two(0xF000, 0xF800), two(0xF1C0, 0xFF8F), "IiDk&s", mfloat }, +{"fmovem", 4, two(0xF018, 0xD000), two(0xF1F8, 0xFF00), "Id+s#3", mfloat }, +{"fmovem", 4, two(0xF018, 0xD800), two(0xF1F8, 0xFF8F), "Ii+sDk", mfloat }, +{"fmovem", 4, two(0xF000, 0xD000), two(0xF1C0, 0xFF00), "Id&s#3", mfloat }, +{"fmovem", 4, two(0xF000, 0xD800), two(0xF1C0, 0xFF8F), "Ii&sDk", mfloat }, +{"fmovem", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "Iis8%s", mfloat }, +{"fmovem", 4, two(0xF000, 0x8000), two(0xF1C0, 0xE3FF), "Ii*ss8", mfloat }, +{"fmovem", 4, two(0xF000, 0xA000), two(0xF1C0, 0xE3FF), "IiL8~s", mfloat }, +{"fmovem", 4, two(0xF000, 0x8000), two(0xF2C0, 0xE3FF), "Ii*sL8", mfloat }, + +{"fmulb", 4, two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fmulb", 4, two(0xF000, 0x5823), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fmuld", 4, two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fmuld", 4, two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fmuld", 4, two(0xF000, 0x5423), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fmull", 4, two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fmull", 4, two(0xF000, 0x4023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fmulp", 4, two(0xF000, 0x4C23), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fmuls", 4, two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fmuls", 4, two(0xF000, 0x4423), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fmulw", 4, two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fmulw", 4, two(0xF000, 0x5023), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fmulx", 4, two(0xF000, 0x0023), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fmulx", 4, two(0xF000, 0x4823), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, + +{"fsmulb", 4, two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fsmulb", 4, two(0xF000, 0x5863), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsmuld", 4, two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fsmuld", 4, two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fsmuld", 4, two(0xF000, 0x5463), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fsmull", 4, two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fsmull", 4, two(0xF000, 0x4063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsmulp", 4, two(0xF000, 0x4C63), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fsmuls", 4, two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fsmuls", 4, two(0xF000, 0x4463), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsmulw", 4, two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fsmulw", 4, two(0xF000, 0x5063), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsmulx", 4, two(0xF000, 0x0063), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fsmulx", 4, two(0xF000, 0x4863), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, + +{"fdmulb", 4, two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fdmulb", 4, two(0xF000, 0x5867), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdmuld", 4, two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fdmuld", 4, two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fdmuld", 4, two(0xF000, 0x5467), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fdmull", 4, two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fdmull", 4, two(0xF000, 0x4067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdmulp", 4, two(0xF000, 0x4C67), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fdmuls", 4, two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fdmuls", 4, two(0xF000, 0x4467), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdmulw", 4, two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fdmulw", 4, two(0xF000, 0x5067), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdmulx", 4, two(0xF000, 0x0067), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fdmulx", 4, two(0xF000, 0x4867), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, + +{"fnegb", 4, two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fnegb", 4, two(0xF000, 0x581A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fnegd", 4, two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fnegd", 4, two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fnegd", 4, two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fnegd", 4, two(0xF000, 0x541A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fnegl", 4, two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fnegl", 4, two(0xF000, 0x401A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fnegp", 4, two(0xF000, 0x4C1A), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fnegs", 4, two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fnegs", 4, two(0xF000, 0x441A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fnegw", 4, two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fnegw", 4, two(0xF000, 0x501A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fnegx", 4, two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fnegx", 4, two(0xF000, 0x481A), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fnegx", 4, two(0xF000, 0x001A), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fsnegb", 4, two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fsnegb", 4, two(0xF000, 0x585A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsnegd", 4, two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fsnegd", 4, two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fsnegd", 4, two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fsnegd", 4, two(0xF000, 0x545A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fsnegl", 4, two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fsnegl", 4, two(0xF000, 0x405A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsnegp", 4, two(0xF000, 0x4C5A), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fsnegs", 4, two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fsnegs", 4, two(0xF000, 0x445A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsnegw", 4, two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fsnegw", 4, two(0xF000, 0x505A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsnegx", 4, two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fsnegx", 4, two(0xF000, 0x485A), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fsnegx", 4, two(0xF000, 0x005A), two(0xF1C0, 0xE07F), "IiFt", m68040up }, + +{"fdnegb", 4, two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fdnegb", 4, two(0xF000, 0x585E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdnegd", 4, two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fdnegd", 4, two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fdnegd", 4, two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fdnegd", 4, two(0xF000, 0x545E), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fdnegl", 4, two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fdnegl", 4, two(0xF000, 0x405E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdnegp", 4, two(0xF000, 0x4C5E), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fdnegs", 4, two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fdnegs", 4, two(0xF000, 0x445E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdnegw", 4, two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fdnegw", 4, two(0xF000, 0x505E), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdnegx", 4, two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fdnegx", 4, two(0xF000, 0x485E), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fdnegx", 4, two(0xF000, 0x005E), two(0xF1C0, 0xE07F), "IiFt", m68040up }, + +{"fnop", 4, two(0xF280, 0x0000), two(0xFFFF, 0xFFFF), "Ii", mfloat | cfloat }, + +{"fremb", 4, two(0xF000, 0x5825), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fremd", 4, two(0xF000, 0x5425), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"freml", 4, two(0xF000, 0x4025), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fremp", 4, two(0xF000, 0x4C25), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"frems", 4, two(0xF000, 0x4425), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fremw", 4, two(0xF000, 0x5025), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fremx", 4, two(0xF000, 0x0025), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fremx", 4, two(0xF000, 0x4825), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, + +{"frestore", 2, one(0xF140), one(0xF1C0), "Id<s", mfloat }, +{"frestore", 2, one(0xF140), one(0xF1C0), "Idys", cfloat }, + +{"fsave", 2, one(0xF100), one(0xF1C0), "Id>s", mfloat }, +{"fsave", 2, one(0xF100), one(0xF1C0), "Idzs", cfloat }, + +{"fscaleb", 4, two(0xF000, 0x5826), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fscaled", 4, two(0xF000, 0x5426), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fscalel", 4, two(0xF000, 0x4026), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fscalep", 4, two(0xF000, 0x4C26), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fscales", 4, two(0xF000, 0x4426), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fscalew", 4, two(0xF000, 0x5026), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fscalex", 4, two(0xF000, 0x0026), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fscalex", 4, two(0xF000, 0x4826), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, /* $ is necessary to prevent the assembler from using PC-relative. - If @ were used, "label: fseq label" could produce "ftrapeq", + If @ were used, "label: fseq label" could produce "ftrapeq", 2, because "label" became "pc@label". */ -{"fseq", two(0xF040, 0x0001), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsf", two(0xF040, 0x0000), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsge", two(0xF040, 0x0013), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsgl", two(0xF040, 0x0016), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsgle", two(0xF040, 0x0017), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsgt", two(0xF040, 0x0012), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsle", two(0xF040, 0x0015), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fslt", two(0xF040, 0x0014), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsne", two(0xF040, 0x000E), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsnge", two(0xF040, 0x001C), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsngl", two(0xF040, 0x0019), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsngle", two(0xF040, 0x0018), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsngt", two(0xF040, 0x001D), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsnle", two(0xF040, 0x001A), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsnlt", two(0xF040, 0x001B), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsoge", two(0xF040, 0x0003), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsogl", two(0xF040, 0x0006), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsogt", two(0xF040, 0x0002), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsole", two(0xF040, 0x0005), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsolt", two(0xF040, 0x0004), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsor", two(0xF040, 0x0007), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsseq", two(0xF040, 0x0011), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fssf", two(0xF040, 0x0010), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fssne", two(0xF040, 0x001E), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsst", two(0xF040, 0x001F), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fst", two(0xF040, 0x000F), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsueq", two(0xF040, 0x0009), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsuge", two(0xF040, 0x000B), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsugt", two(0xF040, 0x000A), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsule", two(0xF040, 0x000D), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsult", two(0xF040, 0x000C), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, -{"fsun", two(0xF040, 0x0008), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, - -{"fsgldivb", two(0xF000, 0x5824), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fsgldivd", two(0xF000, 0x5424), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fsgldivl", two(0xF000, 0x4024), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fsgldivp", two(0xF000, 0x4C24), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fsgldivs", two(0xF000, 0x4424), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fsgldivw", two(0xF000, 0x5024), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fsgldivx", two(0xF000, 0x0024), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fsgldivx", two(0xF000, 0x4824), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fsgldivx", two(0xF000, 0x0024), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fsglmulb", two(0xF000, 0x5827), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fsglmuld", two(0xF000, 0x5427), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fsglmull", two(0xF000, 0x4027), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fsglmulp", two(0xF000, 0x4C27), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fsglmuls", two(0xF000, 0x4427), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fsglmulw", two(0xF000, 0x5027), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fsglmulx", two(0xF000, 0x0027), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fsglmulx", two(0xF000, 0x4827), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fsglmulx", two(0xF000, 0x0027), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fsinb", two(0xF000, 0x580E), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fsind", two(0xF000, 0x540E), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fsinl", two(0xF000, 0x400E), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fsinp", two(0xF000, 0x4C0E), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fsins", two(0xF000, 0x440E), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fsinw", two(0xF000, 0x500E), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fsinx", two(0xF000, 0x000E), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fsinx", two(0xF000, 0x480E), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fsinx", two(0xF000, 0x000E), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fsincosb", two(0xF000, 0x5830), two(0xF1C0, 0xFC78), "Ii;bF3F7", mfloat }, -{"fsincosd", two(0xF000, 0x5430), two(0xF1C0, 0xFC78), "Ii;FF3F7", mfloat }, -{"fsincosl", two(0xF000, 0x4030), two(0xF1C0, 0xFC78), "Ii;lF3F7", mfloat }, -{"fsincosp", two(0xF000, 0x4C30), two(0xF1C0, 0xFC78), "Ii;pF3F7", mfloat }, -{"fsincoss", two(0xF000, 0x4430), two(0xF1C0, 0xFC78), "Ii;fF3F7", mfloat }, -{"fsincosw", two(0xF000, 0x5030), two(0xF1C0, 0xFC78), "Ii;wF3F7", mfloat }, -{"fsincosx", two(0xF000, 0x0030), two(0xF1C0, 0xE078), "IiF8F3F7", mfloat }, -{"fsincosx", two(0xF000, 0x4830), two(0xF1C0, 0xFC78), "Ii;xF3F7", mfloat }, - -{"fsinhb", two(0xF000, 0x5802), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fsinhd", two(0xF000, 0x5402), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fsinhl", two(0xF000, 0x4002), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fsinhp", two(0xF000, 0x4C02), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fsinhs", two(0xF000, 0x4402), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fsinhw", two(0xF000, 0x5002), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fsinhx", two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fsinhx", two(0xF000, 0x4802), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fsinhx", two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fsqrtb", two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fsqrtb", two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsqrtd", two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fsqrtd", two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fsqrtd", two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fsqrtd", two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fsqrtl", two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fsqrtl", two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsqrtp", two(0xF000, 0x4C04), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fsqrts", two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fsqrts", two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsqrtw", two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fsqrtw", two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsqrtx", two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fsqrtx", two(0xF000, 0x4804), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fsqrtx", two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fssqrtb", two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fssqrtb", two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fssqrtd", two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fssqrtd", two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fssqrtd", two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fssqrtd", two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fssqrtl", two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fssqrtl", two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fssqrtp", two(0xF000, 0x4C41), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fssqrts", two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fssqrts", two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fssqrtw", two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fssqrtw", two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fssqrtx", two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fssqrtx", two(0xF000, 0x4841), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fssqrtx", two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt", m68040up }, - -{"fdsqrtb", two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fdsqrtb", two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdsqrtd", two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fdsqrtd", two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", cfloat }, -{"fdsqrtd", two(0xF000, 0x5445), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fdsqrtl", two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fdsqrtl", two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdsqrtp", two(0xF000, 0x4C45), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fdsqrts", two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fdsqrts", two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdsqrtw", two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fdsqrtw", two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdsqrtx", two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fdsqrtx", two(0xF000, 0x4845), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fdsqrtx", two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", m68040up }, - -{"fsubb", two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"fsubb", two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsubd", two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fsubd", two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"fsubd", two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fsubl", two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"fsubl", two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsubp", two(0xF000, 0x4C28), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"fsubs", two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"fsubs", two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsubw", two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"fsubw", two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fsubx", two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"fsubx", two(0xF000, 0x4828), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"fsubx", two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"fssubb", two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fssubb", two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fssubd", two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fssubd", two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fssubd", two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fssubl", two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fssubl", two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fssubp", two(0xF000, 0x4C68), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fssubs", two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fssubs", two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fssubw", two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fssubw", two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fssubx", two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fssubx", two(0xF000, 0x4868), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fssubx", two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiFt", m68040up }, - -{"fdsubb", two(0xF000, 0x586A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdsubb", two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, -{"fdsubd", two(0xF000, 0x006A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, -{"fdsubd", two(0xF000, 0x546A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, -{"fdsubd", two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, -{"fdsubl", two(0xF000, 0x406A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdsubl", two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, -{"fdsubp", two(0xF000, 0x4C6c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, -{"fdsubs", two(0xF000, 0x446A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdsubs", two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, -{"fdsubw", two(0xF000, 0x506A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, -{"fdsubw", two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, -{"fdsubx", two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, -{"fdsubx", two(0xF000, 0x486c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, -{"fdsubx", two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiFt", m68040up }, - -{"ftanb", two(0xF000, 0x580F), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"ftand", two(0xF000, 0x540F), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"ftanl", two(0xF000, 0x400F), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"ftanp", two(0xF000, 0x4C0F), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"ftans", two(0xF000, 0x440F), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"ftanw", two(0xF000, 0x500F), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"ftanx", two(0xF000, 0x000F), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"ftanx", two(0xF000, 0x480F), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"ftanx", two(0xF000, 0x000F), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"ftanhb", two(0xF000, 0x5809), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"ftanhd", two(0xF000, 0x5409), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"ftanhl", two(0xF000, 0x4009), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"ftanhp", two(0xF000, 0x4C09), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"ftanhs", two(0xF000, 0x4409), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"ftanhw", two(0xF000, 0x5009), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"ftanhx", two(0xF000, 0x0009), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"ftanhx", two(0xF000, 0x4809), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"ftanhx", two(0xF000, 0x0009), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"ftentoxb", two(0xF000, 0x5812), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"ftentoxd", two(0xF000, 0x5412), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"ftentoxl", two(0xF000, 0x4012), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"ftentoxp", two(0xF000, 0x4C12), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"ftentoxs", two(0xF000, 0x4412), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"ftentoxw", two(0xF000, 0x5012), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"ftentoxx", two(0xF000, 0x0012), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"ftentoxx", two(0xF000, 0x4812), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"ftentoxx", two(0xF000, 0x0012), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"ftrapeq", two(0xF07C, 0x0001), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapf", two(0xF07C, 0x0000), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapge", two(0xF07C, 0x0013), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapgl", two(0xF07C, 0x0016), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapgle", two(0xF07C, 0x0017), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapgt", two(0xF07C, 0x0012), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftraple", two(0xF07C, 0x0015), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftraplt", two(0xF07C, 0x0014), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapne", two(0xF07C, 0x000E), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapnge", two(0xF07C, 0x001C), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapngl", two(0xF07C, 0x0019), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapngle", two(0xF07C, 0x0018), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapngt", two(0xF07C, 0x001D), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapnle", two(0xF07C, 0x001A), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapnlt", two(0xF07C, 0x001B), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapoge", two(0xF07C, 0x0003), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapogl", two(0xF07C, 0x0006), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapogt", two(0xF07C, 0x0002), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapole", two(0xF07C, 0x0005), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapolt", two(0xF07C, 0x0004), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapor", two(0xF07C, 0x0007), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapseq", two(0xF07C, 0x0011), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapsf", two(0xF07C, 0x0010), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapsne", two(0xF07C, 0x001E), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapst", two(0xF07C, 0x001F), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapt", two(0xF07C, 0x000F), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapueq", two(0xF07C, 0x0009), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapuge", two(0xF07C, 0x000B), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapugt", two(0xF07C, 0x000A), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapule", two(0xF07C, 0x000D), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapult", two(0xF07C, 0x000C), two(0xF1FF, 0xFFFF), "Ii", mfloat }, -{"ftrapun", two(0xF07C, 0x0008), two(0xF1FF, 0xFFFF), "Ii", mfloat }, - -{"ftrapeqw", two(0xF07A, 0x0001), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapfw", two(0xF07A, 0x0000), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapgew", two(0xF07A, 0x0013), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapglw", two(0xF07A, 0x0016), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapglew", two(0xF07A, 0x0017), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapgtw", two(0xF07A, 0x0012), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftraplew", two(0xF07A, 0x0015), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapltw", two(0xF07A, 0x0014), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapnew", two(0xF07A, 0x000E), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapngew", two(0xF07A, 0x001C), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapnglw", two(0xF07A, 0x0019), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapnglew", two(0xF07A, 0x0018), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapngtw", two(0xF07A, 0x001D), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapnlew", two(0xF07A, 0x001A), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapnltw", two(0xF07A, 0x001B), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapogew", two(0xF07A, 0x0003), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapoglw", two(0xF07A, 0x0006), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapogtw", two(0xF07A, 0x0002), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapolew", two(0xF07A, 0x0005), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapoltw", two(0xF07A, 0x0004), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftraporw", two(0xF07A, 0x0007), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapseqw", two(0xF07A, 0x0011), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapsfw", two(0xF07A, 0x0010), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapsnew", two(0xF07A, 0x001E), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapstw", two(0xF07A, 0x001F), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftraptw", two(0xF07A, 0x000F), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapueqw", two(0xF07A, 0x0009), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapugew", two(0xF07A, 0x000B), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapugtw", two(0xF07A, 0x000A), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapulew", two(0xF07A, 0x000D), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapultw", two(0xF07A, 0x000C), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, -{"ftrapunw", two(0xF07A, 0x0008), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, - -{"ftrapeql", two(0xF07B, 0x0001), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapfl", two(0xF07B, 0x0000), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapgel", two(0xF07B, 0x0013), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapgll", two(0xF07B, 0x0016), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapglel", two(0xF07B, 0x0017), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapgtl", two(0xF07B, 0x0012), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftraplel", two(0xF07B, 0x0015), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapltl", two(0xF07B, 0x0014), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapnel", two(0xF07B, 0x000E), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapngel", two(0xF07B, 0x001C), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapngll", two(0xF07B, 0x0019), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapnglel", two(0xF07B, 0x0018), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapngtl", two(0xF07B, 0x001D), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapnlel", two(0xF07B, 0x001A), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapnltl", two(0xF07B, 0x001B), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapogel", two(0xF07B, 0x0003), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapogll", two(0xF07B, 0x0006), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapogtl", two(0xF07B, 0x0002), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapolel", two(0xF07B, 0x0005), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapoltl", two(0xF07B, 0x0004), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftraporl", two(0xF07B, 0x0007), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapseql", two(0xF07B, 0x0011), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapsfl", two(0xF07B, 0x0010), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapsnel", two(0xF07B, 0x001E), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapstl", two(0xF07B, 0x001F), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftraptl", two(0xF07B, 0x000F), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapueql", two(0xF07B, 0x0009), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapugel", two(0xF07B, 0x000B), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapugtl", two(0xF07B, 0x000A), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapulel", two(0xF07B, 0x000D), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapultl", two(0xF07B, 0x000C), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, -{"ftrapunl", two(0xF07B, 0x0008), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, - -{"ftstb", two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Ii;b", mfloat }, -{"ftstb", two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, -{"ftstd", two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", cfloat }, -{"ftstd", two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Ii;F", mfloat }, -{"ftstd", two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, -{"ftstl", two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Ii;l", mfloat }, -{"ftstl", two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, -{"ftstp", two(0xF000, 0x4C3A), two(0xF1C0, 0xFC7F), "Ii;p", mfloat }, -{"ftsts", two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Ii;f", mfloat }, -{"ftsts", two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, -{"ftstw", two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Ii;w", mfloat }, -{"ftstw", two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, -{"ftstx", two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", mfloat }, -{"ftstx", two(0xF000, 0x483A), two(0xF1C0, 0xFC7F), "Ii;x", mfloat }, - -{"ftwotoxb", two(0xF000, 0x5811), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, -{"ftwotoxd", two(0xF000, 0x5411), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, -{"ftwotoxl", two(0xF000, 0x4011), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, -{"ftwotoxp", two(0xF000, 0x4C11), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, -{"ftwotoxs", two(0xF000, 0x4411), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, -{"ftwotoxw", two(0xF000, 0x5011), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, -{"ftwotoxx", two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, -{"ftwotoxx", two(0xF000, 0x4811), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, -{"ftwotoxx", two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiFt", mfloat }, - -{"halt", one(0045310), one(0177777), "", m68060 | mcf }, - -{"illegal", one(0045374), one(0177777), "", m68000up | mcf }, -{"intouch", one(0xf428), one(0xfff8), "As", mcfv4eup }, - -{"jmp", one(0047300), one(0177700), "!s", m68000up | mcf }, - -{"jra", one(0060000), one(0177400), "Bg", m68000up | mcf }, -{"jra", one(0047300), one(0177700), "!s", m68000up | mcf }, - -{"jsr", one(0047200), one(0177700), "!s", m68000up | mcf }, - -{"jbsr", one(0060400), one(0177400), "Bg", m68000up | mcf }, -{"jbsr", one(0047200), one(0177700), "!s", m68000up | mcf }, - -{"lea", one(0040700), one(0170700), "!sAd", m68000up | mcf }, - -{"lpstop", two(0174000,0000700),two(0177777,0177777),"#w", cpu32|m68060 }, - -{"linkw", one(0047120), one(0177770), "As#w", m68000up | mcf }, -{"linkl", one(0044010), one(0177770), "As#l", m68020up | cpu32 }, -{"link", one(0047120), one(0177770), "As#W", m68000up | mcf }, -{"link", one(0044010), one(0177770), "As#l", m68020up | cpu32 }, - -{"lslb", one(0160410), one(0170770), "QdDs", m68000up }, -{"lslb", one(0160450), one(0170770), "DdDs", m68000up }, -{"lslw", one(0160510), one(0170770), "QdDs", m68000up }, -{"lslw", one(0160550), one(0170770), "DdDs", m68000up }, -{"lslw", one(0161700), one(0177700), "~s", m68000up }, -{"lsll", one(0160610), one(0170770), "QdDs", m68000up | mcf }, -{"lsll", one(0160650), one(0170770), "DdDs", m68000up | mcf }, - -{"lsrb", one(0160010), one(0170770), "QdDs", m68000up }, -{"lsrb", one(0160050), one(0170770), "DdDs", m68000up }, -{"lsrw", one(0160110), one(0170770), "QdDs", m68000up }, -{"lsrw", one(0160150), one(0170770), "DdDs", m68000up }, -{"lsrw", one(0161300), one(0177700), "~s", m68000up }, -{"lsrl", one(0160210), one(0170770), "QdDs", m68000up | mcf }, -{"lsrl", one(0160250), one(0170770), "DdDs", m68000up | mcf }, - - /* FIXME: add MAM mode (`&' after <ea> operand) / remove MACM */ -{"macw", two(0120000, 0000000), two(0170660, 0005400), "uMum", mcf5206eup }, -{"macw", two(0120000, 0001000), two(0170660, 0005400), "uMumMh",mcf5206eup }, -{"macw", two(0120220, 0000000), two(0170670, 0005460), "uNuoasRn", mcf5206eup }, -{"macw", two(0120230, 0000000), two(0170670, 0005460), "uNuo+sRn", mcf5206eup }, -{"macw", two(0120240, 0000000), two(0170670, 0005460), "uNuo-sRn", mcf5206eup }, -{"macw", two(0120250, 0000000), two(0170670, 0005460), "uNuodsRn", mcf5206eup }, -{"macw", two(0120220, 0001000), two(0170670, 0005460), "uNuoMhasRn", mcf5206eup }, -{"macw", two(0120230, 0001000), two(0170670, 0005460), "uNuoMh+sRn", mcf5206eup }, -{"macw", two(0120240, 0001000), two(0170670, 0005460), "uNuoMh-sRn", mcf5206eup }, -{"macw", two(0120250, 0001000), two(0170670, 0005460), "uNuoMhdsRn", mcf5206eup }, -{"macmw", two(0120220, 0000040), two(0170670, 0005460), "uNuoasRn", mcf5206eup }, -{"macmw", two(0120230, 0000040), two(0170670, 0005460), "uNuo+sRn", mcf5206eup }, -{"macmw", two(0120240, 0000040), two(0170670, 0005460), "uNuo-sRn", mcf5206eup }, -{"macmw", two(0120250, 0000040), two(0170670, 0005460), "uNuodsRn", mcf5206eup }, -{"macmw", two(0120220, 0001040), two(0170670, 0005460), "uNuoMhasRn", mcf5206eup }, -{"macmw", two(0120230, 0001040), two(0170670, 0005460), "uNuoMh+sRn", mcf5206eup }, -{"macmw", two(0120240, 0001040), two(0170670, 0005460), "uNuoMh-sRn", mcf5206eup }, -{"macmw", two(0120250, 0001040), two(0170670, 0005460), "uNuoMhdsRn", mcf5206eup }, - -{"macl", two(0120000, 0004000), two(0170660, 0005400), "RsRm", mcf5206eup }, -{"macl", two(0120000, 0005000), two(0170660, 0005400), "RsRmMh", mcf5206eup }, -{"macl", two(0120220, 0004000), two(0170670, 0005460), "R3R1asRn", mcf5206eup }, -{"macl", two(0120230, 0004000), two(0170670, 0005460), "R3R1+sRn", mcf5206eup }, -{"macl", two(0120240, 0004000), two(0170670, 0005460), "R3R1-sRn", mcf5206eup }, -{"macl", two(0120250, 0004000), two(0170670, 0005460), "R3R1dsRn", mcf5206eup }, -{"macl", two(0120220, 0005000), two(0170670, 0005460), "R3R1MhasRn", mcf5206eup }, -{"macl", two(0120230, 0005000), two(0170670, 0005460), "R3R1Mh+sRn", mcf5206eup }, -{"macl", two(0120240, 0005000), two(0170670, 0005460), "R3R1Mh-sRn", mcf5206eup }, -{"macl", two(0120250, 0005000), two(0170670, 0005460), "R3R1MhdsRn", mcf5206eup }, -{"macml", two(0120220, 0004040), two(0170670, 0005460), "R3R1asRn", mcf5206eup }, -{"macml", two(0120230, 0004040), two(0170670, 0005460), "R3R1+sRn", mcf5206eup }, -{"macml", two(0120240, 0004040), two(0170670, 0005460), "R3R1-sRn", mcf5206eup }, -{"macml", two(0120250, 0004040), two(0170670, 0005460), "R3R1dsRn", mcf5206eup }, -{"macml", two(0120220, 0005040), two(0170670, 0005460), "R3R1MhasRn", mcf5206eup }, -{"macml", two(0120230, 0005040), two(0170670, 0005460), "R3R1Mh+sRn", mcf5206eup }, -{"macml", two(0120240, 0005040), two(0170670, 0005460), "R3R1Mh-sRn", mcf5206eup }, -{"macml", two(0120250, 0005040), two(0170670, 0005460), "R3R1MhdsRn", mcf5206eup }, +{"fseq", 4, two(0xF040, 0x0001), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsf", 4, two(0xF040, 0x0000), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsge", 4, two(0xF040, 0x0013), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsgl", 4, two(0xF040, 0x0016), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsgle", 4, two(0xF040, 0x0017), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsgt", 4, two(0xF040, 0x0012), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsle", 4, two(0xF040, 0x0015), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fslt", 4, two(0xF040, 0x0014), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsne", 4, two(0xF040, 0x000E), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsnge", 4, two(0xF040, 0x001C), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsngl", 4, two(0xF040, 0x0019), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsngle", 4, two(0xF040, 0x0018), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsngt", 4, two(0xF040, 0x001D), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsnle", 4, two(0xF040, 0x001A), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsnlt", 4, two(0xF040, 0x001B), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsoge", 4, two(0xF040, 0x0003), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsogl", 4, two(0xF040, 0x0006), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsogt", 4, two(0xF040, 0x0002), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsole", 4, two(0xF040, 0x0005), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsolt", 4, two(0xF040, 0x0004), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsor", 4, two(0xF040, 0x0007), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsseq", 4, two(0xF040, 0x0011), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fssf", 4, two(0xF040, 0x0010), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fssne", 4, two(0xF040, 0x001E), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsst", 4, two(0xF040, 0x001F), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fst", 4, two(0xF040, 0x000F), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsueq", 4, two(0xF040, 0x0009), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsuge", 4, two(0xF040, 0x000B), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsugt", 4, two(0xF040, 0x000A), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsule", 4, two(0xF040, 0x000D), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsult", 4, two(0xF040, 0x000C), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, +{"fsun", 4, two(0xF040, 0x0008), two(0xF1C0, 0xFFFF), "Ii$s", mfloat }, + +{"fsgldivb", 4, two(0xF000, 0x5824), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fsgldivd", 4, two(0xF000, 0x5424), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fsgldivl", 4, two(0xF000, 0x4024), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fsgldivp", 4, two(0xF000, 0x4C24), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fsgldivs", 4, two(0xF000, 0x4424), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fsgldivw", 4, two(0xF000, 0x5024), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fsgldivx", 4, two(0xF000, 0x0024), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fsgldivx", 4, two(0xF000, 0x4824), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fsgldivx", 4, two(0xF000, 0x0024), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fsglmulb", 4, two(0xF000, 0x5827), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fsglmuld", 4, two(0xF000, 0x5427), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fsglmull", 4, two(0xF000, 0x4027), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fsglmulp", 4, two(0xF000, 0x4C27), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fsglmuls", 4, two(0xF000, 0x4427), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fsglmulw", 4, two(0xF000, 0x5027), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fsglmulx", 4, two(0xF000, 0x0027), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fsglmulx", 4, two(0xF000, 0x4827), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fsglmulx", 4, two(0xF000, 0x0027), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fsinb", 4, two(0xF000, 0x580E), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fsind", 4, two(0xF000, 0x540E), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fsinl", 4, two(0xF000, 0x400E), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fsinp", 4, two(0xF000, 0x4C0E), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fsins", 4, two(0xF000, 0x440E), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fsinw", 4, two(0xF000, 0x500E), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fsinx", 4, two(0xF000, 0x000E), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fsinx", 4, two(0xF000, 0x480E), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fsinx", 4, two(0xF000, 0x000E), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fsincosb", 4, two(0xF000, 0x5830), two(0xF1C0, 0xFC78), "Ii;bF3F7", mfloat }, +{"fsincosd", 4, two(0xF000, 0x5430), two(0xF1C0, 0xFC78), "Ii;FF3F7", mfloat }, +{"fsincosl", 4, two(0xF000, 0x4030), two(0xF1C0, 0xFC78), "Ii;lF3F7", mfloat }, +{"fsincosp", 4, two(0xF000, 0x4C30), two(0xF1C0, 0xFC78), "Ii;pF3F7", mfloat }, +{"fsincoss", 4, two(0xF000, 0x4430), two(0xF1C0, 0xFC78), "Ii;fF3F7", mfloat }, +{"fsincosw", 4, two(0xF000, 0x5030), two(0xF1C0, 0xFC78), "Ii;wF3F7", mfloat }, +{"fsincosx", 4, two(0xF000, 0x0030), two(0xF1C0, 0xE078), "IiF8F3F7", mfloat }, +{"fsincosx", 4, two(0xF000, 0x4830), two(0xF1C0, 0xFC78), "Ii;xF3F7", mfloat }, + +{"fsinhb", 4, two(0xF000, 0x5802), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fsinhd", 4, two(0xF000, 0x5402), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fsinhl", 4, two(0xF000, 0x4002), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fsinhp", 4, two(0xF000, 0x4C02), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fsinhs", 4, two(0xF000, 0x4402), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fsinhw", 4, two(0xF000, 0x5002), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fsinhx", 4, two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fsinhx", 4, two(0xF000, 0x4802), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fsinhx", 4, two(0xF000, 0x0002), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fsqrtb", 4, two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fsqrtb", 4, two(0xF000, 0x5804), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsqrtd", 4, two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fsqrtd", 4, two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fsqrtd", 4, two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fsqrtd", 4, two(0xF000, 0x5404), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fsqrtl", 4, two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fsqrtl", 4, two(0xF000, 0x4004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsqrtp", 4, two(0xF000, 0x4C04), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fsqrts", 4, two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fsqrts", 4, two(0xF000, 0x4404), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsqrtw", 4, two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fsqrtw", 4, two(0xF000, 0x5004), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsqrtx", 4, two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fsqrtx", 4, two(0xF000, 0x4804), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fsqrtx", 4, two(0xF000, 0x0004), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fssqrtb", 4, two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fssqrtb", 4, two(0xF000, 0x5841), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fssqrtd", 4, two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fssqrtd", 4, two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fssqrtd", 4, two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fssqrtd", 4, two(0xF000, 0x5441), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fssqrtl", 4, two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fssqrtl", 4, two(0xF000, 0x4041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fssqrtp", 4, two(0xF000, 0x4C41), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fssqrts", 4, two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fssqrts", 4, two(0xF000, 0x4441), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fssqrtw", 4, two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fssqrtw", 4, two(0xF000, 0x5041), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fssqrtx", 4, two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fssqrtx", 4, two(0xF000, 0x4841), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fssqrtx", 4, two(0xF000, 0x0041), two(0xF1C0, 0xE07F), "IiFt", m68040up }, + +{"fdsqrtb", 4, two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fdsqrtb", 4, two(0xF000, 0x5845), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdsqrtd", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fdsqrtd", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", cfloat }, +{"fdsqrtd", 4, two(0xF000, 0x5445), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fdsqrtl", 4, two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fdsqrtl", 4, two(0xF000, 0x4045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdsqrtp", 4, two(0xF000, 0x4C45), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fdsqrts", 4, two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fdsqrts", 4, two(0xF000, 0x4445), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdsqrtw", 4, two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fdsqrtw", 4, two(0xF000, 0x5045), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdsqrtx", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fdsqrtx", 4, two(0xF000, 0x4845), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fdsqrtx", 4, two(0xF000, 0x0045), two(0xF1C0, 0xE07F), "IiFt", m68040up }, + +{"fsubb", 4, two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"fsubb", 4, two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsubd", 4, two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fsubd", 4, two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"fsubd", 4, two(0xF000, 0x5428), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fsubl", 4, two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"fsubl", 4, two(0xF000, 0x4028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsubp", 4, two(0xF000, 0x4C28), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"fsubs", 4, two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"fsubs", 4, two(0xF000, 0x4428), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsubw", 4, two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"fsubw", 4, two(0xF000, 0x5028), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fsubx", 4, two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"fsubx", 4, two(0xF000, 0x4828), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"fsubx", 4, two(0xF000, 0x0028), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"fssubb", 4, two(0xF000, 0x5828), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fssubb", 4, two(0xF000, 0x5868), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fssubd", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fssubd", 4, two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fssubd", 4, two(0xF000, 0x5468), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fssubl", 4, two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fssubl", 4, two(0xF000, 0x4068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fssubp", 4, two(0xF000, 0x4C68), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fssubs", 4, two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fssubs", 4, two(0xF000, 0x4468), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fssubw", 4, two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fssubw", 4, two(0xF000, 0x5068), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fssubx", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fssubx", 4, two(0xF000, 0x4868), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fssubx", 4, two(0xF000, 0x0068), two(0xF1C0, 0xE07F), "IiFt", m68040up }, + +{"fdsubb", 4, two(0xF000, 0x586A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdsubb", 4, two(0xF000, 0x586c), two(0xF1C0, 0xFC7F), "Ii;bF7", m68040up }, +{"fdsubd", 4, two(0xF000, 0x006A), two(0xF1C0, 0xE07F), "IiF8F7", cfloat }, +{"fdsubd", 4, two(0xF000, 0x546A), two(0xF1C0, 0xFC7F), "IiwsF7", cfloat }, +{"fdsubd", 4, two(0xF000, 0x546c), two(0xF1C0, 0xFC7F), "Ii;FF7", m68040up }, +{"fdsubl", 4, two(0xF000, 0x406A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdsubl", 4, two(0xF000, 0x406c), two(0xF1C0, 0xFC7F), "Ii;lF7", m68040up }, +{"fdsubp", 4, two(0xF000, 0x4C6c), two(0xF1C0, 0xFC7F), "Ii;pF7", m68040up }, +{"fdsubs", 4, two(0xF000, 0x446A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdsubs", 4, two(0xF000, 0x446c), two(0xF1C0, 0xFC7F), "Ii;fF7", m68040up }, +{"fdsubw", 4, two(0xF000, 0x506A), two(0xF1C0, 0xFC7F), "IibsF7", cfloat }, +{"fdsubw", 4, two(0xF000, 0x506c), two(0xF1C0, 0xFC7F), "Ii;wF7", m68040up }, +{"fdsubx", 4, two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiF8F7", m68040up }, +{"fdsubx", 4, two(0xF000, 0x486c), two(0xF1C0, 0xFC7F), "Ii;xF7", m68040up }, +{"fdsubx", 4, two(0xF000, 0x006c), two(0xF1C0, 0xE07F), "IiFt", m68040up }, + +{"ftanb", 4, two(0xF000, 0x580F), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"ftand", 4, two(0xF000, 0x540F), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"ftanl", 4, two(0xF000, 0x400F), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"ftanp", 4, two(0xF000, 0x4C0F), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"ftans", 4, two(0xF000, 0x440F), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"ftanw", 4, two(0xF000, 0x500F), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"ftanx", 4, two(0xF000, 0x000F), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"ftanx", 4, two(0xF000, 0x480F), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"ftanx", 4, two(0xF000, 0x000F), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"ftanhb", 4, two(0xF000, 0x5809), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"ftanhd", 4, two(0xF000, 0x5409), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"ftanhl", 4, two(0xF000, 0x4009), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"ftanhp", 4, two(0xF000, 0x4C09), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"ftanhs", 4, two(0xF000, 0x4409), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"ftanhw", 4, two(0xF000, 0x5009), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"ftanhx", 4, two(0xF000, 0x0009), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"ftanhx", 4, two(0xF000, 0x4809), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"ftanhx", 4, two(0xF000, 0x0009), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"ftentoxb", 4, two(0xF000, 0x5812), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"ftentoxd", 4, two(0xF000, 0x5412), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"ftentoxl", 4, two(0xF000, 0x4012), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"ftentoxp", 4, two(0xF000, 0x4C12), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"ftentoxs", 4, two(0xF000, 0x4412), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"ftentoxw", 4, two(0xF000, 0x5012), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"ftentoxx", 4, two(0xF000, 0x0012), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"ftentoxx", 4, two(0xF000, 0x4812), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"ftentoxx", 4, two(0xF000, 0x0012), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"ftrapeq", 4, two(0xF07C, 0x0001), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapf", 4, two(0xF07C, 0x0000), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapge", 4, two(0xF07C, 0x0013), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapgl", 4, two(0xF07C, 0x0016), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapgle", 4, two(0xF07C, 0x0017), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapgt", 4, two(0xF07C, 0x0012), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftraple", 4, two(0xF07C, 0x0015), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftraplt", 4, two(0xF07C, 0x0014), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapne", 4, two(0xF07C, 0x000E), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapnge", 4, two(0xF07C, 0x001C), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapngl", 4, two(0xF07C, 0x0019), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapngle", 4,two(0xF07C, 0x0018), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapngt", 4, two(0xF07C, 0x001D), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapnle", 4, two(0xF07C, 0x001A), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapnlt", 4, two(0xF07C, 0x001B), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapoge", 4, two(0xF07C, 0x0003), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapogl", 4, two(0xF07C, 0x0006), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapogt", 4, two(0xF07C, 0x0002), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapole", 4, two(0xF07C, 0x0005), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapolt", 4, two(0xF07C, 0x0004), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapor", 4, two(0xF07C, 0x0007), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapseq", 4, two(0xF07C, 0x0011), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapsf", 4, two(0xF07C, 0x0010), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapsne", 4, two(0xF07C, 0x001E), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapst", 4, two(0xF07C, 0x001F), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapt", 4, two(0xF07C, 0x000F), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapueq", 4, two(0xF07C, 0x0009), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapuge", 4, two(0xF07C, 0x000B), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapugt", 4, two(0xF07C, 0x000A), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapule", 4, two(0xF07C, 0x000D), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapult", 4, two(0xF07C, 0x000C), two(0xF1FF, 0xFFFF), "Ii", mfloat }, +{"ftrapun", 4, two(0xF07C, 0x0008), two(0xF1FF, 0xFFFF), "Ii", mfloat }, + +{"ftrapeqw", 4, two(0xF07A, 0x0001), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapfw", 4, two(0xF07A, 0x0000), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapgew", 4, two(0xF07A, 0x0013), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapglw", 4, two(0xF07A, 0x0016), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapglew", 4,two(0xF07A, 0x0017), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapgtw", 4, two(0xF07A, 0x0012), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftraplew", 4, two(0xF07A, 0x0015), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapltw", 4, two(0xF07A, 0x0014), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapnew", 4, two(0xF07A, 0x000E), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapngew", 4,two(0xF07A, 0x001C), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapnglw", 4,two(0xF07A, 0x0019), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapnglew", 4,two(0xF07A, 0x0018), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapngtw", 4,two(0xF07A, 0x001D), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapnlew", 4,two(0xF07A, 0x001A), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapnltw", 4,two(0xF07A, 0x001B), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapogew", 4,two(0xF07A, 0x0003), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapoglw", 4,two(0xF07A, 0x0006), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapogtw", 4,two(0xF07A, 0x0002), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapolew", 4,two(0xF07A, 0x0005), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapoltw", 4,two(0xF07A, 0x0004), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftraporw", 4, two(0xF07A, 0x0007), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapseqw", 4,two(0xF07A, 0x0011), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapsfw", 4, two(0xF07A, 0x0010), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapsnew", 4,two(0xF07A, 0x001E), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapstw", 4, two(0xF07A, 0x001F), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftraptw", 4, two(0xF07A, 0x000F), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapueqw", 4,two(0xF07A, 0x0009), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapugew", 4,two(0xF07A, 0x000B), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapugtw", 4,two(0xF07A, 0x000A), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapulew", 4,two(0xF07A, 0x000D), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapultw", 4,two(0xF07A, 0x000C), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, +{"ftrapunw", 4, two(0xF07A, 0x0008), two(0xF1FF, 0xFFFF), "Ii^w", mfloat }, + +{"ftrapeql", 4, two(0xF07B, 0x0001), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapfl", 4, two(0xF07B, 0x0000), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapgel", 4, two(0xF07B, 0x0013), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapgll", 4, two(0xF07B, 0x0016), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapglel", 4,two(0xF07B, 0x0017), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapgtl", 4, two(0xF07B, 0x0012), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftraplel", 4, two(0xF07B, 0x0015), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapltl", 4, two(0xF07B, 0x0014), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapnel", 4, two(0xF07B, 0x000E), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapngel", 4,two(0xF07B, 0x001C), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapngll", 4,two(0xF07B, 0x0019), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapnglel", 4,two(0xF07B, 0x0018), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapngtl", 4,two(0xF07B, 0x001D), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapnlel", 4,two(0xF07B, 0x001A), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapnltl", 4,two(0xF07B, 0x001B), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapogel", 4,two(0xF07B, 0x0003), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapogll", 4,two(0xF07B, 0x0006), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapogtl", 4,two(0xF07B, 0x0002), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapolel", 4,two(0xF07B, 0x0005), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapoltl", 4,two(0xF07B, 0x0004), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftraporl", 4, two(0xF07B, 0x0007), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapseql", 4,two(0xF07B, 0x0011), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapsfl", 4, two(0xF07B, 0x0010), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapsnel", 4,two(0xF07B, 0x001E), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapstl", 4, two(0xF07B, 0x001F), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftraptl", 4, two(0xF07B, 0x000F), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapueql", 4,two(0xF07B, 0x0009), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapugel", 4,two(0xF07B, 0x000B), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapugtl", 4,two(0xF07B, 0x000A), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapulel", 4,two(0xF07B, 0x000D), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapultl", 4,two(0xF07B, 0x000C), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, +{"ftrapunl", 4, two(0xF07B, 0x0008), two(0xF1FF, 0xFFFF), "Ii^l", mfloat }, + +{"ftstb", 4, two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Ii;b", mfloat }, +{"ftstb", 4, two(0xF000, 0x583A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, +{"ftstd", 4, two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", cfloat }, +{"ftstd", 4, two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Ii;F", mfloat }, +{"ftstd", 4, two(0xF000, 0x543A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, +{"ftstl", 4, two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Ii;l", mfloat }, +{"ftstl", 4, two(0xF000, 0x403A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, +{"ftstp", 4, two(0xF000, 0x4C3A), two(0xF1C0, 0xFC7F), "Ii;p", mfloat }, +{"ftsts", 4, two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Ii;f", mfloat }, +{"ftsts", 4, two(0xF000, 0x443A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, +{"ftstw", 4, two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Ii;w", mfloat }, +{"ftstw", 4, two(0xF000, 0x503A), two(0xF1C0, 0xFC7F), "Iibs", cfloat }, +{"ftstx", 4, two(0xF000, 0x003A), two(0xF1C0, 0xE07F), "IiF8", mfloat }, +{"ftstx", 4, two(0xF000, 0x483A), two(0xF1C0, 0xFC7F), "Ii;x", mfloat }, + +{"ftwotoxb", 4, two(0xF000, 0x5811), two(0xF1C0, 0xFC7F), "Ii;bF7", mfloat }, +{"ftwotoxd", 4, two(0xF000, 0x5411), two(0xF1C0, 0xFC7F), "Ii;FF7", mfloat }, +{"ftwotoxl", 4, two(0xF000, 0x4011), two(0xF1C0, 0xFC7F), "Ii;lF7", mfloat }, +{"ftwotoxp", 4, two(0xF000, 0x4C11), two(0xF1C0, 0xFC7F), "Ii;pF7", mfloat }, +{"ftwotoxs", 4, two(0xF000, 0x4411), two(0xF1C0, 0xFC7F), "Ii;fF7", mfloat }, +{"ftwotoxw", 4, two(0xF000, 0x5011), two(0xF1C0, 0xFC7F), "Ii;wF7", mfloat }, +{"ftwotoxx", 4, two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiF8F7", mfloat }, +{"ftwotoxx", 4, two(0xF000, 0x4811), two(0xF1C0, 0xFC7F), "Ii;xF7", mfloat }, +{"ftwotoxx", 4, two(0xF000, 0x0011), two(0xF1C0, 0xE07F), "IiFt", mfloat }, + +{"halt", 2, one(0045310), one(0177777), "", m68060 | mcfisa_a }, + +{"illegal", 2, one(0045374), one(0177777), "", m68000up | mcfisa_a }, +{"intouch", 2, one(0xf428), one(0xfff8), "As", mcfisa_b }, + +{"jmp", 2, one(0047300), one(0177700), "!s", m68000up | mcfisa_a }, + +{"jra", 2, one(0060000), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jra", 2, one(0047300), one(0177700), "!s", m68000up | mcfisa_a }, + +{"jsr", 2, one(0047200), one(0177700), "!s", m68000up | mcfisa_a }, + +{"jbsr", 2, one(0060400), one(0177400), "Bg", m68000up | mcfisa_a }, +{"jbsr", 2, one(0047200), one(0177700), "!s", m68000up | mcfisa_a }, + +{"lea", 2, one(0040700), one(0170700), "!sAd", m68000up | mcfisa_a }, + +{"lpstop", 6, two(0174000,0000700),two(0177777,0177777),"#w", cpu32|m68060 }, + +{"linkw", 4, one(0047120), one(0177770), "As#w", m68000up | mcfisa_a }, +{"linkl", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 }, +{"link", 4, one(0047120), one(0177770), "As#W", m68000up | mcfisa_a }, +{"link", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 }, + +{"lslb", 2, one(0160410), one(0170770), "QdDs", m68000up }, +{"lslb", 2, one(0160450), one(0170770), "DdDs", m68000up }, +{"lslw", 2, one(0160510), one(0170770), "QdDs", m68000up }, +{"lslw", 2, one(0160550), one(0170770), "DdDs", m68000up }, +{"lslw", 2, one(0161700), one(0177700), "~s", m68000up }, +{"lsll", 2, one(0160610), one(0170770), "QdDs", m68000up | mcfisa_a }, +{"lsll", 2, one(0160650), one(0170770), "DdDs", m68000up | mcfisa_a }, + +{"lsrb", 2, one(0160010), one(0170770), "QdDs", m68000up }, +{"lsrb", 2, one(0160050), one(0170770), "DdDs", m68000up }, +{"lsrw", 2, one(0160110), one(0170770), "QdDs", m68000up }, +{"lsrw", 2, one(0160150), one(0170770), "DdDs", m68000up }, +{"lsrw", 2, one(0161300), one(0177700), "~s", m68000up }, +{"lsrl", 2, one(0160210), one(0170770), "QdDs", m68000up | mcfisa_a }, +{"lsrl", 2, one(0160250), one(0170770), "DdDs", m68000up | mcfisa_a }, + +{"macw", 4, two(0xa080, 0x0000), two(0xf180, 0x0910), "uNuoiI4/Rn", mcfmac }, +{"macw", 4, two(0xa080, 0x0200), two(0xf180, 0x0910), "uNuoMh4/Rn", mcfmac }, +{"macw", 4, two(0xa080, 0x0000), two(0xf180, 0x0f10), "uNuo4/Rn", mcfmac }, +{"macw", 4, two(0xa000, 0x0000), two(0xf1b0, 0x0900), "uMumiI", mcfmac }, +{"macw", 4, two(0xa000, 0x0200), two(0xf1b0, 0x0900), "uMumMh", mcfmac }, +{"macw", 4, two(0xa000, 0x0000), two(0xf1b0, 0x0f00), "uMum", mcfmac }, + +{"macw", 4, two(0xa000, 0x0000), two(0xf100, 0x0900), "uNuoiI4/RneG", mcfemac },/* Ry,Rx,SF,<ea>,accX. */ +{"macw", 4, two(0xa000, 0x0200), two(0xf100, 0x0900), "uNuoMh4/RneG", mcfemac },/* Ry,Rx,+1/-1,<ea>,accX. */ +{"macw", 4, two(0xa000, 0x0000), two(0xf100, 0x0f00), "uNuo4/RneG", mcfemac },/* Ry,Rx,<ea>,accX. */ +{"macw", 4, two(0xa000, 0x0000), two(0xf130, 0x0900), "uMumiIeH", mcfemac },/* Ry,Rx,SF,accX. */ +{"macw", 4, two(0xa000, 0x0200), two(0xf130, 0x0900), "uMumMheH", mcfemac },/* Ry,Rx,+1/-1,accX. */ +{"macw", 4, two(0xa000, 0x0000), two(0xf130, 0x0f00), "uMumeH", mcfemac }, /* Ry,Rx,accX. */ + +{"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfmac }, +{"macl", 4, two(0xa080, 0x0a00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfmac }, +{"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac }, +{"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0b00), "RMRmiI", mcfmac }, +{"macl", 4, two(0xa000, 0x0a00), two(0xf1b0, 0x0b00), "RMRmMh", mcfmac }, +{"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0800), "RMRm", mcfmac }, + +{"macl", 4, two(0xa000, 0x0800), two(0xf100, 0x0900), "R3R1iI4/RneG", mcfemac }, +{"macl", 4, two(0xa000, 0x0a00), two(0xf100, 0x0900), "R3R1Mh4/RneG", mcfemac }, +{"macl", 4, two(0xa000, 0x0800), two(0xf100, 0x0f00), "R3R14/RneG", mcfemac }, +{"macl", 4, two(0xa000, 0x0800), two(0xf130, 0x0900), "RMRmiIeH", mcfemac }, +{"macl", 4, two(0xa000, 0x0a00), two(0xf130, 0x0900), "RMRmMheH", mcfemac }, +{"macl", 4, two(0xa000, 0x0800), two(0xf130, 0x0f00), "RMRmeH", mcfemac }, /* NOTE: The mcf5200 family programmer's reference manual does not indicate the byte form of the movea instruction is invalid (as it @@ -1512,571 +1501,576 @@ const struct m68k_opcode m68k_opcodes[] = which replied that other coldfire assemblers reject movea.b. For this reason I've decided to not allow moveab. - jtc@cygnus.com - 97/01/24 - */ - -{"moveal", one(0020100), one(0170700), "*lAd", m68000up | mcf }, -{"moveaw", one(0030100), one(0170700), "*wAd", m68000up | mcf }, - -{"movec", one(0047173), one(0177777), "R1Jj", m68010up | mcf }, -{"movec", one(0047173), one(0177777), "R1#j", m68010up | mcf }, -{"movec", one(0047172), one(0177777), "JjR1", m68010up }, -{"movec", one(0047172), one(0177777), "#jR1", m68010up }, - -{"movemw", one(0044200), one(0177700), "Lw&s", m68000up }, -{"movemw", one(0044240), one(0177770), "lw-s", m68000up }, -{"movemw", one(0044200), one(0177700), "#w>s", m68000up }, -{"movemw", one(0046200), one(0177700), "<sLw", m68000up }, -{"movemw", one(0046200), one(0177700), "<s#w", m68000up }, -{"moveml", one(0044300), one(0177700), "Lw&s", m68000up }, -{"moveml", one(0044340), one(0177770), "lw-s", m68000up }, -{"moveml", one(0044300), one(0177700), "#w>s", m68000up }, -{"moveml", one(0046300), one(0177700), "<sLw", m68000up }, -{"moveml", one(0046300), one(0177700), "<s#w", m68000up }, -/* FIXME: need specifier for mode 2 and 5 to simplify below insn patterns */ -{"moveml", one(0044320), one(0177770), "Lwas", mcf }, -{"moveml", one(0044320), one(0177770), "#was", mcf }, -{"moveml", one(0044350), one(0177770), "Lwds", mcf }, -{"moveml", one(0044350), one(0177770), "#wds", mcf }, -{"moveml", one(0046320), one(0177770), "asLw", mcf }, -{"moveml", one(0046320), one(0177770), "as#w", mcf }, -{"moveml", one(0046350), one(0177770), "dsLw", mcf }, -{"moveml", one(0046350), one(0177770), "ds#w", mcf }, - -{"movepw", one(0000410), one(0170770), "dsDd", m68000up }, -{"movepw", one(0000610), one(0170770), "Ddds", m68000up }, -{"movepl", one(0000510), one(0170770), "dsDd", m68000up }, -{"movepl", one(0000710), one(0170770), "Ddds", m68000up }, - -{"moveq", one(0070000), one(0170400), "MsDd", m68000up | mcf }, -{"moveq", one(0070000), one(0170400), "#BDd", m68000up | mcf }, + jtc@cygnus.com - 97/01/24. */ + +{"moveal", 2, one(0020100), one(0170700), "*lAd", m68000up | mcfisa_a }, +{"moveaw", 2, one(0030100), one(0170700), "*wAd", m68000up | mcfisa_a }, + +{"movclrl", 2, one(0xA1C0), one(0xf9f0), "eFRs", mcfemac }, + +{"movec", 4, one(0047173), one(0177777), "R1Jj", m68010up | mcfisa_a }, +{"movec", 4, one(0047173), one(0177777), "R1#j", m68010up | mcfisa_a }, +{"movec", 4, one(0047172), one(0177777), "JjR1", m68010up }, +{"movec", 4, one(0047172), one(0177777), "#jR1", m68010up }, + +{"movemw", 4, one(0044200), one(0177700), "Lw&s", m68000up }, +{"movemw", 4, one(0044240), one(0177770), "lw-s", m68000up }, +{"movemw", 4, one(0044200), one(0177700), "#w>s", m68000up }, +{"movemw", 4, one(0046200), one(0177700), "<sLw", m68000up }, +{"movemw", 4, one(0046200), one(0177700), "<s#w", m68000up }, +{"moveml", 4, one(0044300), one(0177700), "Lw&s", m68000up }, +{"moveml", 4, one(0044340), one(0177770), "lw-s", m68000up }, +{"moveml", 4, one(0044300), one(0177700), "#w>s", m68000up }, +{"moveml", 4, one(0046300), one(0177700), "<sLw", m68000up }, +{"moveml", 4, one(0046300), one(0177700), "<s#w", m68000up }, +/* FIXME: need specifier for mode 2 and 5 to simplify below insn patterns. */ +{"moveml", 4, one(0044320), one(0177770), "Lwas", mcfisa_a }, +{"moveml", 4, one(0044320), one(0177770), "#was", mcfisa_a }, +{"moveml", 4, one(0044350), one(0177770), "Lwds", mcfisa_a }, +{"moveml", 4, one(0044350), one(0177770), "#wds", mcfisa_a }, +{"moveml", 4, one(0046320), one(0177770), "asLw", mcfisa_a }, +{"moveml", 4, one(0046320), one(0177770), "as#w", mcfisa_a }, +{"moveml", 4, one(0046350), one(0177770), "dsLw", mcfisa_a }, +{"moveml", 4, one(0046350), one(0177770), "ds#w", mcfisa_a }, + +{"movepw", 2, one(0000410), one(0170770), "dsDd", m68000up }, +{"movepw", 2, one(0000610), one(0170770), "Ddds", m68000up }, +{"movepl", 2, one(0000510), one(0170770), "dsDd", m68000up }, +{"movepl", 2, one(0000710), one(0170770), "Ddds", m68000up }, + +{"moveq", 2, one(0070000), one(0170400), "MsDd", m68000up | mcfisa_a }, +{"moveq", 2, one(0070000), one(0170400), "#BDd", m68000up | mcfisa_a }, /* The move opcode can generate the movea and moveq instructions. */ -{"moveb", one(0010000), one(0170000), ";b$d", m68000up }, -{"moveb", one(0010000), one(0170070), "Ds$d", mcf }, -{"moveb", one(0010020), one(0170070), "as$d", mcf }, -{"moveb", one(0010030), one(0170070), "+s$d", mcf }, -{"moveb", one(0010040), one(0170070), "-s$d", mcf }, -{"moveb", one(0010000), one(0170000), "nsqd", mcf }, -{"moveb", one(0010000), one(0170700), "obDd", mcf }, -{"moveb", one(0010200), one(0170700), "obad", mcf }, -{"moveb", one(0010300), one(0170700), "ob+d", mcf }, -{"moveb", one(0010400), one(0170700), "ob-d", mcf }, -{"moveb", one(0010000), one(0170000), "obnd", mcfv4up }, - -{"movew", one(0030000), one(0170000), "*w%d", m68000up }, -{"movew", one(0030000), one(0170000), "ms%d", mcf }, -{"movew", one(0030000), one(0170000), "nspd", mcf }, -{"movew", one(0030000), one(0170000), "owmd", mcf }, -{"movew", one(0030000), one(0170000), "ownd", mcfv4up }, -{"movew", one(0040300), one(0177700), "Ss$s", m68000up }, -{"movew", one(0040300), one(0177770), "SsDs", mcf }, -{"movew", one(0041300), one(0177700), "Cs$s", m68010up }, -{"movew", one(0041300), one(0177770), "CsDs", mcf }, -{"movew", one(0042300), one(0177700), ";wCd", m68000up }, -{"movew", one(0042300), one(0177700), "DsCd", mcf }, -{"movew", one(0042374), one(0177777), "#wCd", mcf }, -{"movew", one(0043300), one(0177700), ";wSd", m68000up }, -{"movew", one(0043300), one(0177700), "DsSd", mcf }, -{"movew", one(0043374), one(0177777), "#wSd", mcf }, - -{"movel", one(0070000), one(0170400), "MsDd", m68000up | mcf }, -{"movel", one(0020000), one(0170000), "*l%d", m68000up }, -{"movel", one(0020000), one(0170000), "ms%d", mcf }, -{"movel", one(0020000), one(0170000), "nspd", mcf }, -{"movel", one(0020000), one(0170000), "olmd", mcf }, -{"movel", one(0020000), one(0170000), "olnd", mcfv4up }, -{"movel", one(0047140), one(0177770), "AsUd", m68000up | mcfv4e }, -{"movel", one(0047150), one(0177770), "UdAs", m68000up | mcfv4e }, -{"movel", one(0120600), one(0177760), "EsRs", mcf5206eup }, -{"movel", one(0120400), one(0177760), "RsEs", mcf5206eup }, -{"movel", one(0120474), one(0177777), "#lEs", mcf5206eup }, -{"movel", one(0124600), one(0177760), "GsRs", mcf5206eup }, -{"movel", one(0124400), one(0177760), "RsGs", mcf5206eup }, -{"movel", one(0124474), one(0177777), "#lGs", mcf5206eup }, -{"movel", one(0126600), one(0177760), "HsRs", mcf5206eup }, -{"movel", one(0126400), one(0177760), "RsHs", mcf5206eup }, -{"movel", one(0126474), one(0177777), "#lHs", mcf5206eup }, -{"movel", one(0124700), one(0177777), "GsCs", mcf5206eup }, - -{"move", one(0030000), one(0170000), "*w%d", m68000up }, -{"move", one(0030000), one(0170000), "ms%d", mcf }, -{"move", one(0030000), one(0170000), "nspd", mcf }, -{"move", one(0030000), one(0170000), "owmd", mcf }, -{"move", one(0030000), one(0170000), "ownd", mcfv4up }, -{"move", one(0040300), one(0177700), "Ss$s", m68000up }, -{"move", one(0040300), one(0177770), "SsDs", mcf }, -{"move", one(0041300), one(0177700), "Cs$s", m68010up }, -{"move", one(0041300), one(0177770), "CsDs", mcf }, -{"move", one(0042300), one(0177700), ";wCd", m68000up }, -{"move", one(0042300), one(0177700), "DsCd", mcf }, -{"move", one(0042374), one(0177777), "#wCd", mcf }, -{"move", one(0043300), one(0177700), ";wSd", m68000up }, -{"move", one(0043300), one(0177700), "DsSd", mcf }, -{"move", one(0043374), one(0177777), "#wSd", mcf }, - -{"move", one(0047140), one(0177770), "AsUd", m68000up }, -{"move", one(0047150), one(0177770), "UdAs", m68000up }, - -{"mov3ql", one(0120500), one(0170700), "xd%s", mcfv4up }, -{"mvsb", one(0070400), one(0170700), "*bDd", mcfv4up }, -{"mvsw", one(0070500), one(0170700), "*wDd", mcfv4up }, -{"mvzb", one(0070600), one(0170700), "*bDd", mcfv4up }, -{"mvzw", one(0070700), one(0170700), "*wDd", mcfv4up }, - -{"movesb", two(0007000, 0), two(0177700, 07777), "~sR1", m68010up }, -{"movesb", two(0007000, 04000), two(0177700, 07777), "R1~s", m68010up }, -{"movesw", two(0007100, 0), two(0177700, 07777), "~sR1", m68010up }, -{"movesw", two(0007100, 04000), two(0177700, 07777), "R1~s", m68010up }, -{"movesl", two(0007200, 0), two(0177700, 07777), "~sR1", m68010up }, -{"movesl", two(0007200, 04000), two(0177700, 07777), "R1~s", m68010up }, - -{"move16", two(0xf620, 0x8000), two(0xfff8, 0x8fff), "+s+1", m68040up }, -{"move16", one(0xf600), one(0xfff8), "+s_L", m68040up }, -{"move16", one(0xf608), one(0xfff8), "_L+s", m68040up }, -{"move16", one(0xf610), one(0xfff8), "as_L", m68040up }, -{"move16", one(0xf618), one(0xfff8), "_Las", m68040up }, - - /* FIXME: add MAM mode (`&' after <ea> operand) / remove MSACM */ -{"msacw", two(0120000, 0000400), two(0170660, 0005400), "uMum", mcf5206eup }, -{"msacw", two(0120000, 0001400), two(0170660, 0005400), "uMumMh", mcf5206eup }, -{"msacw", two(0120220, 0000400), two(0170670, 0005460), "uNuoasRn", mcf5206eup }, -{"msacw", two(0120230, 0000400), two(0170670, 0005460), "uNuo+sRn", mcf5206eup }, -{"msacw", two(0120240, 0000400), two(0170670, 0005460), "uNuo-sRn", mcf5206eup }, -{"msacw", two(0120250, 0000400), two(0170670, 0005460), "uNuodsRn", mcf5206eup }, -{"msacw", two(0120220, 0001400), two(0170670, 0005460), "uNuoMhasRn", mcf5206eup }, -{"msacw", two(0120230, 0001400), two(0170670, 0005460), "uNuoMh+sRn", mcf5206eup }, -{"msacw", two(0120240, 0001400), two(0170670, 0005460), "uNuoMh-sRn", mcf5206eup }, -{"msacw", two(0120250, 0001400), two(0170670, 0005460), "uNuoMhdsRn", mcf5206eup }, -{"msacmw", two(0120220, 0000440), two(0170670, 0005460), "uNuoasRn", mcf5206eup }, -{"msacmw", two(0120230, 0000440), two(0170670, 0005460), "uNuo+sRn", mcf5206eup }, -{"msacmw", two(0120240, 0000440), two(0170670, 0005460), "uNuo-sRn", mcf5206eup }, -{"msacmw", two(0120250, 0000440), two(0170670, 0005460), "uNuodsRn", mcf5206eup }, -{"msacmw", two(0120220, 0001440), two(0170670, 0005460), "uNuoMhasRn", mcf5206eup }, -{"msacmw", two(0120230, 0001440), two(0170670, 0005460), "uNuoMh+sRn", mcf5206eup }, -{"msacmw", two(0120240, 0001440), two(0170670, 0005460), "uNuoMh-sRn", mcf5206eup }, -{"msacmw", two(0120250, 0001440), two(0170670, 0005460), "uNuoMhdsRn", mcf5206eup }, - -{"msacl", two(0120000, 0004400), two(0170660, 0005400), "RsRm", mcf5206eup }, -{"msacl", two(0120000, 0005400), two(0170660, 0005400), "RsRmMh", mcf5206eup }, -{"msacl", two(0120220, 0004400), two(0170670, 0005460), "R3R1asRn", mcf5206eup }, -{"msacl", two(0120230, 0004400), two(0170670, 0005460), "R3R1+sRn", mcf5206eup }, -{"msacl", two(0120240, 0004400), two(0170670, 0005460), "R3R1-sRn", mcf5206eup }, -{"msacl", two(0120250, 0004400), two(0170670, 0005460), "R3R1dsRn", mcf5206eup }, -{"msacl", two(0120220, 0005400), two(0170670, 0005460), "R3R1MhasRn", mcf5206eup }, -{"msacl", two(0120230, 0005400), two(0170670, 0005460), "R3R1Mh+sRn", mcf5206eup }, -{"msacl", two(0120240, 0005400), two(0170670, 0005460), "R3R1Mh-sRn", mcf5206eup }, -{"msacl", two(0120250, 0005400), two(0170670, 0005460), "R3R1MhdsRn", mcf5206eup }, -{"msacml", two(0120220, 0004440), two(0170670, 0005460), "R3R1asRn", mcf5206eup }, -{"msacml", two(0120230, 0004440), two(0170670, 0005460), "R3R1+sRn", mcf5206eup }, -{"msacml", two(0120240, 0004440), two(0170670, 0005460), "R3R1-sRn", mcf5206eup }, -{"msacml", two(0120250, 0004440), two(0170670, 0005460), "R3R1dsRn", mcf5206eup }, -{"msacml", two(0120220, 0005440), two(0170670, 0005460), "R3R1MhasRn", mcf5206eup }, -{"msacml", two(0120230, 0005440), two(0170670, 0005460), "R3R1Mh+sRn", mcf5206eup }, -{"msacml", two(0120240, 0005440), two(0170670, 0005460), "R3R1Mh-sRn", mcf5206eup }, -{"msacml", two(0120250, 0005440), two(0170670, 0005460), "R3R1MhdsRn", mcf5206eup }, - -{"mulsw", one(0140700), one(0170700), ";wDd", m68000up|mcf }, -{"mulsl", two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 }, -{"mulsl", two(0046000,004000), two(0177700,0107770), "qsD1", mcf }, -{"mulsl", two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 }, - -{"muluw", one(0140300), one(0170700), ";wDd", m68000up|mcf }, -{"mulul", two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 }, -{"mulul", two(0046000,000000), two(0177700,0107770), "qsD1", mcf }, -{"mulul", two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 }, - -{"nbcd", one(0044000), one(0177700), "$s", m68000up }, - -{"negb", one(0042000), one(0177700), "$s", m68000up }, -{"negw", one(0042100), one(0177700), "$s", m68000up }, -{"negl", one(0042200), one(0177700), "$s", m68000up }, -{"negl", one(0042200), one(0177700), "Ds", mcf}, - -{"negxb", one(0040000), one(0177700), "$s", m68000up }, -{"negxw", one(0040100), one(0177700), "$s", m68000up }, -{"negxl", one(0040200), one(0177700), "$s", m68000up }, -{"negxl", one(0040200), one(0177700), "Ds", mcf}, - -{"nop", one(0047161), one(0177777), "", m68000up | mcf}, - -{"notb", one(0043000), one(0177700), "$s", m68000up }, -{"notw", one(0043100), one(0177700), "$s", m68000up }, -{"notl", one(0043200), one(0177700), "$s", m68000up }, -{"notl", one(0043200), one(0177700), "Ds", mcf}, - -{"orib", one(0000000), one(0177700), "#b$s", m68000up }, -{"orib", one(0000074), one(0177777), "#bCs", m68000up }, -{"oriw", one(0000100), one(0177700), "#w$s", m68000up }, -{"oriw", one(0000174), one(0177777), "#wSs", m68000up }, -{"oril", one(0000200), one(0177700), "#l$s", m68000up }, -{"oril", one(0000200), one(0177700), "#lDs", mcf }, -{"ori", one(0000074), one(0177777), "#bCs", m68000up }, -{"ori", one(0000100), one(0177700), "#w$s", m68000up }, -{"ori", one(0000174), one(0177777), "#wSs", m68000up }, +{"moveb", 2, one(0010000), one(0170000), ";b$d", m68000up }, +{"moveb", 2, one(0010000), one(0170070), "Ds$d", mcfisa_a }, +{"moveb", 2, one(0010020), one(0170070), "as$d", mcfisa_a }, +{"moveb", 2, one(0010030), one(0170070), "+s$d", mcfisa_a }, +{"moveb", 2, one(0010040), one(0170070), "-s$d", mcfisa_a }, +{"moveb", 2, one(0010000), one(0170000), "nsqd", mcfisa_a }, +{"moveb", 2, one(0010000), one(0170700), "obDd", mcfisa_a }, +{"moveb", 2, one(0010200), one(0170700), "obad", mcfisa_a }, +{"moveb", 2, one(0010300), one(0170700), "ob+d", mcfisa_a }, +{"moveb", 2, one(0010400), one(0170700), "ob-d", mcfisa_a }, +{"moveb", 2, one(0010000), one(0170000), "obnd", mcfisa_b }, + +{"movew", 2, one(0030000), one(0170000), "*w%d", m68000up }, +{"movew", 2, one(0030000), one(0170000), "ms%d", mcfisa_a }, +{"movew", 2, one(0030000), one(0170000), "nspd", mcfisa_a }, +{"movew", 2, one(0030000), one(0170000), "owmd", mcfisa_a }, +{"movew", 2, one(0030000), one(0170000), "ownd", mcfisa_b }, +{"movew", 2, one(0040300), one(0177700), "Ss$s", m68000up }, +{"movew", 2, one(0040300), one(0177770), "SsDs", mcfisa_a }, +{"movew", 2, one(0041300), one(0177700), "Cs$s", m68010up }, +{"movew", 2, one(0041300), one(0177770), "CsDs", mcfisa_a }, +{"movew", 2, one(0042300), one(0177700), ";wCd", m68000up }, +{"movew", 2, one(0042300), one(0177700), "DsCd", mcfisa_a }, +{"movew", 4, one(0042374), one(0177777), "#wCd", mcfisa_a }, +{"movew", 2, one(0043300), one(0177700), ";wSd", m68000up }, +{"movew", 2, one(0043300), one(0177700), "DsSd", mcfisa_a }, +{"movew", 4, one(0043374), one(0177777), "#wSd", mcfisa_a }, + +{"movel", 2, one(0070000), one(0170400), "MsDd", m68000up | mcfisa_a }, +{"movel", 2, one(0020000), one(0170000), "*l%d", m68000up }, +{"movel", 2, one(0020000), one(0170000), "ms%d", mcfisa_a }, +{"movel", 2, one(0020000), one(0170000), "nspd", mcfisa_a }, +{"movel", 2, one(0020000), one(0170000), "olmd", mcfisa_a }, +{"movel", 2, one(0020000), one(0170000), "olnd", mcfisa_b }, +{"movel", 2, one(0047140), one(0177770), "AsUd", m68000up | mcfusp }, +{"movel", 2, one(0047150), one(0177770), "UdAs", m68000up | mcfusp }, +{"movel", 2, one(0120600), one(0177760), "EsRs", mcfmac }, +{"movel", 2, one(0120400), one(0177760), "RsEs", mcfmac }, +{"movel", 6, one(0120474), one(0177777), "#lEs", mcfmac }, +{"movel", 2, one(0124600), one(0177760), "GsRs", mcfmac }, +{"movel", 2, one(0124400), one(0177760), "RsGs", mcfmac }, +{"movel", 6, one(0124474), one(0177777), "#lGs", mcfmac }, +{"movel", 2, one(0126600), one(0177760), "HsRs", mcfmac }, +{"movel", 2, one(0126400), one(0177760), "RsHs", mcfmac }, +{"movel", 6, one(0126474), one(0177777), "#lHs", mcfmac }, +{"movel", 2, one(0124700), one(0177777), "GsCs", mcfmac }, + +{"movel", 2, one(0xa180), one(0xf9f0), "eFRs", mcfemac }, /* ACCx,Rx. */ +{"movel", 2, one(0xab80), one(0xfbf0), "g]Rs", mcfemac }, /* ACCEXTx,Rx. */ +{"movel", 2, one(0xa980), one(0xfff0), "G-Rs", mcfemac }, /* macsr,Rx. */ +{"movel", 2, one(0xad80), one(0xfff0), "H-Rs", mcfemac }, /* mask,Rx. */ +{"movel", 2, one(0xa110), one(0xf9fc), "efeF", mcfemac }, /* ACCy,ACCx. */ +{"movel", 2, one(0xa9c0), one(0xffff), "G-C-", mcfemac }, /* macsr,ccr. */ +{"movel", 2, one(0xa100), one(0xf9f0), "RseF", mcfemac }, /* Rx,ACCx. */ +{"movel", 6, one(0xa13c), one(0xf9ff), "#leF", mcfemac }, /* #,ACCx. */ +{"movel", 2, one(0xab00), one(0xfbc0), "Rsg]", mcfemac }, /* Rx,ACCEXTx. */ +{"movel", 6, one(0xab3c), one(0xfbff), "#lg]", mcfemac }, /* #,ACCEXTx. */ +{"movel", 2, one(0xa900), one(0xffc0), "RsG-", mcfemac }, /* Rx,macsr. */ +{"movel", 6, one(0xa93c), one(0xffff), "#lG-", mcfemac }, /* #,macsr. */ +{"movel", 2, one(0xad00), one(0xffc0), "RsH-", mcfemac }, /* Rx,mask. */ +{"movel", 6, one(0xad3c), one(0xffff), "#lH-", mcfemac }, /* #,mask. */ + +{"move", 2, one(0030000), one(0170000), "*w%d", m68000up }, +{"move", 2, one(0030000), one(0170000), "ms%d", mcfisa_a }, +{"move", 2, one(0030000), one(0170000), "nspd", mcfisa_a }, +{"move", 2, one(0030000), one(0170000), "owmd", mcfisa_a }, +{"move", 2, one(0030000), one(0170000), "ownd", mcfisa_b }, +{"move", 2, one(0040300), one(0177700), "Ss$s", m68000up }, +{"move", 2, one(0040300), one(0177770), "SsDs", mcfisa_a }, +{"move", 2, one(0041300), one(0177700), "Cs$s", m68010up }, +{"move", 2, one(0041300), one(0177770), "CsDs", mcfisa_a }, +{"move", 2, one(0042300), one(0177700), ";wCd", m68000up }, +{"move", 2, one(0042300), one(0177700), "DsCd", mcfisa_a }, +{"move", 4, one(0042374), one(0177777), "#wCd", mcfisa_a }, +{"move", 2, one(0043300), one(0177700), ";wSd", m68000up }, +{"move", 2, one(0043300), one(0177700), "DsSd", mcfisa_a }, +{"move", 4, one(0043374), one(0177777), "#wSd", mcfisa_a }, + +{"move", 2, one(0047140), one(0177770), "AsUd", m68000up }, +{"move", 2, one(0047150), one(0177770), "UdAs", m68000up }, + +{"mov3ql", 2, one(0120500), one(0170700), "xd%s", mcfisa_b }, +{"mvsb", 2, one(0070400), one(0170700), "*bDd", mcfisa_b }, +{"mvsw", 2, one(0070500), one(0170700), "*wDd", mcfisa_b }, +{"mvzb", 2, one(0070600), one(0170700), "*bDd", mcfisa_b }, +{"mvzw", 2, one(0070700), one(0170700), "*wDd", mcfisa_b }, + +{"movesb", 4, two(0007000, 0), two(0177700, 07777), "~sR1", m68010up }, +{"movesb", 4, two(0007000, 04000), two(0177700, 07777), "R1~s", m68010up }, +{"movesw", 4, two(0007100, 0), two(0177700, 07777), "~sR1", m68010up }, +{"movesw", 4, two(0007100, 04000), two(0177700, 07777), "R1~s", m68010up }, +{"movesl", 4, two(0007200, 0), two(0177700, 07777), "~sR1", m68010up }, +{"movesl", 4, two(0007200, 04000), two(0177700, 07777), "R1~s", m68010up }, + +{"move16", 4, two(0xf620, 0x8000), two(0xfff8, 0x8fff), "+s+1", m68040up }, +{"move16", 2, one(0xf600), one(0xfff8), "+s_L", m68040up }, +{"move16", 2, one(0xf608), one(0xfff8), "_L+s", m68040up }, +{"move16", 2, one(0xf610), one(0xfff8), "as_L", m68040up }, +{"move16", 2, one(0xf618), one(0xfff8), "_Las", m68040up }, + +{"msacw", 4, two(0xa080, 0x0100), two(0xf180, 0x0910), "uNuoiI4/Rn", mcfmac }, +{"msacw", 4, two(0xa080, 0x0300), two(0xf180, 0x0910), "uNuoMh4/Rn", mcfmac }, +{"msacw", 4, two(0xa080, 0x0100), two(0xf180, 0x0f10), "uNuo4/Rn", mcfmac }, +{"msacw", 4, two(0xa000, 0x0100), two(0xf1b0, 0x0900), "uMumiI", mcfmac }, +{"msacw", 4, two(0xa000, 0x0300), two(0xf1b0, 0x0900), "uMumMh", mcfmac }, +{"msacw", 4, two(0xa000, 0x0100), two(0xf1b0, 0x0f00), "uMum", mcfmac }, + +{"msacw", 4, two(0xa000, 0x0100), two(0xf100, 0x0900), "uMumiI4/RneG", mcfemac },/* Ry,Rx,SF,<ea>,accX. */ +{"msacw", 4, two(0xa000, 0x0300), two(0xf100, 0x0900), "uMumMh4/RneG", mcfemac },/* Ry,Rx,+1/-1,<ea>,accX. */ +{"msacw", 4, two(0xa000, 0x0100), two(0xf100, 0x0f00), "uMum4/RneG", mcfemac },/* Ry,Rx,<ea>,accX. */ +{"msacw", 4, two(0xa000, 0x0100), two(0xf130, 0x0900), "uMumiIeH", mcfemac },/* Ry,Rx,SF,accX. */ +{"msacw", 4, two(0xa000, 0x0300), two(0xf130, 0x0900), "uMumMheH", mcfemac },/* Ry,Rx,+1/-1,accX. */ +{"msacw", 4, two(0xa000, 0x0100), two(0xf130, 0x0f00), "uMumeH", mcfemac }, /* Ry,Rx,accX. */ + +{"msacl", 4, two(0xa080, 0x0900), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfmac }, +{"msacl", 4, two(0xa080, 0x0b00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfmac }, +{"msacl", 4, two(0xa080, 0x0900), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac }, +{"msacl", 4, two(0xa000, 0x0900), two(0xf1b0, 0x0b00), "RMRmiI", mcfmac }, +{"msacl", 4, two(0xa000, 0x0b00), two(0xf1b0, 0x0b00), "RMRmMh", mcfmac }, +{"msacl", 4, two(0xa000, 0x0900), two(0xf1b0, 0x0800), "RMRm", mcfmac }, + +{"msacl", 4, two(0xa000, 0x0900), two(0xf100, 0x0900), "R3R1iI4/RneG", mcfemac }, +{"msacl", 4, two(0xa000, 0x0b00), two(0xf100, 0x0900), "R3R1Mh4/RneG", mcfemac }, +{"msacl", 4, two(0xa000, 0x0900), two(0xf100, 0x0f00), "R3R14/RneG", mcfemac }, +{"msacl", 4, two(0xa000, 0x0900), two(0xf130, 0x0900), "RMRmiIeH", mcfemac }, +{"msacl", 4, two(0xa000, 0x0b00), two(0xf130, 0x0900), "RMRmMheH", mcfemac }, +{"msacl", 4, two(0xa000, 0x0900), two(0xf130, 0x0f00), "RMRmeH", mcfemac }, + +{"mulsw", 2, one(0140700), one(0170700), ";wDd", m68000up|mcfisa_a }, +{"mulsl", 4, two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 }, +{"mulsl", 4, two(0046000,004000), two(0177700,0107770), "qsD1", mcfisa_a }, +{"mulsl", 4, two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 }, + +{"muluw", 2, one(0140300), one(0170700), ";wDd", m68000up|mcfisa_a }, +{"mulul", 4, two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 }, +{"mulul", 4, two(0046000,000000), two(0177700,0107770), "qsD1", mcfisa_a }, +{"mulul", 4, two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 }, + +{"nbcd", 2, one(0044000), one(0177700), "$s", m68000up }, + +{"negb", 2, one(0042000), one(0177700), "$s", m68000up }, +{"negw", 2, one(0042100), one(0177700), "$s", m68000up }, +{"negl", 2, one(0042200), one(0177700), "$s", m68000up }, +{"negl", 2, one(0042200), one(0177700), "Ds", mcfisa_a}, + +{"negxb", 2, one(0040000), one(0177700), "$s", m68000up }, +{"negxw", 2, one(0040100), one(0177700), "$s", m68000up }, +{"negxl", 2, one(0040200), one(0177700), "$s", m68000up }, +{"negxl", 2, one(0040200), one(0177700), "Ds", mcfisa_a}, + +{"nop", 2, one(0047161), one(0177777), "", m68000up | mcfisa_a}, + +{"notb", 2, one(0043000), one(0177700), "$s", m68000up }, +{"notw", 2, one(0043100), one(0177700), "$s", m68000up }, +{"notl", 2, one(0043200), one(0177700), "$s", m68000up }, +{"notl", 2, one(0043200), one(0177700), "Ds", mcfisa_a}, + +{"orib", 4, one(0000000), one(0177700), "#b$s", m68000up }, +{"orib", 4, one(0000074), one(0177777), "#bCs", m68000up }, +{"oriw", 4, one(0000100), one(0177700), "#w$s", m68000up }, +{"oriw", 4, one(0000174), one(0177777), "#wSs", m68000up }, +{"oril", 6, one(0000200), one(0177700), "#l$s", m68000up }, +{"oril", 6, one(0000200), one(0177700), "#lDs", mcfisa_a }, +{"ori", 4, one(0000074), one(0177777), "#bCs", m68000up }, +{"ori", 4, one(0000100), one(0177700), "#w$s", m68000up }, +{"ori", 4, one(0000174), one(0177777), "#wSs", m68000up }, /* The or opcode can generate the ori instruction. */ -{"orb", one(0000000), one(0177700), "#b$s", m68000up }, -{"orb", one(0000074), one(0177777), "#bCs", m68000up }, -{"orb", one(0100000), one(0170700), ";bDd", m68000up }, -{"orb", one(0100400), one(0170700), "Dd~s", m68000up }, -{"orw", one(0000100), one(0177700), "#w$s", m68000up }, -{"orw", one(0000174), one(0177777), "#wSs", m68000up }, -{"orw", one(0100100), one(0170700), ";wDd", m68000up }, -{"orw", one(0100500), one(0170700), "Dd~s", m68000up }, -{"orl", one(0000200), one(0177700), "#l$s", m68000up }, -{"orl", one(0000200), one(0177700), "#lDs", mcf }, -{"orl", one(0100200), one(0170700), ";lDd", m68000up | mcf }, -{"orl", one(0100600), one(0170700), "Dd~s", m68000up | mcf }, -{"or", one(0000074), one(0177777), "#bCs", m68000up }, -{"or", one(0000100), one(0177700), "#w$s", m68000up }, -{"or", one(0000174), one(0177777), "#wSs", m68000up }, -{"or", one(0100100), one(0170700), ";wDd", m68000up }, -{"or", one(0100500), one(0170700), "Dd~s", m68000up }, - -{"pack", one(0100500), one(0170770), "DsDd#w", m68020up }, -{"pack", one(0100510), one(0170770), "-s-d#w", m68020up }, - -{"pbac", one(0xf087), one(0xffbf), "Bc", m68851 }, -{"pbacw", one(0xf087), one(0xffff), "BW", m68851 }, -{"pbas", one(0xf086), one(0xffbf), "Bc", m68851 }, -{"pbasw", one(0xf086), one(0xffff), "BW", m68851 }, -{"pbbc", one(0xf081), one(0xffbf), "Bc", m68851 }, -{"pbbcw", one(0xf081), one(0xffff), "BW", m68851 }, -{"pbbs", one(0xf080), one(0xffbf), "Bc", m68851 }, -{"pbbsw", one(0xf080), one(0xffff), "BW", m68851 }, -{"pbcc", one(0xf08f), one(0xffbf), "Bc", m68851 }, -{"pbccw", one(0xf08f), one(0xffff), "BW", m68851 }, -{"pbcs", one(0xf08e), one(0xffbf), "Bc", m68851 }, -{"pbcsw", one(0xf08e), one(0xffff), "BW", m68851 }, -{"pbgc", one(0xf08d), one(0xffbf), "Bc", m68851 }, -{"pbgcw", one(0xf08d), one(0xffff), "BW", m68851 }, -{"pbgs", one(0xf08c), one(0xffbf), "Bc", m68851 }, -{"pbgsw", one(0xf08c), one(0xffff), "BW", m68851 }, -{"pbic", one(0xf08b), one(0xffbf), "Bc", m68851 }, -{"pbicw", one(0xf08b), one(0xffff), "BW", m68851 }, -{"pbis", one(0xf08a), one(0xffbf), "Bc", m68851 }, -{"pbisw", one(0xf08a), one(0xffff), "BW", m68851 }, -{"pblc", one(0xf083), one(0xffbf), "Bc", m68851 }, -{"pblcw", one(0xf083), one(0xffff), "BW", m68851 }, -{"pbls", one(0xf082), one(0xffbf), "Bc", m68851 }, -{"pblsw", one(0xf082), one(0xffff), "BW", m68851 }, -{"pbsc", one(0xf085), one(0xffbf), "Bc", m68851 }, -{"pbscw", one(0xf085), one(0xffff), "BW", m68851 }, -{"pbss", one(0xf084), one(0xffbf), "Bc", m68851 }, -{"pbssw", one(0xf084), one(0xffff), "BW", m68851 }, -{"pbwc", one(0xf089), one(0xffbf), "Bc", m68851 }, -{"pbwcw", one(0xf089), one(0xffff), "BW", m68851 }, -{"pbws", one(0xf088), one(0xffbf), "Bc", m68851 }, -{"pbwsw", one(0xf088), one(0xffff), "BW", m68851 }, - -{"pdbac", two(0xf048, 0x0007), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbas", two(0xf048, 0x0006), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbbc", two(0xf048, 0x0001), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbbs", two(0xf048, 0x0000), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbcc", two(0xf048, 0x000f), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbcs", two(0xf048, 0x000e), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbgc", two(0xf048, 0x000d), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbgs", two(0xf048, 0x000c), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbic", two(0xf048, 0x000b), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbis", two(0xf048, 0x000a), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdblc", two(0xf048, 0x0003), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbls", two(0xf048, 0x0002), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbsc", two(0xf048, 0x0005), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbss", two(0xf048, 0x0004), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbwc", two(0xf048, 0x0009), two(0xfff8, 0xffff), "DsBw", m68851 }, -{"pdbws", two(0xf048, 0x0008), two(0xfff8, 0xffff), "DsBw", m68851 }, - -{"pea", one(0044100), one(0177700), "!s", m68000up|mcf }, - -{"pflusha", one(0xf518), one(0xfff8), "", m68040up }, -{"pflusha", two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 }, - -{"pflush", two(0xf000,0x3010), two(0xffc0,0xfe10), "T3T9", m68030|m68851 }, -{"pflush", two(0xf000,0x3810), two(0xffc0,0xfe10), "T3T9&s", m68030|m68851 }, -{"pflush", two(0xf000,0x3008), two(0xffc0,0xfe18), "D3T9", m68030|m68851 }, -{"pflush", two(0xf000,0x3808), two(0xffc0,0xfe18), "D3T9&s", m68030|m68851 }, -{"pflush", two(0xf000,0x3000), two(0xffc0,0xfe1e), "f3T9", m68030|m68851 }, -{"pflush", two(0xf000,0x3800), two(0xffc0,0xfe1e), "f3T9&s", m68030|m68851 }, -{"pflush", one(0xf508), one(0xfff8), "as", m68040up }, -{"pflush", one(0xf508), one(0xfff8), "As", m68040up }, - -{"pflushan", one(0xf510), one(0xfff8), "", m68040up }, -{"pflushn", one(0xf500), one(0xfff8), "as", m68040up }, -{"pflushn", one(0xf500), one(0xfff8), "As", m68040up }, - -{"pflushr", two(0xf000, 0xa000), two(0xffc0, 0xffff), "|s", m68851 }, - -{"pflushs", two(0xf000, 0x3410), two(0xfff8, 0xfe10), "T3T9", m68851 }, -{"pflushs", two(0xf000, 0x3c10), two(0xfff8, 0xfe10), "T3T9&s", m68851 }, -{"pflushs", two(0xf000, 0x3408), two(0xfff8, 0xfe18), "D3T9", m68851 }, -{"pflushs", two(0xf000, 0x3c08), two(0xfff8, 0xfe18), "D3T9&s", m68851 }, -{"pflushs", two(0xf000, 0x3400), two(0xfff8, 0xfe1e), "f3T9", m68851 }, -{"pflushs", two(0xf000, 0x3c00), two(0xfff8, 0xfe1e), "f3T9&s", m68851 }, - -{"ploadr", two(0xf000,0x2210), two(0xffc0,0xfff0), "T3&s", m68030|m68851 }, -{"ploadr", two(0xf000,0x2208), two(0xffc0,0xfff8), "D3&s", m68030|m68851 }, -{"ploadr", two(0xf000,0x2200), two(0xffc0,0xfffe), "f3&s", m68030|m68851 }, -{"ploadw", two(0xf000,0x2010), two(0xffc0,0xfff0), "T3&s", m68030|m68851 }, -{"ploadw", two(0xf000,0x2008), two(0xffc0,0xfff8), "D3&s", m68030|m68851 }, -{"ploadw", two(0xf000,0x2000), two(0xffc0,0xfffe), "f3&s", m68030|m68851 }, - -{"plpar", one(0xf5c8), one(0xfff8), "as", m68060 }, -{"plpaw", one(0xf588), one(0xfff8), "as", m68060 }, - -{"pmove", two(0xf000,0x4000), two(0xffc0,0xffff), "*l08", m68030|m68851 }, -{"pmove", two(0xf000,0x5c00), two(0xffc0,0xffff), "*w18", m68851 }, -{"pmove", two(0xf000,0x4000), two(0xffc0,0xe3ff), "*b28", m68851 }, -{"pmove", two(0xf000,0x4200), two(0xffc0,0xffff), "08%s", m68030|m68851 }, -{"pmove", two(0xf000,0x5e00), two(0xffc0,0xffff), "18%s", m68851 }, -{"pmove", two(0xf000,0x4200), two(0xffc0,0xe3ff), "28%s", m68851 }, -{"pmove", two(0xf000,0x4000), two(0xffc0,0xe3ff), "|sW8", m68030|m68851 }, -{"pmove", two(0xf000,0x4200), two(0xffc0,0xe3ff), "W8~s", m68030|m68851 }, -{"pmove", two(0xf000,0x6200), two(0xffc0,0xe3e3), "*wX3", m68851 }, -{"pmove", two(0xf000,0x6000), two(0xffc0,0xe3e3), "X3%s", m68851 }, -{"pmove", two(0xf000,0x6000), two(0xffc0,0xffff), "*wY8", m68030|m68851 }, -{"pmove", two(0xf000,0x6200), two(0xffc0,0xffff), "Y8%s", m68030|m68851 }, -{"pmove", two(0xf000,0x6600), two(0xffc0,0xffff), "Z8%s", m68851 }, -{"pmove", two(0xf000,0x0800), two(0xffc0,0xfbff), "*l38", m68030 }, -{"pmove", two(0xf000,0x0a00), two(0xffc0,0xfbff), "38%s", m68030 }, - -{"pmovefd", two(0xf000, 0x4100), two(0xffc0, 0xe3ff), "*l08", m68030 }, -{"pmovefd", two(0xf000, 0x4100), two(0xffc0, 0xe3ff), "|sW8", m68030 }, -{"pmovefd", two(0xf000, 0x0900), two(0xffc0, 0xfbff), "*l38", m68030 }, - -{"prestore", one(0xf140), one(0xffc0), "<s", m68851 }, - -{"psave", one(0xf100), one(0xffc0), ">s", m68851 }, - -{"psac", two(0xf040, 0x0007), two(0xffc0, 0xffff), "$s", m68851 }, -{"psas", two(0xf040, 0x0006), two(0xffc0, 0xffff), "$s", m68851 }, -{"psbc", two(0xf040, 0x0001), two(0xffc0, 0xffff), "$s", m68851 }, -{"psbs", two(0xf040, 0x0000), two(0xffc0, 0xffff), "$s", m68851 }, -{"pscc", two(0xf040, 0x000f), two(0xffc0, 0xffff), "$s", m68851 }, -{"pscs", two(0xf040, 0x000e), two(0xffc0, 0xffff), "$s", m68851 }, -{"psgc", two(0xf040, 0x000d), two(0xffc0, 0xffff), "$s", m68851 }, -{"psgs", two(0xf040, 0x000c), two(0xffc0, 0xffff), "$s", m68851 }, -{"psic", two(0xf040, 0x000b), two(0xffc0, 0xffff), "$s", m68851 }, -{"psis", two(0xf040, 0x000a), two(0xffc0, 0xffff), "$s", m68851 }, -{"pslc", two(0xf040, 0x0003), two(0xffc0, 0xffff), "$s", m68851 }, -{"psls", two(0xf040, 0x0002), two(0xffc0, 0xffff), "$s", m68851 }, -{"pssc", two(0xf040, 0x0005), two(0xffc0, 0xffff), "$s", m68851 }, -{"psss", two(0xf040, 0x0004), two(0xffc0, 0xffff), "$s", m68851 }, -{"pswc", two(0xf040, 0x0009), two(0xffc0, 0xffff), "$s", m68851 }, -{"psws", two(0xf040, 0x0008), two(0xffc0, 0xffff), "$s", m68851 }, - -{"ptestr", two(0xf000,0x8210), two(0xffc0, 0xe3f0), "T3&st8", m68030|m68851 }, -{"ptestr", two(0xf000,0x8310), two(0xffc0,0xe310), "T3&st8A9", m68030|m68851 }, -{"ptestr", two(0xf000,0x8208), two(0xffc0,0xe3f8), "D3&st8", m68030|m68851 }, -{"ptestr", two(0xf000,0x8308), two(0xffc0,0xe318), "D3&st8A9", m68030|m68851 }, -{"ptestr", two(0xf000,0x8200), two(0xffc0,0xe3fe), "f3&st8", m68030|m68851 }, -{"ptestr", two(0xf000,0x8300), two(0xffc0,0xe31e), "f3&st8A9", m68030|m68851 }, -{"ptestr", one(0xf568), one(0xfff8), "as", m68040 }, - -{"ptestw", two(0xf000,0x8010), two(0xffc0,0xe3f0), "T3&st8", m68030|m68851 }, -{"ptestw", two(0xf000,0x8110), two(0xffc0,0xe310), "T3&st8A9", m68030|m68851 }, -{"ptestw", two(0xf000,0x8008), two(0xffc0,0xe3f8), "D3&st8", m68030|m68851 }, -{"ptestw", two(0xf000,0x8108), two(0xffc0,0xe318), "D3&st8A9", m68030|m68851 }, -{"ptestw", two(0xf000,0x8000), two(0xffc0,0xe3fe), "f3&st8", m68030|m68851 }, -{"ptestw", two(0xf000,0x8100), two(0xffc0,0xe31e), "f3&st8A9", m68030|m68851 }, -{"ptestw", one(0xf548), one(0xfff8), "as", m68040 }, - -{"ptrapacw", two(0xf07a, 0x0007), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapacl", two(0xf07b, 0x0007), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapac", two(0xf07c, 0x0007), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapasw", two(0xf07a, 0x0006), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapasl", two(0xf07b, 0x0006), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapas", two(0xf07c, 0x0006), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapbcw", two(0xf07a, 0x0001), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapbcl", two(0xf07b, 0x0001), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapbc", two(0xf07c, 0x0001), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapbsw", two(0xf07a, 0x0000), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapbsl", two(0xf07b, 0x0000), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapbs", two(0xf07c, 0x0000), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapccw", two(0xf07a, 0x000f), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapccl", two(0xf07b, 0x000f), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapcc", two(0xf07c, 0x000f), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapcsw", two(0xf07a, 0x000e), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapcsl", two(0xf07b, 0x000e), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapcs", two(0xf07c, 0x000e), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapgcw", two(0xf07a, 0x000d), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapgcl", two(0xf07b, 0x000d), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapgc", two(0xf07c, 0x000d), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapgsw", two(0xf07a, 0x000c), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapgsl", two(0xf07b, 0x000c), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapgs", two(0xf07c, 0x000c), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapicw", two(0xf07a, 0x000b), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapicl", two(0xf07b, 0x000b), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapic", two(0xf07c, 0x000b), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapisw", two(0xf07a, 0x000a), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapisl", two(0xf07b, 0x000a), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapis", two(0xf07c, 0x000a), two(0xffff, 0xffff), "", m68851 }, - -{"ptraplcw", two(0xf07a, 0x0003), two(0xffff, 0xffff), "#w", m68851 }, -{"ptraplcl", two(0xf07b, 0x0003), two(0xffff, 0xffff), "#l", m68851 }, -{"ptraplc", two(0xf07c, 0x0003), two(0xffff, 0xffff), "", m68851 }, - -{"ptraplsw", two(0xf07a, 0x0002), two(0xffff, 0xffff), "#w", m68851 }, -{"ptraplsl", two(0xf07b, 0x0002), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapls", two(0xf07c, 0x0002), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapscw", two(0xf07a, 0x0005), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapscl", two(0xf07b, 0x0005), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapsc", two(0xf07c, 0x0005), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapssw", two(0xf07a, 0x0004), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapssl", two(0xf07b, 0x0004), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapss", two(0xf07c, 0x0004), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapwcw", two(0xf07a, 0x0009), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapwcl", two(0xf07b, 0x0009), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapwc", two(0xf07c, 0x0009), two(0xffff, 0xffff), "", m68851 }, - -{"ptrapwsw", two(0xf07a, 0x0008), two(0xffff, 0xffff), "#w", m68851 }, -{"ptrapwsl", two(0xf07b, 0x0008), two(0xffff, 0xffff), "#l", m68851 }, -{"ptrapws", two(0xf07c, 0x0008), two(0xffff, 0xffff), "", m68851 }, - -{"pulse", one(0045314), one(0177777), "", m68060 | mcf }, - -{"pvalid", two(0xf000, 0x2800), two(0xffc0, 0xffff), "Vs&s", m68851 }, -{"pvalid", two(0xf000, 0x2c00), two(0xffc0, 0xfff8), "A3&s", m68851 }, +{"orb", 4, one(0000000), one(0177700), "#b$s", m68000up }, +{"orb", 4, one(0000074), one(0177777), "#bCs", m68000up }, +{"orb", 2, one(0100000), one(0170700), ";bDd", m68000up }, +{"orb", 2, one(0100400), one(0170700), "Dd~s", m68000up }, +{"orw", 4, one(0000100), one(0177700), "#w$s", m68000up }, +{"orw", 4, one(0000174), one(0177777), "#wSs", m68000up }, +{"orw", 2, one(0100100), one(0170700), ";wDd", m68000up }, +{"orw", 2, one(0100500), one(0170700), "Dd~s", m68000up }, +{"orl", 6, one(0000200), one(0177700), "#l$s", m68000up }, +{"orl", 6, one(0000200), one(0177700), "#lDs", mcfisa_a }, +{"orl", 2, one(0100200), one(0170700), ";lDd", m68000up | mcfisa_a }, +{"orl", 2, one(0100600), one(0170700), "Dd~s", m68000up | mcfisa_a }, +{"or", 4, one(0000074), one(0177777), "#bCs", m68000up }, +{"or", 4, one(0000100), one(0177700), "#w$s", m68000up }, +{"or", 4, one(0000174), one(0177777), "#wSs", m68000up }, +{"or", 2, one(0100100), one(0170700), ";wDd", m68000up }, +{"or", 2, one(0100500), one(0170700), "Dd~s", m68000up }, + +{"pack", 4, one(0100500), one(0170770), "DsDd#w", m68020up }, +{"pack", 4, one(0100510), one(0170770), "-s-d#w", m68020up }, + +{"pbac", 2, one(0xf087), one(0xffbf), "Bc", m68851 }, +{"pbacw", 2, one(0xf087), one(0xffff), "BW", m68851 }, +{"pbas", 2, one(0xf086), one(0xffbf), "Bc", m68851 }, +{"pbasw", 2, one(0xf086), one(0xffff), "BW", m68851 }, +{"pbbc", 2, one(0xf081), one(0xffbf), "Bc", m68851 }, +{"pbbcw", 2, one(0xf081), one(0xffff), "BW", m68851 }, +{"pbbs", 2, one(0xf080), one(0xffbf), "Bc", m68851 }, +{"pbbsw", 2, one(0xf080), one(0xffff), "BW", m68851 }, +{"pbcc", 2, one(0xf08f), one(0xffbf), "Bc", m68851 }, +{"pbccw", 2, one(0xf08f), one(0xffff), "BW", m68851 }, +{"pbcs", 2, one(0xf08e), one(0xffbf), "Bc", m68851 }, +{"pbcsw", 2, one(0xf08e), one(0xffff), "BW", m68851 }, +{"pbgc", 2, one(0xf08d), one(0xffbf), "Bc", m68851 }, +{"pbgcw", 2, one(0xf08d), one(0xffff), "BW", m68851 }, +{"pbgs", 2, one(0xf08c), one(0xffbf), "Bc", m68851 }, +{"pbgsw", 2, one(0xf08c), one(0xffff), "BW", m68851 }, +{"pbic", 2, one(0xf08b), one(0xffbf), "Bc", m68851 }, +{"pbicw", 2, one(0xf08b), one(0xffff), "BW", m68851 }, +{"pbis", 2, one(0xf08a), one(0xffbf), "Bc", m68851 }, +{"pbisw", 2, one(0xf08a), one(0xffff), "BW", m68851 }, +{"pblc", 2, one(0xf083), one(0xffbf), "Bc", m68851 }, +{"pblcw", 2, one(0xf083), one(0xffff), "BW", m68851 }, +{"pbls", 2, one(0xf082), one(0xffbf), "Bc", m68851 }, +{"pblsw", 2, one(0xf082), one(0xffff), "BW", m68851 }, +{"pbsc", 2, one(0xf085), one(0xffbf), "Bc", m68851 }, +{"pbscw", 2, one(0xf085), one(0xffff), "BW", m68851 }, +{"pbss", 2, one(0xf084), one(0xffbf), "Bc", m68851 }, +{"pbssw", 2, one(0xf084), one(0xffff), "BW", m68851 }, +{"pbwc", 2, one(0xf089), one(0xffbf), "Bc", m68851 }, +{"pbwcw", 2, one(0xf089), one(0xffff), "BW", m68851 }, +{"pbws", 2, one(0xf088), one(0xffbf), "Bc", m68851 }, +{"pbwsw", 2, one(0xf088), one(0xffff), "BW", m68851 }, + +{"pdbac", 4, two(0xf048, 0x0007), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbas", 4, two(0xf048, 0x0006), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbbc", 4, two(0xf048, 0x0001), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbbs", 4, two(0xf048, 0x0000), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbcc", 4, two(0xf048, 0x000f), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbcs", 4, two(0xf048, 0x000e), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbgc", 4, two(0xf048, 0x000d), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbgs", 4, two(0xf048, 0x000c), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbic", 4, two(0xf048, 0x000b), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbis", 4, two(0xf048, 0x000a), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdblc", 4, two(0xf048, 0x0003), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbls", 4, two(0xf048, 0x0002), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbsc", 4, two(0xf048, 0x0005), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbss", 4, two(0xf048, 0x0004), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbwc", 4, two(0xf048, 0x0009), two(0xfff8, 0xffff), "DsBw", m68851 }, +{"pdbws", 4, two(0xf048, 0x0008), two(0xfff8, 0xffff), "DsBw", m68851 }, + +{"pea", 2, one(0044100), one(0177700), "!s", m68000up|mcfisa_a }, + +{"pflusha", 2, one(0xf518), one(0xfff8), "", m68040up }, +{"pflusha", 4, two(0xf000,0x2400), two(0xffff,0xffff), "", m68030 | m68851 }, + +{"pflush", 4, two(0xf000,0x3010), two(0xffc0,0xfe10), "T3T9", m68030|m68851 }, +{"pflush", 4, two(0xf000,0x3810), two(0xffc0,0xfe10), "T3T9&s", m68030|m68851 }, +{"pflush", 4, two(0xf000,0x3008), two(0xffc0,0xfe18), "D3T9", m68030|m68851 }, +{"pflush", 4, two(0xf000,0x3808), two(0xffc0,0xfe18), "D3T9&s", m68030|m68851 }, +{"pflush", 4, two(0xf000,0x3000), two(0xffc0,0xfe1e), "f3T9", m68030|m68851 }, +{"pflush", 4, two(0xf000,0x3800), two(0xffc0,0xfe1e), "f3T9&s", m68030|m68851 }, +{"pflush", 2, one(0xf508), one(0xfff8), "as", m68040up }, +{"pflush", 2, one(0xf508), one(0xfff8), "As", m68040up }, + +{"pflushan", 2, one(0xf510), one(0xfff8), "", m68040up }, +{"pflushn", 2, one(0xf500), one(0xfff8), "as", m68040up }, +{"pflushn", 2, one(0xf500), one(0xfff8), "As", m68040up }, + +{"pflushr", 4, two(0xf000, 0xa000), two(0xffc0, 0xffff), "|s", m68851 }, + +{"pflushs", 4, two(0xf000, 0x3410), two(0xfff8, 0xfe10), "T3T9", m68851 }, +{"pflushs", 4, two(0xf000, 0x3c10), two(0xfff8, 0xfe10), "T3T9&s", m68851 }, +{"pflushs", 4, two(0xf000, 0x3408), two(0xfff8, 0xfe18), "D3T9", m68851 }, +{"pflushs", 4, two(0xf000, 0x3c08), two(0xfff8, 0xfe18), "D3T9&s", m68851 }, +{"pflushs", 4, two(0xf000, 0x3400), two(0xfff8, 0xfe1e), "f3T9", m68851 }, +{"pflushs", 4, two(0xf000, 0x3c00), two(0xfff8, 0xfe1e), "f3T9&s", m68851 }, + +{"ploadr", 4, two(0xf000,0x2210), two(0xffc0,0xfff0), "T3&s", m68030|m68851 }, +{"ploadr", 4, two(0xf000,0x2208), two(0xffc0,0xfff8), "D3&s", m68030|m68851 }, +{"ploadr", 4, two(0xf000,0x2200), two(0xffc0,0xfffe), "f3&s", m68030|m68851 }, +{"ploadw", 4, two(0xf000,0x2010), two(0xffc0,0xfff0), "T3&s", m68030|m68851 }, +{"ploadw", 4, two(0xf000,0x2008), two(0xffc0,0xfff8), "D3&s", m68030|m68851 }, +{"ploadw", 4, two(0xf000,0x2000), two(0xffc0,0xfffe), "f3&s", m68030|m68851 }, + +{"plpar", 2, one(0xf5c8), one(0xfff8), "as", m68060 }, +{"plpaw", 2, one(0xf588), one(0xfff8), "as", m68060 }, + +{"pmove", 4, two(0xf000,0x4000), two(0xffc0,0xffff), "*l08", m68030|m68851 }, +{"pmove", 4, two(0xf000,0x5c00), two(0xffc0,0xffff), "*w18", m68851 }, +{"pmove", 4, two(0xf000,0x4000), two(0xffc0,0xe3ff), "*b28", m68851 }, +{"pmove", 4, two(0xf000,0x4200), two(0xffc0,0xffff), "08%s", m68030|m68851 }, +{"pmove", 4, two(0xf000,0x5e00), two(0xffc0,0xffff), "18%s", m68851 }, +{"pmove", 4, two(0xf000,0x4200), two(0xffc0,0xe3ff), "28%s", m68851 }, +{"pmove", 4, two(0xf000,0x4000), two(0xffc0,0xe3ff), "|sW8", m68030|m68851 }, +{"pmove", 4, two(0xf000,0x4200), two(0xffc0,0xe3ff), "W8~s", m68030|m68851 }, +{"pmove", 4, two(0xf000,0x6200), two(0xffc0,0xe3e3), "*wX3", m68851 }, +{"pmove", 4, two(0xf000,0x6000), two(0xffc0,0xe3e3), "X3%s", m68851 }, +{"pmove", 4, two(0xf000,0x6000), two(0xffc0,0xffff), "*wY8", m68030|m68851 }, +{"pmove", 4, two(0xf000,0x6200), two(0xffc0,0xffff), "Y8%s", m68030|m68851 }, +{"pmove", 4, two(0xf000,0x6600), two(0xffc0,0xffff), "Z8%s", m68851 }, +{"pmove", 4, two(0xf000,0x0800), two(0xffc0,0xfbff), "*l38", m68030 }, +{"pmove", 4, two(0xf000,0x0a00), two(0xffc0,0xfbff), "38%s", m68030 }, + +{"pmovefd", 4, two(0xf000, 0x4100), two(0xffc0, 0xe3ff), "*l08", m68030 }, +{"pmovefd", 4, two(0xf000, 0x4100), two(0xffc0, 0xe3ff), "|sW8", m68030 }, +{"pmovefd", 4, two(0xf000, 0x0900), two(0xffc0, 0xfbff), "*l38", m68030 }, + +{"prestore", 2, one(0xf140), one(0xffc0), "<s", m68851 }, + +{"psave", 2, one(0xf100), one(0xffc0), ">s", m68851 }, + +{"psac", 4, two(0xf040, 0x0007), two(0xffc0, 0xffff), "$s", m68851 }, +{"psas", 4, two(0xf040, 0x0006), two(0xffc0, 0xffff), "$s", m68851 }, +{"psbc", 4, two(0xf040, 0x0001), two(0xffc0, 0xffff), "$s", m68851 }, +{"psbs", 4, two(0xf040, 0x0000), two(0xffc0, 0xffff), "$s", m68851 }, +{"pscc", 4, two(0xf040, 0x000f), two(0xffc0, 0xffff), "$s", m68851 }, +{"pscs", 4, two(0xf040, 0x000e), two(0xffc0, 0xffff), "$s", m68851 }, +{"psgc", 4, two(0xf040, 0x000d), two(0xffc0, 0xffff), "$s", m68851 }, +{"psgs", 4, two(0xf040, 0x000c), two(0xffc0, 0xffff), "$s", m68851 }, +{"psic", 4, two(0xf040, 0x000b), two(0xffc0, 0xffff), "$s", m68851 }, +{"psis", 4, two(0xf040, 0x000a), two(0xffc0, 0xffff), "$s", m68851 }, +{"pslc", 4, two(0xf040, 0x0003), two(0xffc0, 0xffff), "$s", m68851 }, +{"psls", 4, two(0xf040, 0x0002), two(0xffc0, 0xffff), "$s", m68851 }, +{"pssc", 4, two(0xf040, 0x0005), two(0xffc0, 0xffff), "$s", m68851 }, +{"psss", 4, two(0xf040, 0x0004), two(0xffc0, 0xffff), "$s", m68851 }, +{"pswc", 4, two(0xf040, 0x0009), two(0xffc0, 0xffff), "$s", m68851 }, +{"psws", 4, two(0xf040, 0x0008), two(0xffc0, 0xffff), "$s", m68851 }, + +{"ptestr", 4, two(0xf000,0x8210), two(0xffc0, 0xe3f0), "T3&st8", m68030|m68851 }, +{"ptestr", 4, two(0xf000,0x8310), two(0xffc0,0xe310), "T3&st8A9", m68030|m68851 }, +{"ptestr", 4, two(0xf000,0x8208), two(0xffc0,0xe3f8), "D3&st8", m68030|m68851 }, +{"ptestr", 4, two(0xf000,0x8308), two(0xffc0,0xe318), "D3&st8A9", m68030|m68851 }, +{"ptestr", 4, two(0xf000,0x8200), two(0xffc0,0xe3fe), "f3&st8", m68030|m68851 }, +{"ptestr", 4, two(0xf000,0x8300), two(0xffc0,0xe31e), "f3&st8A9", m68030|m68851 }, +{"ptestr", 2, one(0xf568), one(0xfff8), "as", m68040 }, + +{"ptestw", 4, two(0xf000,0x8010), two(0xffc0,0xe3f0), "T3&st8", m68030|m68851 }, +{"ptestw", 4, two(0xf000,0x8110), two(0xffc0,0xe310), "T3&st8A9", m68030|m68851 }, +{"ptestw", 4, two(0xf000,0x8008), two(0xffc0,0xe3f8), "D3&st8", m68030|m68851 }, +{"ptestw", 4, two(0xf000,0x8108), two(0xffc0,0xe318), "D3&st8A9", m68030|m68851 }, +{"ptestw", 4, two(0xf000,0x8000), two(0xffc0,0xe3fe), "f3&st8", m68030|m68851 }, +{"ptestw", 4, two(0xf000,0x8100), two(0xffc0,0xe31e), "f3&st8A9", m68030|m68851 }, +{"ptestw", 2, one(0xf548), one(0xfff8), "as", m68040 }, + +{"ptrapacw", 6, two(0xf07a, 0x0007), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapacl", 6, two(0xf07b, 0x0007), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapac", 4, two(0xf07c, 0x0007), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapasw", 6, two(0xf07a, 0x0006), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapasl", 6, two(0xf07b, 0x0006), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapas", 4, two(0xf07c, 0x0006), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapbcw", 6, two(0xf07a, 0x0001), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapbcl", 6, two(0xf07b, 0x0001), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapbc", 4, two(0xf07c, 0x0001), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapbsw", 6, two(0xf07a, 0x0000), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapbsl", 6, two(0xf07b, 0x0000), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapbs", 4, two(0xf07c, 0x0000), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapccw", 6, two(0xf07a, 0x000f), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapccl", 6, two(0xf07b, 0x000f), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapcc", 4, two(0xf07c, 0x000f), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapcsw", 6, two(0xf07a, 0x000e), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapcsl", 6, two(0xf07b, 0x000e), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapcs", 4, two(0xf07c, 0x000e), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapgcw", 6, two(0xf07a, 0x000d), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapgcl", 6, two(0xf07b, 0x000d), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapgc", 4, two(0xf07c, 0x000d), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapgsw", 6, two(0xf07a, 0x000c), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapgsl", 6, two(0xf07b, 0x000c), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapgs", 4, two(0xf07c, 0x000c), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapicw", 6, two(0xf07a, 0x000b), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapicl", 6, two(0xf07b, 0x000b), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapic", 4, two(0xf07c, 0x000b), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapisw", 6, two(0xf07a, 0x000a), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapisl", 6, two(0xf07b, 0x000a), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapis", 4, two(0xf07c, 0x000a), two(0xffff, 0xffff), "", m68851 }, + +{"ptraplcw", 6, two(0xf07a, 0x0003), two(0xffff, 0xffff), "#w", m68851 }, +{"ptraplcl", 6, two(0xf07b, 0x0003), two(0xffff, 0xffff), "#l", m68851 }, +{"ptraplc", 4, two(0xf07c, 0x0003), two(0xffff, 0xffff), "", m68851 }, + +{"ptraplsw", 6, two(0xf07a, 0x0002), two(0xffff, 0xffff), "#w", m68851 }, +{"ptraplsl", 6, two(0xf07b, 0x0002), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapls", 4, two(0xf07c, 0x0002), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapscw", 6, two(0xf07a, 0x0005), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapscl", 6, two(0xf07b, 0x0005), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapsc", 4, two(0xf07c, 0x0005), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapssw", 6, two(0xf07a, 0x0004), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapssl", 6, two(0xf07b, 0x0004), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapss", 4, two(0xf07c, 0x0004), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapwcw", 6, two(0xf07a, 0x0009), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapwcl", 6, two(0xf07b, 0x0009), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapwc", 4, two(0xf07c, 0x0009), two(0xffff, 0xffff), "", m68851 }, + +{"ptrapwsw", 6, two(0xf07a, 0x0008), two(0xffff, 0xffff), "#w", m68851 }, +{"ptrapwsl", 6, two(0xf07b, 0x0008), two(0xffff, 0xffff), "#l", m68851 }, +{"ptrapws", 4, two(0xf07c, 0x0008), two(0xffff, 0xffff), "", m68851 }, + +{"pulse", 2, one(0045314), one(0177777), "", m68060 | mcfisa_a }, + +{"pvalid", 4, two(0xf000, 0x2800), two(0xffc0, 0xffff), "Vs&s", m68851 }, +{"pvalid", 4, two(0xf000, 0x2c00), two(0xffc0, 0xfff8), "A3&s", m68851 }, /* FIXME: don't allow Dw==Dx. */ -{"remsl", two(0x4c40, 0x0800), two(0xffc0, 0x8ff8), "qsD3D1", mcf5206eup }, -{"remul", two(0x4c40, 0x0000), two(0xffc0, 0x8ff8), "qsD3D1", mcf5206eup }, - -{"reset", one(0047160), one(0177777), "", m68000up }, - -{"rolb", one(0160430), one(0170770), "QdDs", m68000up }, -{"rolb", one(0160470), one(0170770), "DdDs", m68000up }, -{"rolw", one(0160530), one(0170770), "QdDs", m68000up }, -{"rolw", one(0160570), one(0170770), "DdDs", m68000up }, -{"rolw", one(0163700), one(0177700), "~s", m68000up }, -{"roll", one(0160630), one(0170770), "QdDs", m68000up }, -{"roll", one(0160670), one(0170770), "DdDs", m68000up }, - -{"rorb", one(0160030), one(0170770), "QdDs", m68000up }, -{"rorb", one(0160070), one(0170770), "DdDs", m68000up }, -{"rorw", one(0160130), one(0170770), "QdDs", m68000up }, -{"rorw", one(0160170), one(0170770), "DdDs", m68000up }, -{"rorw", one(0163300), one(0177700), "~s", m68000up }, -{"rorl", one(0160230), one(0170770), "QdDs", m68000up }, -{"rorl", one(0160270), one(0170770), "DdDs", m68000up }, - -{"roxlb", one(0160420), one(0170770), "QdDs", m68000up }, -{"roxlb", one(0160460), one(0170770), "DdDs", m68000up }, -{"roxlw", one(0160520), one(0170770), "QdDs", m68000up }, -{"roxlw", one(0160560), one(0170770), "DdDs", m68000up }, -{"roxlw", one(0162700), one(0177700), "~s", m68000up }, -{"roxll", one(0160620), one(0170770), "QdDs", m68000up }, -{"roxll", one(0160660), one(0170770), "DdDs", m68000up }, - -{"roxrb", one(0160020), one(0170770), "QdDs", m68000up }, -{"roxrb", one(0160060), one(0170770), "DdDs", m68000up }, -{"roxrw", one(0160120), one(0170770), "QdDs", m68000up }, -{"roxrw", one(0160160), one(0170770), "DdDs", m68000up }, -{"roxrw", one(0162300), one(0177700), "~s", m68000up }, -{"roxrl", one(0160220), one(0170770), "QdDs", m68000up }, -{"roxrl", one(0160260), one(0170770), "DdDs", m68000up }, - -{"rtd", one(0047164), one(0177777), "#w", m68010up }, - -{"rte", one(0047163), one(0177777), "", m68000up | mcf }, - -{"rtm", one(0003300), one(0177760), "Rs", m68020 }, - -{"rtr", one(0047167), one(0177777), "", m68000up }, - -{"rts", one(0047165), one(0177777), "", m68000up | mcf }, - -{"satsl", one(0046200), one(0177770), "Ds", mcfv4up }, - -{"sbcd", one(0100400), one(0170770), "DsDd", m68000up }, -{"sbcd", one(0100410), one(0170770), "-s-d", m68000up }, - -{"scc", one(0052300), one(0177700), "$s", m68000up }, -{"scc", one(0052300), one(0177700), "Ds", mcf }, -{"scs", one(0052700), one(0177700), "$s", m68000up }, -{"scs", one(0052700), one(0177700), "Ds", mcf }, -{"seq", one(0053700), one(0177700), "$s", m68000up }, -{"seq", one(0053700), one(0177700), "Ds", mcf }, -{"sf", one(0050700), one(0177700), "$s", m68000up }, -{"sf", one(0050700), one(0177700), "Ds", mcf }, -{"sge", one(0056300), one(0177700), "$s", m68000up }, -{"sge", one(0056300), one(0177700), "Ds", mcf }, -{"sgt", one(0057300), one(0177700), "$s", m68000up }, -{"sgt", one(0057300), one(0177700), "Ds", mcf }, -{"shi", one(0051300), one(0177700), "$s", m68000up }, -{"shi", one(0051300), one(0177700), "Ds", mcf }, -{"sle", one(0057700), one(0177700), "$s", m68000up }, -{"sle", one(0057700), one(0177700), "Ds", mcf }, -{"sls", one(0051700), one(0177700), "$s", m68000up }, -{"sls", one(0051700), one(0177700), "Ds", mcf }, -{"slt", one(0056700), one(0177700), "$s", m68000up }, -{"slt", one(0056700), one(0177700), "Ds", mcf }, -{"smi", one(0055700), one(0177700), "$s", m68000up }, -{"smi", one(0055700), one(0177700), "Ds", mcf }, -{"sne", one(0053300), one(0177700), "$s", m68000up }, -{"sne", one(0053300), one(0177700), "Ds", mcf }, -{"spl", one(0055300), one(0177700), "$s", m68000up }, -{"spl", one(0055300), one(0177700), "Ds", mcf }, -{"st", one(0050300), one(0177700), "$s", m68000up }, -{"st", one(0050300), one(0177700), "Ds", mcf }, -{"svc", one(0054300), one(0177700), "$s", m68000up }, -{"svc", one(0054300), one(0177700), "Ds", mcf }, -{"svs", one(0054700), one(0177700), "$s", m68000up }, -{"svs", one(0054700), one(0177700), "Ds", mcf }, - -{"stop", one(0047162), one(0177777), "#w", m68000up | mcf }, - -{"strldsr", two(0040347,0043374), two(0177777,0177777), "#w", mcf528x}, - -{"subal", one(0110700), one(0170700), "*lAd", m68000up | mcf }, -{"subaw", one(0110300), one(0170700), "*wAd", m68000up }, - -{"subib", one(0002000), one(0177700), "#b$s", m68000up }, -{"subiw", one(0002100), one(0177700), "#w$s", m68000up }, -{"subil", one(0002200), one(0177700), "#l$s", m68000up }, -{"subil", one(0002200), one(0177700), "#lDs", mcf }, - -{"subqb", one(0050400), one(0170700), "Qd%s", m68000up }, -{"subqw", one(0050500), one(0170700), "Qd%s", m68000up }, -{"subql", one(0050600), one(0170700), "Qd%s", m68000up | mcf }, +{"remsl", 4, two(0x4c40, 0x0800), two(0xffc0, 0x8ff8), "qsD3D1", mcfhwdiv }, +{"remul", 4, two(0x4c40, 0x0000), two(0xffc0, 0x8ff8), "qsD3D1", mcfhwdiv }, + +{"reset", 2, one(0047160), one(0177777), "", m68000up }, + +{"rolb", 2, one(0160430), one(0170770), "QdDs", m68000up }, +{"rolb", 2, one(0160470), one(0170770), "DdDs", m68000up }, +{"rolw", 2, one(0160530), one(0170770), "QdDs", m68000up }, +{"rolw", 2, one(0160570), one(0170770), "DdDs", m68000up }, +{"rolw", 2, one(0163700), one(0177700), "~s", m68000up }, +{"roll", 2, one(0160630), one(0170770), "QdDs", m68000up }, +{"roll", 2, one(0160670), one(0170770), "DdDs", m68000up }, + +{"rorb", 2, one(0160030), one(0170770), "QdDs", m68000up }, +{"rorb", 2, one(0160070), one(0170770), "DdDs", m68000up }, +{"rorw", 2, one(0160130), one(0170770), "QdDs", m68000up }, +{"rorw", 2, one(0160170), one(0170770), "DdDs", m68000up }, +{"rorw", 2, one(0163300), one(0177700), "~s", m68000up }, +{"rorl", 2, one(0160230), one(0170770), "QdDs", m68000up }, +{"rorl", 2, one(0160270), one(0170770), "DdDs", m68000up }, + +{"roxlb", 2, one(0160420), one(0170770), "QdDs", m68000up }, +{"roxlb", 2, one(0160460), one(0170770), "DdDs", m68000up }, +{"roxlw", 2, one(0160520), one(0170770), "QdDs", m68000up }, +{"roxlw", 2, one(0160560), one(0170770), "DdDs", m68000up }, +{"roxlw", 2, one(0162700), one(0177700), "~s", m68000up }, +{"roxll", 2, one(0160620), one(0170770), "QdDs", m68000up }, +{"roxll", 2, one(0160660), one(0170770), "DdDs", m68000up }, + +{"roxrb", 2, one(0160020), one(0170770), "QdDs", m68000up }, +{"roxrb", 2, one(0160060), one(0170770), "DdDs", m68000up }, +{"roxrw", 2, one(0160120), one(0170770), "QdDs", m68000up }, +{"roxrw", 2, one(0160160), one(0170770), "DdDs", m68000up }, +{"roxrw", 2, one(0162300), one(0177700), "~s", m68000up }, +{"roxrl", 2, one(0160220), one(0170770), "QdDs", m68000up }, +{"roxrl", 2, one(0160260), one(0170770), "DdDs", m68000up }, + +{"rtd", 4, one(0047164), one(0177777), "#w", m68010up }, + +{"rte", 2, one(0047163), one(0177777), "", m68000up | mcfisa_a }, + +{"rtm", 2, one(0003300), one(0177760), "Rs", m68020 }, + +{"rtr", 2, one(0047167), one(0177777), "", m68000up }, + +{"rts", 2, one(0047165), one(0177777), "", m68000up | mcfisa_a }, + +{"satsl", 2, one(0046200), one(0177770), "Ds", mcfisa_b }, + +{"sbcd", 2, one(0100400), one(0170770), "DsDd", m68000up }, +{"sbcd", 2, one(0100410), one(0170770), "-s-d", m68000up }, + +{"scc", 2, one(0052300), one(0177700), "$s", m68000up }, +{"scc", 2, one(0052300), one(0177700), "Ds", mcfisa_a }, +{"scs", 2, one(0052700), one(0177700), "$s", m68000up }, +{"scs", 2, one(0052700), one(0177700), "Ds", mcfisa_a }, +{"seq", 2, one(0053700), one(0177700), "$s", m68000up }, +{"seq", 2, one(0053700), one(0177700), "Ds", mcfisa_a }, +{"sf", 2, one(0050700), one(0177700), "$s", m68000up }, +{"sf", 2, one(0050700), one(0177700), "Ds", mcfisa_a }, +{"sge", 2, one(0056300), one(0177700), "$s", m68000up }, +{"sge", 2, one(0056300), one(0177700), "Ds", mcfisa_a }, +{"sgt", 2, one(0057300), one(0177700), "$s", m68000up }, +{"sgt", 2, one(0057300), one(0177700), "Ds", mcfisa_a }, +{"shi", 2, one(0051300), one(0177700), "$s", m68000up }, +{"shi", 2, one(0051300), one(0177700), "Ds", mcfisa_a }, +{"sle", 2, one(0057700), one(0177700), "$s", m68000up }, +{"sle", 2, one(0057700), one(0177700), "Ds", mcfisa_a }, +{"sls", 2, one(0051700), one(0177700), "$s", m68000up }, +{"sls", 2, one(0051700), one(0177700), "Ds", mcfisa_a }, +{"slt", 2, one(0056700), one(0177700), "$s", m68000up }, +{"slt", 2, one(0056700), one(0177700), "Ds", mcfisa_a }, +{"smi", 2, one(0055700), one(0177700), "$s", m68000up }, +{"smi", 2, one(0055700), one(0177700), "Ds", mcfisa_a }, +{"sne", 2, one(0053300), one(0177700), "$s", m68000up }, +{"sne", 2, one(0053300), one(0177700), "Ds", mcfisa_a }, +{"spl", 2, one(0055300), one(0177700), "$s", m68000up }, +{"spl", 2, one(0055300), one(0177700), "Ds", mcfisa_a }, +{"st", 2, one(0050300), one(0177700), "$s", m68000up }, +{"st", 2, one(0050300), one(0177700), "Ds", mcfisa_a }, +{"svc", 2, one(0054300), one(0177700), "$s", m68000up }, +{"svc", 2, one(0054300), one(0177700), "Ds", mcfisa_a }, +{"svs", 2, one(0054700), one(0177700), "$s", m68000up }, +{"svs", 2, one(0054700), one(0177700), "Ds", mcfisa_a }, + +{"stop", 4, one(0047162), one(0177777), "#w", m68000up | mcfisa_a }, + +{"strldsr", 4, two(0040347,0043374), two(0177777,0177777), "#w", mcfisa_aa}, + +{"subal", 2, one(0110700), one(0170700), "*lAd", m68000up | mcfisa_a }, +{"subaw", 2, one(0110300), one(0170700), "*wAd", m68000up }, + +{"subib", 4, one(0002000), one(0177700), "#b$s", m68000up }, +{"subiw", 4, one(0002100), one(0177700), "#w$s", m68000up }, +{"subil", 6, one(0002200), one(0177700), "#l$s", m68000up }, +{"subil", 6, one(0002200), one(0177700), "#lDs", mcfisa_a }, + +{"subqb", 2, one(0050400), one(0170700), "Qd%s", m68000up }, +{"subqw", 2, one(0050500), one(0170700), "Qd%s", m68000up }, +{"subql", 2, one(0050600), one(0170700), "Qd%s", m68000up | mcfisa_a }, /* The sub opcode can generate the suba, subi, and subq instructions. */ -{"subb", one(0050400), one(0170700), "Qd%s", m68000up }, -{"subb", one(0002000), one(0177700), "#b$s", m68000up }, -{"subb", one(0110000), one(0170700), ";bDd", m68000up }, -{"subb", one(0110400), one(0170700), "Dd~s", m68000up }, -{"subw", one(0050500), one(0170700), "Qd%s", m68000up }, -{"subw", one(0002100), one(0177700), "#w$s", m68000up }, -{"subw", one(0110300), one(0170700), "*wAd", m68000up }, -{"subw", one(0110100), one(0170700), "*wDd", m68000up }, -{"subw", one(0110500), one(0170700), "Dd~s", m68000up }, -{"subl", one(0050600), one(0170700), "Qd%s", m68000up | mcf }, -{"subl", one(0002200), one(0177700), "#l$s", m68000up }, -{"subl", one(0002200), one(0177700), "#lDs", mcf }, -{"subl", one(0110700), one(0170700), "*lAd", m68000up | mcf }, -{"subl", one(0110200), one(0170700), "*lDd", m68000up | mcf }, -{"subl", one(0110600), one(0170700), "Dd~s", m68000up | mcf }, - -{"subxb", one(0110400), one(0170770), "DsDd", m68000up }, -{"subxb", one(0110410), one(0170770), "-s-d", m68000up }, -{"subxw", one(0110500), one(0170770), "DsDd", m68000up }, -{"subxw", one(0110510), one(0170770), "-s-d", m68000up }, -{"subxl", one(0110600), one(0170770), "DsDd", m68000up | mcf }, -{"subxl", one(0110610), one(0170770), "-s-d", m68000up }, - -{"swap", one(0044100), one(0177770), "Ds", m68000up | mcf }, +{"subb", 2, one(0050400), one(0170700), "Qd%s", m68000up }, +{"subb", 4, one(0002000), one(0177700), "#b$s", m68000up }, +{"subb", 2, one(0110000), one(0170700), ";bDd", m68000up }, +{"subb", 2, one(0110400), one(0170700), "Dd~s", m68000up }, +{"subw", 2, one(0050500), one(0170700), "Qd%s", m68000up }, +{"subw", 4, one(0002100), one(0177700), "#w$s", m68000up }, +{"subw", 2, one(0110300), one(0170700), "*wAd", m68000up }, +{"subw", 2, one(0110100), one(0170700), "*wDd", m68000up }, +{"subw", 2, one(0110500), one(0170700), "Dd~s", m68000up }, +{"subl", 2, one(0050600), one(0170700), "Qd%s", m68000up | mcfisa_a }, +{"subl", 6, one(0002200), one(0177700), "#l$s", m68000up }, +{"subl", 6, one(0002200), one(0177700), "#lDs", mcfisa_a }, +{"subl", 2, one(0110700), one(0170700), "*lAd", m68000up | mcfisa_a }, +{"subl", 2, one(0110200), one(0170700), "*lDd", m68000up | mcfisa_a }, +{"subl", 2, one(0110600), one(0170700), "Dd~s", m68000up | mcfisa_a }, + +{"subxb", 2, one(0110400), one(0170770), "DsDd", m68000up }, +{"subxb", 2, one(0110410), one(0170770), "-s-d", m68000up }, +{"subxw", 2, one(0110500), one(0170770), "DsDd", m68000up }, +{"subxw", 2, one(0110510), one(0170770), "-s-d", m68000up }, +{"subxl", 2, one(0110600), one(0170770), "DsDd", m68000up | mcfisa_a }, +{"subxl", 2, one(0110610), one(0170770), "-s-d", m68000up }, + +{"swap", 2, one(0044100), one(0177770), "Ds", m68000up | mcfisa_a }, /* swbeg and swbegl are magic constants used on sysV68. The compiler generates them before a switch table. They tell the debugger and @@ -2084,96 +2078,96 @@ const struct m68k_opcode m68k_opcodes[] = number of elements in the table. swbeg means that the entries in the table are word (2 byte) sized, and swbegl means that the entries in the table are longword (4 byte) sized. */ -{"swbeg", one(0045374), one(0177777), "#w", m68000up | mcf }, -{"swbegl", one(0045375), one(0177777), "#l", m68000up | mcf }, +{"swbeg", 4, one(0045374), one(0177777), "#w", m68000up | mcfisa_a }, +{"swbegl", 6, one(0045375), one(0177777), "#l", m68000up | mcfisa_a }, -{"tas", one(0045300), one(0177700), "$s", m68000up | mcfv4up}, +{"tas", 2, one(0045300), one(0177700), "$s", m68000up | mcfisa_b}, -#define TBL1(name,signed,round,size) \ - {name, two(0174000, (signed<<11)|(!round<<10)|(size<<6)|0000400), \ +#define TBL1(name,insn_size,signed,round,size) \ + {name, insn_size, two(0174000, (signed<<11)|(!round<<10)|(size<<6)|0000400), \ two(0177700,0107777), "!sD1", cpu32 }, \ - {name, two(0174000, (signed<<11)|(!round<<10)|(size<<6)), \ + {name, insn_size, two(0174000, (signed<<11)|(!round<<10)|(size<<6)), \ two(0177770,0107770), "DsD3D1", cpu32 } #define TBL(name1, name2, name3, s, r) \ - TBL1(name1, s, r, 0), TBL1(name2, s, r, 1), TBL1(name3, s, r, 2) -TBL("tblsb", "tblsw", "tblsl", 1, 1), -TBL("tblsnb", "tblsnw", "tblsnl", 1, 0), + TBL1(name1, 4, s, r, 0), TBL1(name2, 4, s, r, 1), TBL1(name3, 4, s, r, 2) +TBL("tblsb", "tblsw", "tblsl", 2, 1), +TBL("tblsnb", "tblsnw", "tblsnl", 2, 0), TBL("tblub", "tbluw", "tblul", 0, 1), TBL("tblunb", "tblunw", "tblunl", 0, 0), -{"trap", one(0047100), one(0177760), "Ts", m68000up | mcf }, - -{"trapcc", one(0052374), one(0177777), "", m68020up | cpu32 }, -{"trapcs", one(0052774), one(0177777), "", m68020up | cpu32 }, -{"trapeq", one(0053774), one(0177777), "", m68020up | cpu32 }, -{"trapf", one(0050774), one(0177777), "", m68020up | cpu32 | mcf }, -{"trapge", one(0056374), one(0177777), "", m68020up | cpu32 }, -{"trapgt", one(0057374), one(0177777), "", m68020up | cpu32 }, -{"traphi", one(0051374), one(0177777), "", m68020up | cpu32 }, -{"traple", one(0057774), one(0177777), "", m68020up | cpu32 }, -{"trapls", one(0051774), one(0177777), "", m68020up | cpu32 }, -{"traplt", one(0056774), one(0177777), "", m68020up | cpu32 }, -{"trapmi", one(0055774), one(0177777), "", m68020up | cpu32 }, -{"trapne", one(0053374), one(0177777), "", m68020up | cpu32 }, -{"trappl", one(0055374), one(0177777), "", m68020up | cpu32 }, -{"trapt", one(0050374), one(0177777), "", m68020up | cpu32 }, -{"trapvc", one(0054374), one(0177777), "", m68020up | cpu32 }, -{"trapvs", one(0054774), one(0177777), "", m68020up | cpu32 }, - -{"trapccw", one(0052372), one(0177777), "#w", m68020up|cpu32 }, -{"trapcsw", one(0052772), one(0177777), "#w", m68020up|cpu32 }, -{"trapeqw", one(0053772), one(0177777), "#w", m68020up|cpu32 }, -{"trapfw", one(0050772), one(0177777), "#w", m68020up|cpu32|mcf}, -{"trapgew", one(0056372), one(0177777), "#w", m68020up|cpu32 }, -{"trapgtw", one(0057372), one(0177777), "#w", m68020up|cpu32 }, -{"traphiw", one(0051372), one(0177777), "#w", m68020up|cpu32 }, -{"traplew", one(0057772), one(0177777), "#w", m68020up|cpu32 }, -{"traplsw", one(0051772), one(0177777), "#w", m68020up|cpu32 }, -{"trapltw", one(0056772), one(0177777), "#w", m68020up|cpu32 }, -{"trapmiw", one(0055772), one(0177777), "#w", m68020up|cpu32 }, -{"trapnew", one(0053372), one(0177777), "#w", m68020up|cpu32 }, -{"trapplw", one(0055372), one(0177777), "#w", m68020up|cpu32 }, -{"traptw", one(0050372), one(0177777), "#w", m68020up|cpu32 }, -{"trapvcw", one(0054372), one(0177777), "#w", m68020up|cpu32 }, -{"trapvsw", one(0054772), one(0177777), "#w", m68020up|cpu32 }, - -{"trapccl", one(0052373), one(0177777), "#l", m68020up|cpu32 }, -{"trapcsl", one(0052773), one(0177777), "#l", m68020up|cpu32 }, -{"trapeql", one(0053773), one(0177777), "#l", m68020up|cpu32 }, -{"trapfl", one(0050773), one(0177777), "#l", m68020up|cpu32|mcf}, -{"trapgel", one(0056373), one(0177777), "#l", m68020up|cpu32 }, -{"trapgtl", one(0057373), one(0177777), "#l", m68020up|cpu32 }, -{"traphil", one(0051373), one(0177777), "#l", m68020up|cpu32 }, -{"traplel", one(0057773), one(0177777), "#l", m68020up|cpu32 }, -{"traplsl", one(0051773), one(0177777), "#l", m68020up|cpu32 }, -{"trapltl", one(0056773), one(0177777), "#l", m68020up|cpu32 }, -{"trapmil", one(0055773), one(0177777), "#l", m68020up|cpu32 }, -{"trapnel", one(0053373), one(0177777), "#l", m68020up|cpu32 }, -{"trappll", one(0055373), one(0177777), "#l", m68020up|cpu32 }, -{"traptl", one(0050373), one(0177777), "#l", m68020up|cpu32 }, -{"trapvcl", one(0054373), one(0177777), "#l", m68020up|cpu32 }, -{"trapvsl", one(0054773), one(0177777), "#l", m68020up|cpu32 }, - -{"trapv", one(0047166), one(0177777), "", m68000up }, - -{"tstb", one(0045000), one(0177700), ";b", m68020up|cpu32|mcf }, -{"tstb", one(0045000), one(0177700), "$b", m68000up }, -{"tstw", one(0045100), one(0177700), "*w", m68020up|cpu32|mcf }, -{"tstw", one(0045100), one(0177700), "$w", m68000up }, -{"tstl", one(0045200), one(0177700), "*l", m68020up|cpu32|mcf }, -{"tstl", one(0045200), one(0177700), "$l", m68000up }, - -{"unlk", one(0047130), one(0177770), "As", m68000up | mcf }, - -{"unpk", one(0100600), one(0170770), "DsDd#w", m68020up }, -{"unpk", one(0100610), one(0170770), "-s-d#w", m68020up }, - -{"wddatab", one(0175400), one(0177700), "~s", mcf }, -{"wddataw", one(0175500), one(0177700), "~s", mcf }, -{"wddatal", one(0175600), one(0177700), "~s", mcf }, - -{"wdebug", two(0175720, 03), two(0177770, 0xffff), "as", mcf }, -{"wdebug", two(0175750, 03), two(0177770, 0xffff), "ds", mcf }, +{"trap", 2, one(0047100), one(0177760), "Ts", m68000up | mcfisa_a }, + +{"trapcc", 2, one(0052374), one(0177777), "", m68020up | cpu32 }, +{"trapcs", 2, one(0052774), one(0177777), "", m68020up | cpu32 }, +{"trapeq", 2, one(0053774), one(0177777), "", m68020up | cpu32 }, +{"trapf", 2, one(0050774), one(0177777), "", m68020up | cpu32 | mcfisa_a }, +{"trapge", 2, one(0056374), one(0177777), "", m68020up | cpu32 }, +{"trapgt", 2, one(0057374), one(0177777), "", m68020up | cpu32 }, +{"traphi", 2, one(0051374), one(0177777), "", m68020up | cpu32 }, +{"traple", 2, one(0057774), one(0177777), "", m68020up | cpu32 }, +{"trapls", 2, one(0051774), one(0177777), "", m68020up | cpu32 }, +{"traplt", 2, one(0056774), one(0177777), "", m68020up | cpu32 }, +{"trapmi", 2, one(0055774), one(0177777), "", m68020up | cpu32 }, +{"trapne", 2, one(0053374), one(0177777), "", m68020up | cpu32 }, +{"trappl", 2, one(0055374), one(0177777), "", m68020up | cpu32 }, +{"trapt", 2, one(0050374), one(0177777), "", m68020up | cpu32 }, +{"trapvc", 2, one(0054374), one(0177777), "", m68020up | cpu32 }, +{"trapvs", 2, one(0054774), one(0177777), "", m68020up | cpu32 }, + +{"trapccw", 4, one(0052372), one(0177777), "#w", m68020up|cpu32 }, +{"trapcsw", 4, one(0052772), one(0177777), "#w", m68020up|cpu32 }, +{"trapeqw", 4, one(0053772), one(0177777), "#w", m68020up|cpu32 }, +{"trapfw", 4, one(0050772), one(0177777), "#w", m68020up|cpu32|mcfisa_a}, +{"trapgew", 4, one(0056372), one(0177777), "#w", m68020up|cpu32 }, +{"trapgtw", 4, one(0057372), one(0177777), "#w", m68020up|cpu32 }, +{"traphiw", 4, one(0051372), one(0177777), "#w", m68020up|cpu32 }, +{"traplew", 4, one(0057772), one(0177777), "#w", m68020up|cpu32 }, +{"traplsw", 4, one(0051772), one(0177777), "#w", m68020up|cpu32 }, +{"trapltw", 4, one(0056772), one(0177777), "#w", m68020up|cpu32 }, +{"trapmiw", 4, one(0055772), one(0177777), "#w", m68020up|cpu32 }, +{"trapnew", 4, one(0053372), one(0177777), "#w", m68020up|cpu32 }, +{"trapplw", 4, one(0055372), one(0177777), "#w", m68020up|cpu32 }, +{"traptw", 4, one(0050372), one(0177777), "#w", m68020up|cpu32 }, +{"trapvcw", 4, one(0054372), one(0177777), "#w", m68020up|cpu32 }, +{"trapvsw", 4, one(0054772), one(0177777), "#w", m68020up|cpu32 }, + +{"trapccl", 6, one(0052373), one(0177777), "#l", m68020up|cpu32 }, +{"trapcsl", 6, one(0052773), one(0177777), "#l", m68020up|cpu32 }, +{"trapeql", 6, one(0053773), one(0177777), "#l", m68020up|cpu32 }, +{"trapfl", 6, one(0050773), one(0177777), "#l", m68020up|cpu32|mcfisa_a}, +{"trapgel", 6, one(0056373), one(0177777), "#l", m68020up|cpu32 }, +{"trapgtl", 6, one(0057373), one(0177777), "#l", m68020up|cpu32 }, +{"traphil", 6, one(0051373), one(0177777), "#l", m68020up|cpu32 }, +{"traplel", 6, one(0057773), one(0177777), "#l", m68020up|cpu32 }, +{"traplsl", 6, one(0051773), one(0177777), "#l", m68020up|cpu32 }, +{"trapltl", 6, one(0056773), one(0177777), "#l", m68020up|cpu32 }, +{"trapmil", 6, one(0055773), one(0177777), "#l", m68020up|cpu32 }, +{"trapnel", 6, one(0053373), one(0177777), "#l", m68020up|cpu32 }, +{"trappll", 6, one(0055373), one(0177777), "#l", m68020up|cpu32 }, +{"traptl", 6, one(0050373), one(0177777), "#l", m68020up|cpu32 }, +{"trapvcl", 6, one(0054373), one(0177777), "#l", m68020up|cpu32 }, +{"trapvsl", 6, one(0054773), one(0177777), "#l", m68020up|cpu32 }, + +{"trapv", 2, one(0047166), one(0177777), "", m68000up }, + +{"tstb", 2, one(0045000), one(0177700), ";b", m68020up|cpu32|mcfisa_a }, +{"tstb", 2, one(0045000), one(0177700), "$b", m68000up }, +{"tstw", 2, one(0045100), one(0177700), "*w", m68020up|cpu32|mcfisa_a }, +{"tstw", 2, one(0045100), one(0177700), "$w", m68000up }, +{"tstl", 2, one(0045200), one(0177700), "*l", m68020up|cpu32|mcfisa_a }, +{"tstl", 2, one(0045200), one(0177700), "$l", m68000up }, + +{"unlk", 2, one(0047130), one(0177770), "As", m68000up | mcfisa_a }, + +{"unpk", 4, one(0100600), one(0170770), "DsDd#w", m68020up }, +{"unpk", 4, one(0100610), one(0170770), "-s-d#w", m68020up }, + +{"wddatab", 2, one(0175400), one(0177700), "~s", mcfisa_a }, +{"wddataw", 2, one(0175500), one(0177700), "~s", mcfisa_a }, +{"wddatal", 2, one(0175600), one(0177700), "~s", mcfisa_a }, + +{"wdebug", 4, two(0175720, 03), two(0177770, 0xffff), "as", mcfisa_a }, +{"wdebug", 4, two(0175750, 03), two(0177770, 0xffff), "ds", mcfisa_a }, }; const int m68k_numopcodes = sizeof m68k_opcodes / sizeof m68k_opcodes[0]; @@ -2241,9 +2235,9 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] = { "brb", "bras", }, { "brw", "braw", }, { "brl", "bral", }, - { "jfnlt", "bcc", }, /* apparently a sun alias */ - { "jfngt", "ble", }, /* apparently a sun alias */ - { "jfeq", "beqs", }, /* apparently a sun alias */ + { "jfnlt", "bcc", }, /* Apparently a sun alias. */ + { "jfngt", "ble", }, /* Apparently a sun alias. */ + { "jfeq", "beqs", }, /* Apparently a sun alias. */ { "bchgb", "bchg", }, { "bchgl", "bchg", }, { "bclrb", "bclr", }, @@ -2392,7 +2386,7 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] = { "movsw", "movesw", }, { "mov3q", "mov3ql", }, - { "tdivul", "divul", }, /* for m68k-svr4 */ + { "tdivul", "divul", }, /* For m68k-svr4. */ { "fmovb", "fmoveb", }, { "fsmovb", "fsmoveb", }, { "fdmovb", "fdmoveb", }, @@ -2423,7 +2417,7 @@ const struct m68k_opcode_alias m68k_opcode_aliases[] = { "ftestw", "ftstw", }, { "ftestx", "ftstx", }, - { "bitrevl", "bitrev", }, /* for mcf528x only */ + { "bitrevl", "bitrev", }, { "byterevl", "byterev", }, { "ff1l", "ff1", }, diff --git a/opcodes/mpw-config.in b/opcodes/mpw-config.in deleted file mode 100644 index ff9be9d..0000000 --- a/opcodes/mpw-config.in +++ /dev/null @@ -1,27 +0,0 @@ -# Configuration fragment for opcodes. - -Set target_arch `echo {target_canonical} | sed -e 's/-.*-.*//'` - -Set archname ARCH_{target_arch} - -If "{target_arch}" =~ /m68k/ - Set BFD_MACHINES '"{o}"m68k-dis.c.o "{o}"m68k-opc.c.o' -Else If "{target_arch}" =~ /powerpc/ - Set BFD_MACHINES '"{o}"ppc-dis.c.o "{o}"ppc-opc.c.o' -Else If "{target_arch}" =~ /i386/ - Set BFD_MACHINES '"{o}"i386-dis.c.o' -Else If "{target_arch}" =~ /mips/ - Set BFD_MACHINES '"{o}"mips-dis.c.o "{o}"mips-opc.c.o' -Else If "{target_arch}" =~ /sh/ - Set BFD_MACHINES '"{o}"sh-dis.c.o' -End If - -Echo '# Start from mpw-config.in' > "{o}"mk.tmp -Echo "BFD_MACHINES = " {BFD_MACHINES} >> "{o}"mk.tmp -Echo "ARCHDEFS = -d" {archname} >> "{o}"mk.tmp -Echo '# End from mpw-config.in' >> "{o}"mk.tmp - -Echo '/* config.h. Generated by mpw-configure. */' > "{o}"config.new -Echo '#include "mpw.h"' >> "{o}"config.new - -MoveIfChange "{o}"config.new "{o}"config.h diff --git a/opcodes/mpw-make.sed b/opcodes/mpw-make.sed deleted file mode 100644 index ee60486..0000000 --- a/opcodes/mpw-make.sed +++ /dev/null @@ -1,25 +0,0 @@ -# Sed commands to finish translating the opcodes Makefile.in into MPW syntax. - -# Empty HDEFINES. -/HDEFINES/s/@HDEFINES@// - -# Fix pathnames to include directories. -/^INCDIR = /s/^INCDIR = .*$/INCDIR = "{topsrcdir}"include/ -/^CSEARCH = /s/$/ -i "{INCDIR}":mpw: -i ::extra-include:/ - -/BFD_MACHINES/s/@BFD_MACHINES@/{BFD_MACHINES}/ -/archdefs/s/@archdefs@/{ARCHDEFS}/ - -# No PIC foolery in this environment. -/@ALLLIBS@/s/@ALLLIBS@/{TARGETLIB}/ -/@PICLIST@/s/@PICLIST@// -/@PICFLAG@/s/@PICFLAG@// -/^{OFILES} \\Option-f stamp-picdir/,/^$/d - -# Remove the pic trickery from the default build rule. -/^\.c\.o \\Option-f /,/End If/c\ -.c.o \\Option-f .c - -# Remove pic trickery from other rules - aimed at the rule -# for disassemble.o in particular. -/-n "{PICFLAG}"/,/End If/d diff --git a/opcodes/po/fr.po b/opcodes/po/fr.po index 7ec06af..ac64522 100644 --- a/opcodes/po/fr.po +++ b/opcodes/po/fr.po @@ -1,17 +1,18 @@ # Messages français pour opcodes. -# Copyright © 1996 Free Software Foundation, Inc. +# Copyright © 2004 Free Software Foundation, Inc. # Michel Robitaille <robitail@IRO.UMontreal.CA>, traducteur depuis/since 1996. # msgid "" msgstr "" "Project-Id-Version: opcodes 2.14rel030712\n" "POT-Creation-Date: 2003-07-11 13:56+0930\n" -"PO-Revision-Date: 2003-08-05 08:00-0500\n" +"PO-Revision-Date: 2004-05-10 08:00-0500\n" "Last-Translator: Michel Robitaille <robitail@IRO.UMontreal.CA>\n" "Language-Team: French <traduc@traduc.org>\n" "MIME-Version: 1.0\n" "Content-Type: text/plain; charset=ISO-8859-1\n" "Content-Transfer-Encoding: 8bit\n" +"Plural-Forms: nplurals=2; plural=(n > 1);\n" #: alpha-opc.c:335 msgid "branch operand unaligned" diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 36fe454..9936f3e 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -194,8 +194,11 @@ const struct powerpc_operand powerpc_operands[] = #define BOE BO + 1 { 5, 21, insert_boe, extract_boe, 0 }, +#define BH BOE + 1 + { 2, 11, 0, 0, PPC_OPERAND_OPTIONAL }, + /* The BT field in an X or XL form instruction. */ -#define BT BOE + 1 +#define BT BH + 1 { 5, 21, 0, 0, PPC_OPERAND_CR }, /* The condition register number portion of the BI field in a B form @@ -995,17 +998,33 @@ insert_fxm (unsigned long insn, int dialect, const char **errmsg) { + /* If we're handling the mfocrf and mtocrf insns ensure that exactly + one bit of the mask field is set. */ + if ((insn & (1 << 20)) != 0) + { + if (value == 0 || (value & -value) != value) + { + *errmsg = _("invalid mask field"); + value = 0; + } + } + /* If the optional field on mfcr is missing that means we want to use the old form of the instruction that moves the whole cr. In that case we'll have VALUE zero. There doesn't seem to be a way to distinguish this from the case where someone writes mfcr %r3,0. */ - if (value == 0) + else if (value == 0) ; /* If only one bit of the FXM field is set, we can use the new form of the instruction, which is faster. Unlike the Power4 branch hint - encoding, this is not backward compatible. */ - else if ((dialect & PPC_OPCODE_POWER4) != 0 && (value & -value) == value) + encoding, this is not backward compatible. Do not generate the + new form unless -mpower4 has been given, or -many and the two + operand form of mfcr was used. */ + else if ((value & -value) == value + && ((dialect & PPC_OPCODE_POWER4) != 0 + || ((dialect & PPC_OPCODE_ANY) != 0 + && (insn & (0x3ff << 1)) == 19 << 1))) insn |= 1 << 20; /* Any other value on mfcr is an error. */ @@ -1020,7 +1039,7 @@ insert_fxm (unsigned long insn, static long extract_fxm (unsigned long insn, - int dialect, + int dialect ATTRIBUTE_UNUSED, int *invalid) { long mask = (insn >> 12) & 0xff; @@ -1028,14 +1047,9 @@ extract_fxm (unsigned long insn, /* Is this a Power4 insn? */ if ((insn & (1 << 20)) != 0) { - if ((dialect & PPC_OPCODE_POWER4) == 0) + /* Exactly one bit of MASK should be set. */ + if (mask == 0 || (mask & -mask) != mask) *invalid = 1; - else - { - /* Exactly one bit of MASK should be set. */ - if (mask == 0 || (mask & -mask) != mask) - *invalid = 1; - } } /* Check that non-power4 form of mfcr has a zero MASK. */ @@ -1585,8 +1599,8 @@ extract_tbr (unsigned long insn, /* An XRTRA_MASK, but with L bit clear. */ #define XRTLRA_MASK (XRTRA_MASK & ~((unsigned long) 1 << 21)) -/* An X form comparison instruction. */ -#define XCMPL(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 1) << 21)) +/* An X form instruction with the L bit specified. */ +#define XOPL(op, xop, l) (X ((op), (xop)) | ((((unsigned long)(l)) & 1) << 21)) /* The mask for an X form comparison instruction. */ #define XCMP_MASK (X_MASK | (((unsigned long)1) << 22)) @@ -1651,6 +1665,9 @@ extract_tbr (unsigned long insn, #define XLYBB_MASK (XLYLK_MASK | BB_MASK) #define XLBOCBBB_MASK (XLOCB_MASK | BB_MASK) +/* A mask for branch instructions using the BH field. */ +#define XLBH_MASK (XL_MASK | (0x1c << 11)) + /* An XL_MASK with the BO and BB fields fixed. */ #define XLBOBB_MASK (XL_MASK | BO_MASK | BB_MASK) @@ -1670,11 +1687,12 @@ extract_tbr (unsigned long insn, #define XS_MASK XS (0x3f, 0x1ff, 1) /* A mask for the FXM version of an XFX form instruction. */ -#define XFXFXM_MASK (X_MASK | (1 << 11)) +#define XFXFXM_MASK (X_MASK | (1 << 11) | (1 << 20)) /* An XFX form instruction with the FXM field filled in. */ -#define XFXM(op, xop, fxm) \ - (X ((op), (xop)) | ((((unsigned long)(fxm)) & 0xff) << 12)) +#define XFXM(op, xop, fxm, p4) \ + (X ((op), (xop)) | ((((unsigned long)(fxm)) & 0xff) << 12) \ + | ((unsigned long)(p4) << 20)) /* An XFX form instruction with the SPR field filled in. */ #define XSPR(op, xop, spr) \ @@ -1764,7 +1782,7 @@ extract_tbr (unsigned long insn, #define PPC440 PPC_OPCODE_440 #define PPC750 PPC #define PPC860 PPC -#define PPCVEC PPC_OPCODE_ALTIVEC | PPC_OPCODE_PPC +#define PPCVEC PPC_OPCODE_ALTIVEC #define POWER PPC_OPCODE_POWER #define POWER2 PPC_OPCODE_POWER | PPC_OPCODE_POWER2 #define PPCPWR2 PPC_OPCODE_PPC | PPC_OPCODE_POWER | PPC_OPCODE_POWER2 @@ -2878,12 +2896,12 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "bdzflrl", XLO(19,BODZF,16,1), XLBOBB_MASK, PPCCOM, { BI } }, { "bdzflrl-",XLO(19,BODZF,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, { "bdzflrl+",XLO(19,BODZFP,16,1), XLBOBB_MASK, NOPOWER4, { BI } }, -{ "bclr", XLLK(19,16,0), XLYBB_MASK, PPCCOM, { BO, BI } }, -{ "bclrl", XLLK(19,16,1), XLYBB_MASK, PPCCOM, { BO, BI } }, { "bclr+", XLYLK(19,16,1,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, { "bclrl+", XLYLK(19,16,1,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, { "bclr-", XLYLK(19,16,0,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, { "bclrl-", XLYLK(19,16,0,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, +{ "bclr", XLLK(19,16,0), XLBH_MASK, PPCCOM, { BO, BI, BH } }, +{ "bclrl", XLLK(19,16,1), XLBH_MASK, PPCCOM, { BO, BI, BH } }, { "bcr", XLLK(19,16,0), XLBB_MASK, PWRCOM, { BO, BI } }, { "bcrl", XLLK(19,16,1), XLBB_MASK, PWRCOM, { BO, BI } }, { "bclre", XLLK(19,17,0), XLBB_MASK, BOOKE64, { BO, BI } }, @@ -3062,12 +3080,12 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "bfctrl-", XLO(19,BOFM4,528,1), XLBOBB_MASK, POWER4, { BI } }, { "bfctrl+", XLO(19,BOFP,528,1), XLBOBB_MASK, NOPOWER4, { BI } }, { "bfctrl+", XLO(19,BOFP4,528,1), XLBOBB_MASK, POWER4, { BI } }, -{ "bcctr", XLLK(19,528,0), XLYBB_MASK, PPCCOM, { BO, BI } }, { "bcctr-", XLYLK(19,528,0,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, { "bcctr+", XLYLK(19,528,1,0), XLYBB_MASK, PPCCOM, { BOE, BI } }, -{ "bcctrl", XLLK(19,528,1), XLYBB_MASK, PPCCOM, { BO, BI } }, { "bcctrl-", XLYLK(19,528,0,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, { "bcctrl+", XLYLK(19,528,1,1), XLYBB_MASK, PPCCOM, { BOE, BI } }, +{ "bcctr", XLLK(19,528,0), XLBH_MASK, PPCCOM, { BO, BI, BH } }, +{ "bcctrl", XLLK(19,528,1), XLBH_MASK, PPCCOM, { BO, BI, BH } }, { "bcc", XLLK(19,528,0), XLBB_MASK, PWRCOM, { BO, BI } }, { "bccl", XLLK(19,528,1), XLBB_MASK, PWRCOM, { BO, BI } }, { "bcctre", XLLK(19,529,0), XLYBB_MASK, BOOKE64, { BO, BI } }, @@ -3146,8 +3164,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "rldcr", MDS(30,9,0), MDS_MASK, PPC64, { RA, RS, RB, ME6 } }, { "rldcr.", MDS(30,9,1), MDS_MASK, PPC64, { RA, RS, RB, ME6 } }, -{ "cmpw", XCMPL(31,0,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } }, -{ "cmpd", XCMPL(31,0,1), XCMPL_MASK, PPC64, { OBF, RA, RB } }, +{ "cmpw", XOPL(31,0,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } }, +{ "cmpd", XOPL(31,0,1), XCMPL_MASK, PPC64, { OBF, RA, RB } }, { "cmp", X(31,0), XCMP_MASK, PPC, { BF, L, RA, RB } }, { "cmp", X(31,0), XCMPL_MASK, PWRCOM, { BF, RA, RB } }, @@ -3216,6 +3234,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "iseleq", X(31,79), X_MASK, PPCISEL, { RT, RA, RB } }, { "isel", XISEL(31,15), XISEL_MASK, PPCISEL, { RT, RA, RB, CRB } }, +{ "mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM, { RT, FXM } }, { "mfcr", X(31,19), XRARB_MASK, NOPOWER4, { RT } }, { "mfcr", X(31,19), XFXFXM_MASK, POWER4, { RT, FXM4 } }, @@ -3252,8 +3271,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "lwzxe", X(31,31), X_MASK, BOOKE64, { RT, RA0, RB } }, -{ "cmplw", XCMPL(31,32,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } }, -{ "cmpld", XCMPL(31,32,1), XCMPL_MASK, PPC64, { OBF, RA, RB } }, +{ "cmplw", XOPL(31,32,0), XCMPL_MASK, PPCCOM, { OBF, RA, RB } }, +{ "cmpld", XOPL(31,32,1), XCMPL_MASK, PPC64, { OBF, RA, RB } }, { "cmpl", X(31,32), XCMP_MASK, PPC, { BF, L, RA, RB } }, { "cmpl", X(31,32), XCMPL_MASK, PWRCOM, { BF, RA, RB } }, @@ -3371,7 +3390,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "dcbtstlse",X(31,142),X_MASK, PPCCHLK64, { CT, RA, RB }}, -{ "mtcr", XFXM(31,144,0xff), XRARB_MASK, COM, { RS }}, +{ "mtocrf", XFXM(31,144,0,1), XFXFXM_MASK, COM, { FXM, RS } }, +{ "mtcr", XFXM(31,144,0xff,0), XRARB_MASK, COM, { RS }}, { "mtcrf", X(31,144), XFXFXM_MASK, COM, { FXM, RS } }, { "mtmsr", X(31,146), XRARB_MASK, COM, { RS } }, @@ -4303,6 +4323,7 @@ const struct powerpc_opcode powerpc_opcodes[] = { { "tlbli", X(31,1010), XRTRA_MASK, PPC, { RB } }, +{ "dcbzl", XOPL(31,1014,1), XRT_MASK,POWER4, { RA, RB } }, { "dcbz", X(31,1014), XRT_MASK, PPC, { RA, RB } }, { "dclz", X(31,1014), XRT_MASK, PPC, { RA, RB } }, diff --git a/opcodes/s390-opc.txt b/opcodes/s390-opc.txt index be08c82..960a4cc 100644 --- a/opcodes/s390-opc.txt +++ b/opcodes/s390-opc.txt @@ -726,8 +726,8 @@ e3000000001a algf RXY_RRRD "add logical with long offset 64<32" z990 zarch e3000000001b slgf RXY_RRRD "subtract logical with long offset 64<32" z990 zarch e3000000001c msgf RXY_RRRD "multiply single with long offset 64<32" z990 zarch e3000000001d dsgf RXY_RRRD "divide single 64<32" z990 zarch -e3000000001e lrv RXY_RRRD "load reversed 32" z990 zarch -e3000000001f lrvh RXY_RRRD "load reversed 16" z990 zarch +e3000000001e lrv RXY_RRRD "load reversed 32" z990 esa,zarch +e3000000001f lrvh RXY_RRRD "load reversed 16" z990 esa,zarch e30000000020 cg RXY_RRRD "compare with long offset 64" z990 zarch e30000000021 clg RXY_RRRD "compare logical with long offset 64" z990 zarch e30000000024 stg RXY_RRRD "store with long offset 64" z990 zarch @@ -735,7 +735,7 @@ e3000000002e cvdg RXY_RRRD "convert to decimal with long offset 64" z990 zarch e3000000002f strvg RXY_RRRD "store reversed 64" z990 zarch e30000000030 cgf RXY_RRRD "compare with long offset 64<32" z990 zarch e30000000031 clgf RXY_RRRD "compare logical with long offset 64<32" z990 zarch -e3000000003e strv RXY_RRRD "store reversed 32" z990 zarch +e3000000003e strv RXY_RRRD "store reversed 32" z990 esa,zarch e3000000003f strvh RXY_RRRD "store reversed 64" z990 zarch e30000000046 bctg RXY_RRRD "branch on count 64" z990 zarch e30000000080 ng RXY_RRRD "and with long offset 64" z990 zarch @@ -749,10 +749,10 @@ e3000000008e stpq RXY_RRRD "store pair to quadword" z990 zarch e3000000008f lpq RXY_RRRD "load pair from quadword" z990 zarch e30000000090 llgc RXY_RRRD "load logical character" z990 zarch e30000000091 llgh RXY_RRRD "load logical halfword" z990 zarch -e30000000096 ml RXY_RRRD "multiply logical 32" z990 zarch -e30000000097 dl RXY_RRRD "divide logical 32" z990 zarch -e30000000098 alc RXY_RRRD "add logical with carry 32" z990 zarch -e30000000099 slb RXY_RRRD "subtract logical with borrow 32" z990 zarch +e30000000096 ml RXY_RRRD "multiply logical 32" z990 esa,zarch +e30000000097 dl RXY_RRRD "divide logical 32" z990 esa,zarch +e30000000098 alc RXY_RRRD "add logical with carry 32" z990 esa,zarch +e30000000099 slb RXY_RRRD "subtract logical with borrow 32" z990 esa,zarch eb0000000004 lmg RSY_RRRD "load multiple with long offset 64" z990 zarch eb000000000a srag RSY_RRRD "shift right single 64" z990 zarch eb000000000b slag RSY_RRRD "shift left single 64" z990 zarch @@ -760,7 +760,7 @@ eb000000000c srlg RSY_RRRD "shift right single logical 64" z990 zarch eb000000000d sllg RSY_RRRD "shift left single logical 64" z990 zarch eb000000000f tracg RSY_RRRD "trace 64" z990 zarch eb000000001c rllg RSY_RRRD "rotate left single logical 64" z990 zarch -eb000000001d rll RSY_RRRD "rotate left single logical 32" z990 zarch +eb000000001d rll RSY_RRRD "rotate left single logical 32" z990 esa,zarch eb0000000020 clmh RSY_RURD "compare logical characters under mask high with long offset" z990 zarch eb0000000024 stmg RSY_RRRD "store multiple with long offset 64" z990 zarch eb0000000025 stctg RSY_RRRD "store control 64" z990 zarch @@ -772,7 +772,7 @@ eb000000003e cdsg RSY_RRRD "compare double and swap with long offset 64" z990 za eb0000000044 bxhg RSY_RRRD "branch on index high 64" z990 zarch eb0000000045 bxleg RSY_RRRD "branch on index low or equal 64" z990 zarch eb0000000080 icmh RSY_RURD "insert characters under mask high with long offset" z990 zarch -eb000000008e mvclu RSY_RRRD "move long unicode" z990 zarch +eb000000008e mvclu RSY_RRRD "move long unicode" z990 esa,zarch eb000000008f clclu RSY_RRRD "compare logical long unicode with long offset" z990 zarch eb0000000096 lmh RSY_RRRD "load multiple high" z990 zarch # new z990 instructions diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c index 840823e..3ca5130 100644 --- a/opcodes/sh-dis.c +++ b/opcodes/sh-dis.c @@ -402,7 +402,7 @@ print_insn_sh (memaddr, info) int status; bfd_vma relmask = ~(bfd_vma) 0; const sh_opcode_info *op; - int target_arch; + unsigned int target_arch; switch (info->mach) { @@ -415,40 +415,6 @@ print_insn_sh (memaddr, info) && bfd_asymbol_flavour(*info->symbols) == bfd_target_coff_flavour) target_arch = arch_sh4; break; - case bfd_mach_sh2: - target_arch = arch_sh2; - break; - case bfd_mach_sh2e: - target_arch = arch_sh2e; - break; - case bfd_mach_sh_dsp: - target_arch = arch_sh_dsp; - break; - case bfd_mach_sh3: - target_arch = arch_sh3; - break; - case bfd_mach_sh3_dsp: - target_arch = arch_sh3_dsp; - break; - case bfd_mach_sh3e: - target_arch = arch_sh3e; - break; - case bfd_mach_sh4_nofpu: - target_arch = arch_sh4_nofpu; - break; - case bfd_mach_sh4: - target_arch = arch_sh4; - break; - case bfd_mach_sh4a: - case bfd_mach_sh4a_nofpu: - target_arch = arch_sh4a; - break; - case bfd_mach_sh4al_dsp: - target_arch = arch_sh4al_dsp; - break; - case bfd_mach_sh4_nommu_nofpu: - target_arch = arch_sh4_nommu_nofpu; - break; case bfd_mach_sh5: #ifdef INCLUDE_SHMEDIA status = print_insn_sh64 (memaddr, info); @@ -460,7 +426,7 @@ print_insn_sh (memaddr, info) target_arch = arch_sh4; break; default: - abort (); + target_arch = sh_get_arch_from_bfd_mach (info->mach); } status = info->read_memory_func (memaddr, insn, 2, info); @@ -488,7 +454,8 @@ print_insn_sh (memaddr, info) nibs[3] = insn[1] & 0xf; } - if (nibs[0] == 0xf && (nibs[1] & 4) == 0 && target_arch & arch_sh_dsp_up) + if (nibs[0] == 0xf && (nibs[1] & 4) == 0 + && SH_MERGE_ARCH_SET_VALID (target_arch, arch_sh_dsp_up)) { if (nibs[1] & 8) { @@ -524,7 +491,7 @@ print_insn_sh (memaddr, info) int disp_pc; bfd_vma disp_pc_addr = 0; - if ((op->arch & target_arch) == 0) + if (!SH_MERGE_ARCH_SET_VALID (op->arch, target_arch)) goto fail; for (n = 0; n < 4; n++) { @@ -855,7 +822,13 @@ print_insn_sh (memaddr, info) else val = bfd_getb32 (bytes); } - fprintf_fn (stream, "\t! 0x%x", val); + if ((*info->symbol_at_address_func) (val, info)) + { + fprintf_fn (stream, "\t! 0x"); + (*info->print_address_func) (val, info); + } + else + fprintf_fn (stream, "\t! 0x%x", val); } } diff --git a/opcodes/sh-opc.h b/opcodes/sh-opc.h index a1877b3..d590685 100644 --- a/opcodes/sh-opc.h +++ b/opcodes/sh-opc.h @@ -16,6 +16,8 @@ along with this program; if not, write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ +#include "bfd.h" + typedef enum { HEX_0, @@ -176,47 +178,120 @@ typedef enum } sh_dsp_reg_nums; -#define arch_sh1 0x0001 -#define arch_sh2 0x0002 -#define arch_sh3 0x0004 -#define arch_sh3e 0x0008 -#define arch_sh4 0x0010 -#define arch_sh2e 0x0020 -#define arch_sh4a 0x0040 -#define arch_sh_dsp 0x0100 -#define arch_sh3_dsp 0x0200 -#define arch_sh4al_dsp 0x0400 -#define arch_sh4_nofpu 0x1000 -#define arch_sh4a_nofpu 0x2000 -#define arch_sh4_nommu_nofpu 0x4000 /* no mmu nor fpu */ - -#define arch_sh1_up (arch_sh1 | arch_sh2_up) -#define arch_sh2_up (arch_sh2 | arch_sh2e_up | arch_sh3_up | arch_sh_dsp) +#define arch_sh1_base 0x0001 +#define arch_sh2_base 0x0002 +#define arch_sh3_base 0x0004 +#define arch_sh4_base 0x0008 +#define arch_sh4a_base 0x0010 +#define arch_sh_no_mmu 0x04000000 +#define arch_sh_has_mmu 0x08000000 +#define arch_sh_no_co 0x10000000 /* neither FPU nor DSP co-processor */ +#define arch_sh_sp_fpu 0x20000000 /* single precision FPU */ +#define arch_sh_dp_fpu 0x40000000 /* double precision FPU */ +#define arch_sh_has_dsp 0x80000000 + +#define arch_sh_base_mask 0x0000001f +#define arch_sh_mmu_mask 0x0c000000 +#define arch_sh_co_mask 0xf0000000 + +#define arch_sh1 (arch_sh1_base|arch_sh_no_mmu|arch_sh_no_co) +#define arch_sh2 (arch_sh2_base|arch_sh_no_mmu|arch_sh_no_co) +#define arch_sh2e (arch_sh2_base|arch_sh_no_mmu|arch_sh_sp_fpu) +#define arch_sh_dsp (arch_sh2_base|arch_sh_no_mmu|arch_sh_has_dsp) +#define arch_sh3_nommu (arch_sh3_base|arch_sh_no_mmu|arch_sh_no_co) +#define arch_sh3 (arch_sh3_base|arch_sh_has_mmu|arch_sh_no_co) +#define arch_sh3e (arch_sh3_base|arch_sh_has_mmu|arch_sh_sp_fpu) +#define arch_sh3_dsp (arch_sh3_base|arch_sh_has_mmu|arch_sh_has_dsp) +#define arch_sh4 (arch_sh4_base|arch_sh_has_mmu|arch_sh_dp_fpu) +#define arch_sh4a (arch_sh4a_base|arch_sh_has_mmu|arch_sh_dp_fpu) +#define arch_sh4al_dsp (arch_sh4a_base|arch_sh_has_mmu|arch_sh_has_dsp) +#define arch_sh4_nofpu (arch_sh4_base|arch_sh_has_mmu|arch_sh_no_co) +#define arch_sh4a_nofpu (arch_sh4a_base|arch_sh_has_mmu|arch_sh_no_co) +#define arch_sh4_nommu_nofpu (arch_sh4_base|arch_sh_no_mmu|arch_sh_no_co) + +#define SH_MERGE_ARCH_SET(SET1, SET2) ((SET1) & (SET2)) +#define SH_VALID_BASE_ARCH_SET(SET) (((SET) & arch_sh_base_mask) != 0) +#define SH_VALID_MMU_ARCH_SET(SET) (((SET) & arch_sh_mmu_mask) != 0) +#define SH_VALID_CO_ARCH_SET(SET) (((SET) & arch_sh_co_mask) != 0) +#define SH_VALID_ARCH_SET(SET) \ + (SH_VALID_BASE_ARCH_SET (SET) \ + && SH_VALID_MMU_ARCH_SET (SET) \ + && SH_VALID_CO_ARCH_SET (SET)) +#define SH_MERGE_ARCH_SET_VALID(SET1, SET2) \ + SH_VALID_ARCH_SET (SH_MERGE_ARCH_SET (SET1, SET2)) + +#define SH_ARCH_SET_HAS_FPU(SET) \ + (((SET) & (arch_sh_sp_fpu | arch_sh_dp_fpu)) != 0) +#define SH_ARCH_SET_HAS_DSP(SET) \ + (((SET) & arch_sh_has_dsp) != 0) + +/* This is returned from the functions below when an error occurs + (in addition to a call to BFD_FAIL). The value should allow + the tools to continue to function in most cases - there may + be some confusion between DSP and FPU etc. */ +#define SH_ARCH_UNKNOWN_ARCH 0xffffffff + +/* These are defined in bfd/cpu-sh.c . */ +unsigned int sh_get_arch_from_bfd_mach (unsigned long mach); +unsigned int sh_get_arch_up_from_bfd_mach (unsigned long mach); +unsigned long sh_get_bfd_mach_from_arch_set (unsigned int arch_set); +bfd_boolean sh_merge_bfd_arch (bfd *ibfd, bfd *obfd); + +/* Below are the 'architecture sets'. + They describe the following inheritance graph: + + SH1 + | + SH2 + .------------'|`--------------------. + / | \ +SH-DSP SH3-nommu SH2E + | |`--------. | + | | \ | + | SH3 SH4-nommu-nofpu | + | | | | + | .------------'|`----------+---------. | + |/ / \| + | | .-------' | + | |/ | +SH3-dsp SH4-nofpu SH3E + | |`--------------------. | + | | \| + | SH4A-nofpu SH4 + | .------------' `--------------------. | + |/ \| +SH4AL-dsp SH4A + +*/ + +/* Central branches */ +#define arch_sh1_up (arch_sh1 | arch_sh2_up) +#define arch_sh2_up (arch_sh2 | arch_sh2e_up | arch_sh3_nommu_up | arch_sh_dsp_up) +#define arch_sh3_nommu_up (arch_sh3_nommu | arch_sh3_up | arch_sh4_nommu_nofpu_up) +#define arch_sh3_up (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up | arch_sh4_nofp_up) +#define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu | arch_sh4_nofp_up) +#define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up | arch_sh4a_nofp_up) +#define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up | arch_sh4al_dsp_up) + +/* Right branch */ #define arch_sh2e_up (arch_sh2e | arch_sh3e_up) -#define arch_sh3_up (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up \ - | arch_sh4_nommu_nofpu_up) #define arch_sh3e_up (arch_sh3e | arch_sh4_up) #define arch_sh4_up (arch_sh4 | arch_sh4a_up) #define arch_sh4a_up (arch_sh4a) -#define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up) -#define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up) +/* Left branch */ +#define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up) +#define arch_sh3_dsp_up (arch_sh3_dsp | arch_sh4al_dsp_up) #define arch_sh4al_dsp_up (arch_sh4al_dsp) -#define arch_sh4_nommu_nofpu_up (arch_sh4_nommu_nofpu | arch_sh4_nofp_up) - -#define arch_sh4_nofp_up (arch_sh4_nofpu | arch_sh4_up | arch_sh4a_nofp_up) -#define arch_sh4a_nofp_up (arch_sh4a_nofpu | arch_sh4a_up | arch_sh4al_dsp_up) -#define arch_sh_any_with_mmu (arch_sh3 | arch_sh3e_up | arch_sh3_dsp_up \ - | arch_sh4_nofp_up) /* arch _sh3_up omitting arch_sh4_nommu_nofpu */ typedef struct { char *name; sh_arg_type arg[4]; sh_nibble_type nibbles[5]; - int arch; + unsigned int arch; } sh_opcode_info; #ifdef DEFINE_TABLE @@ -313,13 +388,13 @@ const sh_opcode_info sh_table[] = /* 0100nnnn01101110 ldc <REG_N>,RS */{"ldc",{A_REG_N,A_RS},{HEX_4,REG_N,HEX_6,HEX_E}, arch_sh_dsp_up}, -/* 0100nnnn00111110 ldc <REG_N>,SSR */{"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}, arch_sh3_up}, +/* 0100nnnn00111110 ldc <REG_N>,SSR */{"ldc",{A_REG_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_E}, arch_sh3_nommu_up}, -/* 0100nnnn01001110 ldc <REG_N>,SPC */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}, arch_sh3_up}, +/* 0100nnnn01001110 ldc <REG_N>,SPC */{"ldc",{A_REG_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_E}, arch_sh3_nommu_up}, /* 0100nnnn11111010 ldc <REG_N>,DBR */{"ldc",{A_REG_N,A_DBR},{HEX_4,REG_N,HEX_F,HEX_A}, arch_sh4_nommu_nofpu_up}, -/* 0100nnnn1xxx1110 ldc <REG_N>,Rn_BANK */{"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}, arch_sh3_up}, +/* 0100nnnn1xxx1110 ldc <REG_N>,Rn_BANK */{"ldc",{A_REG_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_E}, arch_sh3_nommu_up}, /* 0100nnnn00000111 ldc.l @<REG_N>+,SR */{"ldc.l",{A_INC_N,A_SR},{HEX_4,REG_N,HEX_0,HEX_7}, arch_sh1_up}, @@ -335,13 +410,13 @@ const sh_opcode_info sh_table[] = /* 0100nnnn01100111 ldc.l @<REG_N>+,RS */{"ldc.l",{A_INC_N,A_RS},{HEX_4,REG_N,HEX_6,HEX_7}, arch_sh_dsp_up}, -/* 0100nnnn00110111 ldc.l @<REG_N>+,SSR */{"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}, arch_sh3_up}, +/* 0100nnnn00110111 ldc.l @<REG_N>+,SSR */{"ldc.l",{A_INC_N,A_SSR},{HEX_4,REG_N,HEX_3,HEX_7}, arch_sh3_nommu_up}, -/* 0100nnnn01000111 ldc.l @<REG_N>+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}, arch_sh3_up}, +/* 0100nnnn01000111 ldc.l @<REG_N>+,SPC */{"ldc.l",{A_INC_N,A_SPC},{HEX_4,REG_N,HEX_4,HEX_7}, arch_sh3_nommu_up}, /* 0100nnnn11110110 ldc.l @<REG_N>+,DBR */{"ldc.l",{A_INC_N,A_DBR},{HEX_4,REG_N,HEX_F,HEX_6}, arch_sh4_nommu_nofpu_up}, -/* 0100nnnn1xxx0111 ldc.l <REG_N>,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}, arch_sh3_up}, +/* 0100nnnn1xxx0111 ldc.l <REG_N>,Rn_BANK */{"ldc.l",{A_INC_N,A_REG_B},{HEX_4,REG_N,REG_B,HEX_7}, arch_sh3_nommu_up}, /* 0100mmmm00110100 ldrc <REG_M> */{"ldrc",{A_REG_M},{HEX_4,REG_M,HEX_3,HEX_4}, arch_sh4al_dsp_up}, /* 10001010i8*1.... ldrc #<imm> */{"ldrc",{A_IMM},{HEX_8,HEX_A,IMM0_8}, arch_sh4al_dsp_up}, @@ -394,7 +469,7 @@ const sh_opcode_info sh_table[] = /* 0100nnnn01100110 lds.l @<REG_M>+,FPSCR*/{"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}, arch_sh2e_up}, -/* 0000000000111000 ldtlb */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh_any_with_mmu}, +/* 0000000000111000 ldtlb */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh3_up}, /* 0100nnnnmmmm1111 mac.w @<REG_M>+,@<REG_N>+*/{"mac.w",{A_INC_M,A_INC_N},{HEX_4,REG_N,REG_M,HEX_F}, arch_sh1_up}, @@ -535,9 +610,9 @@ const sh_opcode_info sh_table[] = /* repeat start end #<imm> */{"repeat",{A_DISP_PC,A_DISP_PC,A_IMM},{REPEAT,HEX_2,IMM0_8,HEX_8}, arch_sh_dsp_up}, -/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh3_up}, +/* 0100nnnnmmmm1100 shad <REG_M>,<REG_N>*/{"shad",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_C}, arch_sh3_nommu_up}, -/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh3_up}, +/* 0100nnnnmmmm1101 shld <REG_M>,<REG_N>*/{"shld",{ A_REG_M,A_REG_N},{HEX_4,REG_N,REG_M,HEX_D}, arch_sh3_nommu_up}, /* 0100nnnn00100000 shal <REG_N> */{"shal",{A_REG_N},{HEX_4,REG_N,HEX_2,HEX_0}, arch_sh1_up}, @@ -573,15 +648,15 @@ const sh_opcode_info sh_table[] = /* 0000nnnn01100010 stc RS,<REG_N> */{"stc",{A_RS,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_2}, arch_sh_dsp_up}, -/* 0000nnnn00110010 stc SSR,<REG_N> */{"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}, arch_sh3_up}, +/* 0000nnnn00110010 stc SSR,<REG_N> */{"stc",{A_SSR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_2}, arch_sh3_nommu_up}, -/* 0000nnnn01000010 stc SPC,<REG_N> */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}, arch_sh3_up}, +/* 0000nnnn01000010 stc SPC,<REG_N> */{"stc",{A_SPC,A_REG_N},{HEX_0,REG_N,HEX_4,HEX_2}, arch_sh3_nommu_up}, /* 0000nnnn00111010 stc SGR,<REG_N> */{"stc",{A_SGR,A_REG_N},{HEX_0,REG_N,HEX_3,HEX_A}, arch_sh4_nommu_nofpu_up}, /* 0000nnnn11111010 stc DBR,<REG_N> */{"stc",{A_DBR,A_REG_N},{HEX_0,REG_N,HEX_F,HEX_A}, arch_sh4_nommu_nofpu_up}, -/* 0000nnnn1xxx0010 stc Rn_BANK,<REG_N> */{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}, arch_sh3_up}, +/* 0000nnnn1xxx0010 stc Rn_BANK,<REG_N> */{"stc",{A_REG_B,A_REG_N},{HEX_0,REG_N,REG_B,HEX_2}, arch_sh3_nommu_up}, /* 0100nnnn00000011 stc.l SR,@-<REG_N> */{"stc.l",{A_SR,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_3}, arch_sh1_up}, @@ -593,9 +668,9 @@ const sh_opcode_info sh_table[] = /* 0100nnnn01100011 stc.l RS,@-<REG_N> */{"stc.l",{A_RS,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_3}, arch_sh_dsp_up}, -/* 0100nnnn00110011 stc.l SSR,@-<REG_N> */{"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}, arch_sh3_up}, +/* 0100nnnn00110011 stc.l SSR,@-<REG_N> */{"stc.l",{A_SSR,A_DEC_N},{HEX_4,REG_N,HEX_3,HEX_3}, arch_sh3_nommu_up}, -/* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}, arch_sh3_up}, +/* 0100nnnn01000011 stc.l SPC,@-<REG_N> */{"stc.l",{A_SPC,A_DEC_N},{HEX_4,REG_N,HEX_4,HEX_3}, arch_sh3_nommu_up}, /* 0100nnnn00010011 stc.l GBR,@-<REG_N> */{"stc.l",{A_GBR,A_DEC_N},{HEX_4,REG_N,HEX_1,HEX_3}, arch_sh1_up}, @@ -603,7 +678,7 @@ const sh_opcode_info sh_table[] = /* 0100nnnn11110010 stc.l DBR,@-<REG_N> */{"stc.l",{A_DBR,A_DEC_N},{HEX_4,REG_N,HEX_F,HEX_2}, arch_sh4_nommu_nofpu_up}, -/* 0100nnnn1xxx0011 stc.l Rn_BANK,@-<REG_N> */{"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}, arch_sh3_up}, +/* 0100nnnn1xxx0011 stc.l Rn_BANK,@-<REG_N> */{"stc.l",{A_REG_B,A_DEC_N},{HEX_4,REG_N,REG_B,HEX_3}, arch_sh3_nommu_up}, /* 0000nnnn00001010 sts MACH,<REG_N> */{"sts",{A_MACH,A_REG_N},{HEX_0,REG_N,HEX_0,HEX_A}, arch_sh1_up}, diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c index 22f18fa..9470898 100644 --- a/opcodes/sparc-opc.c +++ b/opcodes/sparc-opc.c @@ -1273,110 +1273,72 @@ cond ("bz", "tz", CONDZ, F_CONDBR|F_ALIAS), /* for e */ #define FM_DF 2 /* v9 */ #define FM_QF 3 /* v9 */ -#define fmovicc(opcode, fpsize, cond, flags) /* v9 */ \ -{ opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z,f,g", flags, v9 }, \ -{ opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z,f,g", flags, v9 } +#define fmoviccx(opcode, fpsize, args, cond, flags) /* v9 */ \ +{ opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z," args, flags, v9 }, \ +{ opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z," args, flags, v9 } -#define fmovfcc(opcode, fpsize, fcond, flags) /* v9 */ \ -{ opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6,f,g", flags, v9 }, \ -{ opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7,f,g", flags, v9 }, \ -{ opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8,f,g", flags, v9 }, \ -{ opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9,f,g", flags, v9 } +#define fmovfccx(opcode, fpsize, args, fcond, flags) /* v9 */ \ +{ opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6," args, flags, v9 }, \ +{ opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7," args, flags, v9 }, \ +{ opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8," args, flags, v9 }, \ +{ opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9," args, flags, v9 } /* FIXME: use fmovicc/fmovfcc? */ /* v9 */ -#define fmovcc(opcode, fpsize, cond, fcond, flags) /* v9 */ \ -{ opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z,f,g", flags | F_FLOAT, v9 }, \ -{ opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6,f,g", flags | F_FLOAT, v9 }, \ -{ opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z,f,g", flags | F_FLOAT, v9 }, \ -{ opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7,f,g", flags | F_FLOAT, v9 }, \ -{ opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8,f,g", flags | F_FLOAT, v9 }, \ -{ opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9,f,g", flags | F_FLOAT, v9 } - -/* v9 */ fmovcc ("fmovda", FM_DF, CONDA, FCONDA, 0), -/* v9 */ fmovcc ("fmovqa", FM_QF, CONDA, FCONDA, 0), -/* v9 */ fmovcc ("fmovsa", FM_SF, CONDA, FCONDA, 0), -/* v9 */ fmovicc ("fmovdcc", FM_DF, CONDCC, 0), -/* v9 */ fmovicc ("fmovqcc", FM_QF, CONDCC, 0), -/* v9 */ fmovicc ("fmovscc", FM_SF, CONDCC, 0), -/* v9 */ fmovicc ("fmovdcs", FM_DF, CONDCS, 0), -/* v9 */ fmovicc ("fmovqcs", FM_QF, CONDCS, 0), -/* v9 */ fmovicc ("fmovscs", FM_SF, CONDCS, 0), -/* v9 */ fmovcc ("fmovde", FM_DF, CONDE, FCONDE, 0), -/* v9 */ fmovcc ("fmovqe", FM_QF, CONDE, FCONDE, 0), -/* v9 */ fmovcc ("fmovse", FM_SF, CONDE, FCONDE, 0), -/* v9 */ fmovcc ("fmovdg", FM_DF, CONDG, FCONDG, 0), -/* v9 */ fmovcc ("fmovqg", FM_QF, CONDG, FCONDG, 0), -/* v9 */ fmovcc ("fmovsg", FM_SF, CONDG, FCONDG, 0), -/* v9 */ fmovcc ("fmovdge", FM_DF, CONDGE, FCONDGE, 0), -/* v9 */ fmovcc ("fmovqge", FM_QF, CONDGE, FCONDGE, 0), -/* v9 */ fmovcc ("fmovsge", FM_SF, CONDGE, FCONDGE, 0), -/* v9 */ fmovicc ("fmovdgeu", FM_DF, CONDGEU, F_ALIAS), -/* v9 */ fmovicc ("fmovqgeu", FM_QF, CONDGEU, F_ALIAS), -/* v9 */ fmovicc ("fmovsgeu", FM_SF, CONDGEU, F_ALIAS), -/* v9 */ fmovicc ("fmovdgu", FM_DF, CONDGU, 0), -/* v9 */ fmovicc ("fmovqgu", FM_QF, CONDGU, 0), -/* v9 */ fmovicc ("fmovsgu", FM_SF, CONDGU, 0), -/* v9 */ fmovcc ("fmovdl", FM_DF, CONDL, FCONDL, 0), -/* v9 */ fmovcc ("fmovql", FM_QF, CONDL, FCONDL, 0), -/* v9 */ fmovcc ("fmovsl", FM_SF, CONDL, FCONDL, 0), -/* v9 */ fmovcc ("fmovdle", FM_DF, CONDLE, FCONDLE, 0), -/* v9 */ fmovcc ("fmovqle", FM_QF, CONDLE, FCONDLE, 0), -/* v9 */ fmovcc ("fmovsle", FM_SF, CONDLE, FCONDLE, 0), -/* v9 */ fmovicc ("fmovdleu", FM_DF, CONDLEU, 0), -/* v9 */ fmovicc ("fmovqleu", FM_QF, CONDLEU, 0), -/* v9 */ fmovicc ("fmovsleu", FM_SF, CONDLEU, 0), -/* v9 */ fmovfcc ("fmovdlg", FM_DF, FCONDLG, 0), -/* v9 */ fmovfcc ("fmovqlg", FM_QF, FCONDLG, 0), -/* v9 */ fmovfcc ("fmovslg", FM_SF, FCONDLG, 0), -/* v9 */ fmovicc ("fmovdlu", FM_DF, CONDLU, F_ALIAS), -/* v9 */ fmovicc ("fmovqlu", FM_QF, CONDLU, F_ALIAS), -/* v9 */ fmovicc ("fmovslu", FM_SF, CONDLU, F_ALIAS), -/* v9 */ fmovcc ("fmovdn", FM_DF, CONDN, FCONDN, 0), -/* v9 */ fmovcc ("fmovqn", FM_QF, CONDN, FCONDN, 0), -/* v9 */ fmovcc ("fmovsn", FM_SF, CONDN, FCONDN, 0), -/* v9 */ fmovcc ("fmovdne", FM_DF, CONDNE, FCONDNE, 0), -/* v9 */ fmovcc ("fmovqne", FM_QF, CONDNE, FCONDNE, 0), -/* v9 */ fmovcc ("fmovsne", FM_SF, CONDNE, FCONDNE, 0), -/* v9 */ fmovicc ("fmovdneg", FM_DF, CONDNEG, 0), -/* v9 */ fmovicc ("fmovqneg", FM_QF, CONDNEG, 0), -/* v9 */ fmovicc ("fmovsneg", FM_SF, CONDNEG, 0), -/* v9 */ fmovcc ("fmovdnz", FM_DF, CONDNZ, FCONDNZ, F_ALIAS), -/* v9 */ fmovcc ("fmovqnz", FM_QF, CONDNZ, FCONDNZ, F_ALIAS), -/* v9 */ fmovcc ("fmovsnz", FM_SF, CONDNZ, FCONDNZ, F_ALIAS), -/* v9 */ fmovfcc ("fmovdo", FM_DF, FCONDO, 0), -/* v9 */ fmovfcc ("fmovqo", FM_QF, FCONDO, 0), -/* v9 */ fmovfcc ("fmovso", FM_SF, FCONDO, 0), -/* v9 */ fmovicc ("fmovdpos", FM_DF, CONDPOS, 0), -/* v9 */ fmovicc ("fmovqpos", FM_QF, CONDPOS, 0), -/* v9 */ fmovicc ("fmovspos", FM_SF, CONDPOS, 0), -/* v9 */ fmovfcc ("fmovdu", FM_DF, FCONDU, 0), -/* v9 */ fmovfcc ("fmovqu", FM_QF, FCONDU, 0), -/* v9 */ fmovfcc ("fmovsu", FM_SF, FCONDU, 0), -/* v9 */ fmovfcc ("fmovdue", FM_DF, FCONDUE, 0), -/* v9 */ fmovfcc ("fmovque", FM_QF, FCONDUE, 0), -/* v9 */ fmovfcc ("fmovsue", FM_SF, FCONDUE, 0), -/* v9 */ fmovfcc ("fmovdug", FM_DF, FCONDUG, 0), -/* v9 */ fmovfcc ("fmovqug", FM_QF, FCONDUG, 0), -/* v9 */ fmovfcc ("fmovsug", FM_SF, FCONDUG, 0), -/* v9 */ fmovfcc ("fmovduge", FM_DF, FCONDUGE, 0), -/* v9 */ fmovfcc ("fmovquge", FM_QF, FCONDUGE, 0), -/* v9 */ fmovfcc ("fmovsuge", FM_SF, FCONDUGE, 0), -/* v9 */ fmovfcc ("fmovdul", FM_DF, FCONDUL, 0), -/* v9 */ fmovfcc ("fmovqul", FM_QF, FCONDUL, 0), -/* v9 */ fmovfcc ("fmovsul", FM_SF, FCONDUL, 0), -/* v9 */ fmovfcc ("fmovdule", FM_DF, FCONDULE, 0), -/* v9 */ fmovfcc ("fmovqule", FM_QF, FCONDULE, 0), -/* v9 */ fmovfcc ("fmovsule", FM_SF, FCONDULE, 0), -/* v9 */ fmovicc ("fmovdvc", FM_DF, CONDVC, 0), -/* v9 */ fmovicc ("fmovqvc", FM_QF, CONDVC, 0), -/* v9 */ fmovicc ("fmovsvc", FM_SF, CONDVC, 0), -/* v9 */ fmovicc ("fmovdvs", FM_DF, CONDVS, 0), -/* v9 */ fmovicc ("fmovqvs", FM_QF, CONDVS, 0), -/* v9 */ fmovicc ("fmovsvs", FM_SF, CONDVS, 0), -/* v9 */ fmovcc ("fmovdz", FM_DF, CONDZ, FCONDZ, F_ALIAS), -/* v9 */ fmovcc ("fmovqz", FM_QF, CONDZ, FCONDZ, F_ALIAS), -/* v9 */ fmovcc ("fmovsz", FM_SF, CONDZ, FCONDZ, F_ALIAS), - +#define fmovccx(opcode, fpsize, args, cond, fcond, flags) /* v9 */ \ +{ opcode, F3F(2, 0x35, 0x100+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x100+fpsize))|MCOND(~cond,~0), "z," args, flags | F_FLOAT, v9 }, \ +{ opcode, F3F(2, 0x35, 0x000+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x000+fpsize))|MCOND(~fcond,~0), "6," args, flags | F_FLOAT, v9 }, \ +{ opcode, F3F(2, 0x35, 0x180+fpsize)|MCOND(cond,0), F3F(~2, ~0x35, ~(0x180+fpsize))|MCOND(~cond,~0), "Z," args, flags | F_FLOAT, v9 }, \ +{ opcode, F3F(2, 0x35, 0x040+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x040+fpsize))|MCOND(~fcond,~0), "7," args, flags | F_FLOAT, v9 }, \ +{ opcode, F3F(2, 0x35, 0x080+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x080+fpsize))|MCOND(~fcond,~0), "8," args, flags | F_FLOAT, v9 }, \ +{ opcode, F3F(2, 0x35, 0x0c0+fpsize)|MCOND(fcond,0), F3F(~2, ~0x35, ~(0x0c0+fpsize))|MCOND(~fcond,~0), "9," args, flags | F_FLOAT, v9 } + +#define fmovicc(suffix, cond, flags) /* v9 */ \ +fmoviccx("fmovd" suffix, FM_DF, "B,H", cond, flags), \ +fmoviccx("fmovq" suffix, FM_QF, "R,J", cond, flags), \ +fmoviccx("fmovs" suffix, FM_SF, "f,g", cond, flags) + +#define fmovfcc(suffix, fcond, flags) /* v9 */ \ +fmovfccx("fmovd" suffix, FM_DF, "B,H", fcond, flags), \ +fmovfccx("fmovq" suffix, FM_QF, "R,J", fcond, flags), \ +fmovfccx("fmovs" suffix, FM_SF, "f,g", fcond, flags) + +#define fmovcc(suffix, cond, fcond, flags) /* v9 */ \ +fmovccx("fmovd" suffix, FM_DF, "B,H", cond, fcond, flags), \ +fmovccx("fmovq" suffix, FM_QF, "R,J", cond, fcond, flags), \ +fmovccx("fmovs" suffix, FM_SF, "f,g", cond, fcond, flags) + +/* v9 */ fmovcc ("a", CONDA, FCONDA, 0), +/* v9 */ fmovicc ("cc", CONDCC, 0), +/* v9 */ fmovicc ("cs", CONDCS, 0), +/* v9 */ fmovcc ("e", CONDE, FCONDE, 0), +/* v9 */ fmovcc ("g", CONDG, FCONDG, 0), +/* v9 */ fmovcc ("ge", CONDGE, FCONDGE, 0), +/* v9 */ fmovicc ("geu", CONDGEU, F_ALIAS), +/* v9 */ fmovicc ("gu", CONDGU, 0), +/* v9 */ fmovcc ("l", CONDL, FCONDL, 0), +/* v9 */ fmovcc ("le", CONDLE, FCONDLE, 0), +/* v9 */ fmovicc ("leu", CONDLEU, 0), +/* v9 */ fmovfcc ("lg", FCONDLG, 0), +/* v9 */ fmovicc ("lu", CONDLU, F_ALIAS), +/* v9 */ fmovcc ("n", CONDN, FCONDN, 0), +/* v9 */ fmovcc ("ne", CONDNE, FCONDNE, 0), +/* v9 */ fmovicc ("neg", CONDNEG, 0), +/* v9 */ fmovcc ("nz", CONDNZ, FCONDNZ, F_ALIAS), +/* v9 */ fmovfcc ("o", FCONDO, 0), +/* v9 */ fmovicc ("pos", CONDPOS, 0), +/* v9 */ fmovfcc ("u", FCONDU, 0), +/* v9 */ fmovfcc ("ue", FCONDUE, 0), +/* v9 */ fmovfcc ("ug", FCONDUG, 0), +/* v9 */ fmovfcc ("uge", FCONDUGE, 0), +/* v9 */ fmovfcc ("ul", FCONDUL, 0), +/* v9 */ fmovfcc ("ule", FCONDULE, 0), +/* v9 */ fmovicc ("vc", CONDVC, 0), +/* v9 */ fmovicc ("vs", CONDVS, 0), +/* v9 */ fmovcc ("z", CONDZ, FCONDZ, F_ALIAS), + +#undef fmoviccx /* v9 */ +#undef fmovfccx /* v9 */ +#undef fmovccx /* v9 */ #undef fmovicc /* v9 */ #undef fmovfcc /* v9 */ #undef fmovcc /* v9 */ |