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authorAndrew Cagney <cagney@redhat.com>2002-04-07 21:35:58 +0000
committerAndrew Cagney <cagney@redhat.com>2002-04-07 21:35:58 +0000
commit72717402be17455f42ba1c340ed5dae67d6cb594 (patch)
tree0a274491b2b6b569e2d092c9d68321c1c043c604 /opcodes
parentbcece7494146a4ed9e6580df982581f26c1d1bff (diff)
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Import 2002-03-06 Chris Demetriou <cgd@broadcom.com>
* mips-opc.c (mips_builtin_opcodes): Mark "pref" as being present on I4. * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog7
-rw-r--r--opcodes/mips-opc.c4
2 files changed, 10 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 67463ca..4065323 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,12 @@
2002-04-07 Andrew Cagney <ac131313@redhat.com>
+ Import 2002-03-06 Chris Demetriou <cgd@broadcom.com>
+ * mips-opc.c (mips_builtin_opcodes): Mark "pref" as being
+ present on I4.
+ * mips-opc.c (mips_builtin_opcodes): Add "movn.ps" and "movz.ps".
+
+2002-04-07 Andrew Cagney <ac131313@redhat.com>
+
Import 2002-03-11 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (is_newabi): Fix ABI decoding.
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c
index e2386e8..55d7b92 100644
--- a/opcodes/mips-opc.c
+++ b/opcodes/mips-opc.c
@@ -114,7 +114,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
them first. The assemblers uses a hash table based on the
instruction name anyhow. */
/* name, args, match, mask, pinfo, membership */
-{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I32|G3 },
+{"pref", "k,o(b)", 0xcc000000, 0xfc000000, RD_b, I4|I32|G3 },
{"prefx", "h,t(b)", 0x4c00000f, 0xfc0007ff, RD_b|RD_t, I4 },
{"nop", "", 0x00000000, 0xffffffff, 0, I1 },
{"ssnop", "", 0x00000040, 0xffffffff, 0, I32 },
@@ -583,6 +583,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"ffc", "d,v", 0x0000000b, 0xfc1f07ff, WR_d|RD_s, L1 },
{"movn.d", "D,S,t", 0x46200013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
{"movn.s", "D,S,t", 0x46000013, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
+{"movn.ps", "D,S,t", 0x46c00013, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I5 },
{"movt", "d,s,N", 0x00010001, 0xfc0307ff, WR_d|RD_s|RD_CC, I4|I32 },
{"movt.d", "D,S,N", 0x46210011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_D, I4|I32 },
{"movt.s", "D,S,N", 0x46010011, 0xffe3003f, WR_D|RD_S|RD_CC|FP_S, I4|I32 },
@@ -591,6 +592,7 @@ const struct mips_opcode mips_builtin_opcodes[] =
{"ffs", "d,v", 0x0000000a, 0xfc1f07ff, WR_d|RD_s, L1 },
{"movz.d", "D,S,t", 0x46200012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I4|I32 },
{"movz.s", "D,S,t", 0x46000012, 0xffe0003f, WR_D|RD_S|RD_t|FP_S, I4|I32 },
+{"movz.ps", "D,S,t", 0x46c00012, 0xffe0003f, WR_D|RD_S|RD_t|FP_D, I5 },
/* move is at the top of the table. */
{"msub.d", "D,R,S,T", 0x4c000029, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_D, I4 },
{"msub.s", "D,R,S,T", 0x4c000028, 0xfc00003f, RD_R|RD_S|RD_T|WR_D|FP_S, I4 },