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| author | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2012-08-24 08:11:44 +0000 |
|---|---|---|
| committer | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2012-08-24 08:11:44 +0000 |
| commit | c70a898785be75ec28614634bcea0f9220032dfb (patch) | |
| tree | 18bc99782be7d46db72793ac4c264a4c474f6926 /opcodes | |
| parent | 30bdf75259fabb1825e7244eed21551c024b725c (diff) | |
| download | gdb-c70a898785be75ec28614634bcea0f9220032dfb.zip gdb-c70a898785be75ec28614634bcea0f9220032dfb.tar.gz gdb-c70a898785be75ec28614634bcea0f9220032dfb.tar.bz2 | |
* gas/config/tc-arm.c (el_type_type_check): Add handling for 16-bit
floating point types.
(do_neon_cvttb_2): New function.
(do_neon_cvttb_1): Likewise.
(do_neon_cvtb): Refactor to use do_neon_cvttb_1.
(do_neon_cvtt): Likewise.
* gas/testsuite/gas/arm/armv8-a+fp.d: Update testcase.
* gas/testsuite/gas/arm/armv8-a+fp.s: Likewise.
* gas/testsuite/gas/arm/half-prec-vfpv3.s: Likewise.
* opcodes/arm-dis.c (coprocessor_opcodes): Add support for HP/DP
conversions.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 2 |
2 files changed, 7 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index ca6cae7..7db883c 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> + + * arm-dis.c (coprocessor_opcodes): Add support for HP/DP + conversions. + 2012-08-24 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> * arm-dis.c (coprocessor_opcodes): Add VRINT. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 60463d1..c6deac9 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -319,6 +319,8 @@ static const struct opcode32 coprocessor_opcodes[] = {FPU_NEON_EXT_V1, 0x0e400b10, 0x0fd00f10, "vmov%c.8\t%16-19,7D[%5,6,21d], %12-15r"}, {FPU_NEON_EXT_V1, 0x0e500b10, 0x0f500f10, "vmov%c.%23?us8\t%12-15r, %16-19,7D[%5,6,21d]"}, /* Half-precision conversion instructions. */ + {FPU_VFP_EXT_ARMV8, 0x0eb20b40, 0x0fbf0f50, "vcvt%7?tb%c.f64.f16\t%z1, %y0"}, + {FPU_VFP_EXT_ARMV8, 0x0eb30b40, 0x0fbf0f50, "vcvt%7?tb%c.f16.f64\t%y1, %z0"}, {FPU_VFP_EXT_FP16, 0x0eb20a40, 0x0fbf0f50, "vcvt%7?tb%c.f32.f16\t%y1, %y0"}, {FPU_VFP_EXT_FP16, 0x0eb30a40, 0x0fbf0f50, "vcvt%7?tb%c.f16.f32\t%y1, %y0"}, |