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author | Amit Pawar <Amit.Pawar@amd.com> | 2015-08-07 19:50:58 +0530 |
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committer | H.J. Lu <hjl.tools@gmail.com> | 2015-08-07 07:31:51 -0700 |
commit | 36aed29d3774a156c88ca7110f3c12605d861b9c (patch) | |
tree | 8969091e520d93eee20a6e1e40d4cbbd6e59b08c /opcodes | |
parent | 6e33951edcbed1fd803beabcde2af3b252b92164 (diff) | |
download | gdb-36aed29d3774a156c88ca7110f3c12605d861b9c.zip gdb-36aed29d3774a156c88ca7110f3c12605d861b9c.tar.gz gdb-36aed29d3774a156c88ca7110f3c12605d861b9c.tar.bz2 |
Remove CpuFMA4 support from CPU_ZNVER1_FLAGS.
opcodes/
* i386-gen.c: Remove CpuFMA4 from CPU_ZNVER1_FLAGS.
* i386-init.h: Regenerated.
Diffstat (limited to 'opcodes')
-rw-r--r-- | opcodes/ChangeLog | 5 | ||||
-rw-r--r-- | opcodes/i386-gen.c | 2 | ||||
-rw-r--r-- | opcodes/i386-init.h | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index a447f0a..995deae 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2015-08-07 Amit Pawar <Amit.Pawar@amd.com> + + * i386-gen.c: Remove CpuFMA4 from CPU_ZNVER1_FLAGS. + * i386-init.h: Regenerated. + 2015-07-30 H.J. Lu <hongjiu.lu@intel.com> PR binutils/13571 diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 5aca18a..18115df 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -96,7 +96,7 @@ static initializer cpu_flag_init[] = { "CPU_BDVER4_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuXOP|CpuLWP|CpuBMI|CpuTBM|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuMWAITX" }, { "CPU_ZNVER1_FLAGS", - "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuFMA4|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, + "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA|CpuBMI|CpuF16C|CpuCX16|CpuClflush|CpuSSSE3|CpuSVME|CpuSSE4_1|CpuSSE4_2|CpuAES|CpuAVX|CpuPCLMUL|CpuLZCNT|CpuPRFCHW|CpuXsave|CpuXsaveopt|CpuFSGSBase|CpuAVX2|CpuMovbe|CpuBMI2|CpuRdRnd|CpuADX|CpuRdSeed|CpuSMAP|CpuSHA|CpuXSAVEC|CpuXSAVES|CpuClflushOpt|CpuCLZERO|CpuMWAITX" }, { "CPU_BTVER1_FLAGS", "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4a|CpuABM|CpuLM|CpuPRFCHW|CpuCX16|CpuClflush|CpuFISTTP|CpuSVME|CpuLZCNT" }, { "CPU_BTVER2_FLAGS", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index 772cd35..e791083 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -210,7 +210,7 @@ #define CPU_ZNVER1_FLAGS \ { { 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, \ 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, \ + 0, 1, 1, 1, 1, 1, 0, 0, 0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 1, \ 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 0, 0, 0, 0, 0, \ 0, 1, 1, 0, 0, 0, 0, 0 } } |