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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-06-02 12:24:24 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2015-06-02 12:24:24 +0100 |
| commit | 1af1dd51db991700c0e66b35d777a44e6953bbd2 (patch) | |
| tree | d1d052bdbef26c5bbf10185c7e21757e57d042dc /opcodes | |
| parent | 9e1f0fa7f3f7aef95d27e197562906bc648849bb (diff) | |
| download | gdb-1af1dd51db991700c0e66b35d777a44e6953bbd2.zip gdb-1af1dd51db991700c0e66b35d777a44e6953bbd2.tar.gz gdb-1af1dd51db991700c0e66b35d777a44e6953bbd2.tar.bz2 | |
[ARM] Rework CPU feature selection in the disassembler
include/opcode/
* arm.h (ARM_FEATURE_ALL): New.
opcodes/
* arm-dis.c (select_arm_features): Rework to avoid used of
redefined macros.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 55 |
2 files changed, 31 insertions, 29 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 7e8e5d8..05fc116 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2015-06-02 Matthew Wahab <matthew.wahab@arm.com> + * arm-dis.c (select_arm_features): Rework to avoid used of redefined + macros. + +2015-06-02 Matthew Wahab <matthew.wahab@arm.com> + * aarch64-tbl.h (aarch64_feature_rdma): New. (RDMA): New. (aarch64_opcode_table): Add "sqrmlah" and "sqrdmlsh" instructions. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 1585a4f..9c2665d 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -6026,43 +6026,40 @@ static void select_arm_features (unsigned long mach, arm_feature_set * features) { -#undef ARM_FEATURE_LOW -#define ARM_FEATURE_LOW(ARCH1,CEXT) \ - features->core[0] = (ARCH1); \ - features->core[1] = 0; \ - features->coproc = (CEXT) | FPU_FPA; \ - return - -#undef ARM_FEATURE_CORE_LOW -#define ARM_FEATURE_CORE_LOW(ARCH1) \ - features->core[0] = (ARCH1); \ - features->core[1] = 0; \ - features->coproc = FPU_FPA; \ - return +#undef ARM_SET_FEATURES +#define ARM_SET_FEATURES(FSET) \ + { \ + const arm_feature_set fset = FSET; \ + arm_feature_set tmp = ARM_FEATURE (0, 0, FPU_FPA) ; \ + ARM_MERGE_FEATURE_SETS (*features, tmp, fset); \ + } switch (mach) { - case bfd_mach_arm_2: ARM_ARCH_V2; - case bfd_mach_arm_2a: ARM_ARCH_V2S; - case bfd_mach_arm_3: ARM_ARCH_V3; - case bfd_mach_arm_3M: ARM_ARCH_V3M; - case bfd_mach_arm_4: ARM_ARCH_V4; - case bfd_mach_arm_4T: ARM_ARCH_V4T; - case bfd_mach_arm_5: ARM_ARCH_V5; - case bfd_mach_arm_5T: ARM_ARCH_V5T; - case bfd_mach_arm_5TE: ARM_ARCH_V5TE; - case bfd_mach_arm_XScale: ARM_ARCH_XSCALE; - case bfd_mach_arm_ep9312: ARM_FEATURE_LOW (ARM_AEXT_V4T, \ - ARM_CEXT_MAVERICK \ - | FPU_MAVERICK); - case bfd_mach_arm_iWMMXt: ARM_ARCH_IWMMXT; - case bfd_mach_arm_iWMMXt2: ARM_ARCH_IWMMXT2; + case bfd_mach_arm_2: ARM_SET_FEATURES (ARM_ARCH_V2); break; + case bfd_mach_arm_2a: ARM_SET_FEATURES (ARM_ARCH_V2S); break; + case bfd_mach_arm_3: ARM_SET_FEATURES (ARM_ARCH_V3); break; + case bfd_mach_arm_3M: ARM_SET_FEATURES (ARM_ARCH_V3M); break; + case bfd_mach_arm_4: ARM_SET_FEATURES (ARM_ARCH_V4); break; + case bfd_mach_arm_4T: ARM_SET_FEATURES (ARM_ARCH_V4T); break; + case bfd_mach_arm_5: ARM_SET_FEATURES (ARM_ARCH_V5); break; + case bfd_mach_arm_5T: ARM_SET_FEATURES (ARM_ARCH_V5T); break; + case bfd_mach_arm_5TE: ARM_SET_FEATURES (ARM_ARCH_V5TE); break; + case bfd_mach_arm_XScale: ARM_SET_FEATURES (ARM_ARCH_XSCALE); break; + case bfd_mach_arm_ep9312: + ARM_SET_FEATURES (ARM_FEATURE_LOW (ARM_AEXT_V4T, + ARM_CEXT_MAVERICK | FPU_MAVERICK)); + break; + case bfd_mach_arm_iWMMXt: ARM_SET_FEATURES (ARM_ARCH_IWMMXT); break; + case bfd_mach_arm_iWMMXt2: ARM_SET_FEATURES (ARM_ARCH_IWMMXT2); break; /* If the machine type is unknown allow all architecture types and all extensions. */ - case bfd_mach_arm_unknown: ARM_FEATURE_LOW (-1UL, -1UL); + case bfd_mach_arm_unknown: ARM_SET_FEATURES (ARM_FEATURE_ALL); break; default: abort (); } + +#undef ARM_SET_FEATURES } |