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| author | H.J. Lu <hjl.tools@gmail.com> | 2020-02-16 20:10:20 -0800 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-02-16 20:10:20 -0800 |
| commit | ce504911e5c4068a3498eebde4064b24382c7598 (patch) | |
| tree | f84b878bc6697156a2c863d05ce0d329e6b2841e /opcodes | |
| parent | dabec65da1b937ea40a30b7a844fbf91782b718a (diff) | |
| download | gdb-ce504911e5c4068a3498eebde4064b24382c7598.zip gdb-ce504911e5c4068a3498eebde4064b24382c7598.tar.gz gdb-ce504911e5c4068a3498eebde4064b24382c7598.tar.bz2 | |
x86: Don't disable SSE3 when disabling SSE4a
Since SSE3 is independent of SSE4a, don't disable SSE3 when disabling
SSE4a.
* i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from
CPU_ANY_SSE4A_FLAGS.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/i386-gen.c | 2 | ||||
| -rw-r--r-- | opcodes/i386-init.h | 2 |
3 files changed, 7 insertions, 2 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 908afdd..9d02fc4 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2020-02-16 H.J. Lu <hongjiu.lu@intel.com> + + * i386-gen.c (cpu_flag_init): Remove CPU_ANY_SSE3_FLAGS from + CPU_ANY_SSE4A_FLAGS. + 2020-02-17 Alan Modra <amodra@gmail.com> * i386-gen.c (cpu_flag_init): Correct last change. diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 4074792..4d98d31 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -334,7 +334,7 @@ static initializer cpu_flag_init[] = { "CPU_ANY_SSE4_2_FLAGS", "CpuSSE4_2" }, { "CPU_ANY_SSE4A_FLAGS", - "CPU_ANY_SSE3_FLAGS|CpuSSE4a" }, + "CpuSSE4a" }, { "CPU_ANY_AVX_FLAGS", "CPU_ANY_AVX2_FLAGS|CpuF16C|CpuFMA|CpuFMA4|CpuXOP|CpuAVX" }, { "CPU_ANY_AVX2_FLAGS", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index d4674fc..36660b1 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -1172,7 +1172,7 @@ #define CPU_ANY_SSE4A_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 1, 0, 0, 0, 0, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ |