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authorJeff Law <law@redhat.com>1996-08-23 17:52:00 +0000
committerJeff Law <law@redhat.com>1996-08-23 17:52:00 +0000
commit9ad8ddf1bd4d07041d0149b64a2e29881586a89d (patch)
treebbe724640a98e3527e6c333014033fa3da563e3f /opcodes
parent827b80748b84ec13d5201e333707f2b38392d9a6 (diff)
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* v850-opc.c (v850_operands): I16 inserts at offset 16!
Should get immediate 16bit operands into the right place
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog2
-rw-r--r--opcodes/v850-opc.c2
2 files changed, 3 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 41521e8..704b513 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,6 +1,8 @@
start-sanitize-v850
Fri Aug 23 00:27:01 1996 Jeffrey A Law (law@cygnus.com)
+ * v850-opc.c (v850_operands): I16 inserts at offset 16!
+
* v850-opc.c (v850_operands): Add "SR1" and "SR2" for system
register source and destination operands.
(v850_opcodes): Use SR1 and SR2 for "ldsr" and "stsr".
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 9047701..39cb57b 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -42,7 +42,7 @@ const struct v850_operand v850_operands[] = {
/* The IMM16 field in a format 6 insn. */
#define I16 (I5U+1)
- { 16, 0, 0, 0, 0 },
+ { 16, 16, 0, 0, 0 },
/* The signed DISP7 field in a format 4 insn. */
#define D7S (I16+1)