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| author | Matthew Wahab <matthew.wahab@arm.com> | 2015-06-01 16:00:28 +0100 |
|---|---|---|
| committer | Jiong Wang <jiong.wang@arm.com> | 2015-06-01 16:00:28 +0100 |
| commit | f21cce2cacb534428ed6ea96fdb684ad8a4a948a (patch) | |
| tree | 2da1e9264da3e3e842a0ea36d5ad349eb9c2b278 /opcodes | |
| parent | 7018c0308ac5d936b68c280bfcdc80bef77225e1 (diff) | |
| download | gdb-f21cce2cacb534428ed6ea96fdb684ad8a4a948a.zip gdb-f21cce2cacb534428ed6ea96fdb684ad8a4a948a.tar.gz gdb-f21cce2cacb534428ed6ea96fdb684ad8a4a948a.tar.bz2 | |
[AArch64][libopcode] Add support for PAN architecture extension
The ARMv8.1 architecture introduced the Privileged Access Never extension. This
adds a processor state field PSTATE.PAN which can be accessed using the MRS/MSR
instructions.
This patch adds support for the PAN architecture feature and processor state
field to libopcode.
include/opcode
2015-06-01 Matthew Wahab <matthew.wahab@arm.com>
* aarch64.h (AARCH64_FEATURE_PAN): New.
(aarch64_sys_reg_supported_p): Declare.
(aarch64_pstatefield_supported_p): Declare.
opcodes/
2015-06-01 Matthew Wahab <matthew.wahab@arm.com>
* aarch64-opc.c (F_ARCHEXT): New.
(aarch64_sys_regs): Add "pan".
(aarch64_sys_reg_supported_p): New.
(aarch64_pstatefields): Add "pan".
(aarch64_pstatefield_supported_p): New.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 8 | ||||
| -rw-r--r-- | opcodes/aarch64-opc.c | 38 |
2 files changed, 46 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 9158b14..f4688c8 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,11 @@ +2015-06-01 Matthew Wahab <matthew.wahab@arm.com> + + * aarch64-opc.c (F_ARCHEXT): New. + (aarch64_sys_regs): Add "pan". + (aarch64_sys_reg_supported_p): New. + (aarch64_pstatefields): Add "pan". + (aarch64_pstatefield_supported_p): New. + 2015-06-01 Jan Beulich <jbeulich@suse.com> * i386-tbl.h: Regenerate. diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 5ea1384..5c7ef86 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -2723,6 +2723,12 @@ aarch64_print_operand (char *buf, size_t size, bfd_vma pc, #endif #define F_DEPRECATED 0x1 /* Deprecated system register. */ +#ifdef F_ARCHEXT +#undef F_ARCHEXT +#endif +#define F_ARCHEXT 0x2 /* Architecture dependent system register. */ + + /* TODO there are two more issues need to be resolved 1. handle read-only and write-only system registers 2. handle cpu-implementation-defined system registers. */ @@ -2734,6 +2740,7 @@ const aarch64_sys_reg aarch64_sys_regs [] = { "spsel", CPEN_(0,C2,0), 0 }, { "daif", CPEN_(3,C2,1), 0 }, { "currentel", CPEN_(0,C2,2), 0 }, /* RO */ + { "pan", CPEN_(0,C2,3), F_ARCHEXT }, { "nzcv", CPEN_(3,C2,0), 0 }, { "fpcr", CPEN_(3,C4,0), 0 }, { "fpsr", CPEN_(3,C4,1), 0 }, @@ -3043,14 +3050,45 @@ aarch64_sys_reg_deprecated_p (const aarch64_sys_reg *reg) return (reg->flags & F_DEPRECATED) != 0; } +bfd_boolean +aarch64_sys_reg_supported_p (const aarch64_feature_set features, + const aarch64_sys_reg *reg) +{ + if (!(reg->flags & F_ARCHEXT)) + return TRUE; + + /* PAN. Values are from aarch64_sys_regs. */ + if (reg->value == CPEN_(0,C2,3) + && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_PAN)) + return FALSE; + + return TRUE; +} + const aarch64_sys_reg aarch64_pstatefields [] = { { "spsel", 0x05, 0 }, { "daifset", 0x1e, 0 }, { "daifclr", 0x1f, 0 }, + { "pan", 0x04, F_ARCHEXT }, { 0, CPENC(0,0,0,0,0), 0 }, }; +bfd_boolean +aarch64_pstatefield_supported_p (const aarch64_feature_set features, + const aarch64_sys_reg *reg) +{ + if (!(reg->flags & F_ARCHEXT)) + return TRUE; + + /* PAN. Values are from aarch64_pstatefields. */ + if (reg->value == 0x04 + && !AARCH64_CPU_HAS_FEATURE (features, AARCH64_FEATURE_PAN)) + return FALSE; + + return TRUE; +} + const aarch64_sys_ins_reg aarch64_sys_regs_ic[] = { { "ialluis", CPENS(0,C7,C1,0), 0 }, |