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| author | Thiemo Seufer <ths@networkno.de> | 2002-09-26 09:56:35 +0000 |
|---|---|---|
| committer | Thiemo Seufer <ths@networkno.de> | 2002-09-26 09:56:35 +0000 |
| commit | 3396de367a522c2e10a68389b48fc9e944d7cc04 (patch) | |
| tree | c243e888474312638918daa6bfb9b6c1ceb6faec /opcodes | |
| parent | 14366460653878e157fab7d8950946515889ccc6 (diff) | |
| download | gdb-3396de367a522c2e10a68389b48fc9e944d7cc04.zip gdb-3396de367a522c2e10a68389b48fc9e944d7cc04.tar.gz gdb-3396de367a522c2e10a68389b48fc9e944d7cc04.tar.bz2 | |
/gas/ChangeLog
* config/tc-mips.c (CPU_HAS_MIPS16): Add mips-lsi-elf as MIPS16
capable configuration.
(macro_build): Check for MIPS16 capability, not for actual MIPS16 code
generation.
(mips_ip): Likewise.
/gas/testsuite/ChangeLog
* gas/mips/mips-jalx.d: New file, check jalx assembly.
* gas/mips/mips-jalx.s: Likewise.
* gas/mips/mips-no-jalx.l: Likewise.
* gas/mips/mips-no-jalx.s: Likewise.
* gas/mips/mips16-jalx.d: Likewise.
* gas/mips/mips16-jalx.s: Likewise.
* gas/mips/mips.exp: Add new tests.
/opcodes/ChangeLog:
* mips-dis.c (print_insn_mips): Always allow disassembly of
32-bit jalx opcode.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/mips-dis.c | 4 |
2 files changed, 8 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 760d400..487530a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2002-09-26 Thiemo Seufer <seufer@csv.ica.uni-stuttgart.de> + + * mips-dis.c (print_insn_mips): Always allow disassembly of + 32-bit jalx opcode. + 2002-09-24 Nick Clifton <nickc@redhat.com> * po/de.po: Updated German translation. diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index af44788..4ffdf99 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -526,7 +526,9 @@ print_insn_mips (memaddr, word, info) { register const char *d; - if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor)) + /* We always allow to disassemble the jalx instruction. */ + if (! OPCODE_IS_MEMBER (op, mips_isa, target_processor) + && strcmp (op->name, "jalx")) continue; /* Figure out instruction type and branch delay information. */ |