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| author | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2010-09-23 15:37:45 +0000 |
|---|---|---|
| committer | Matthew Gretton-Dann <matthew.gretton-dann@arm.com> | 2010-09-23 15:37:45 +0000 |
| commit | eea54501f730cf7697d5bce04f634c95a236bfdd (patch) | |
| tree | 596566d320432d70f014c8a28de1b995efd5d677 /opcodes | |
| parent | b2a5fbdc946c0b4a0032f4d9f8cf23d87f5a2dd6 (diff) | |
| download | gdb-eea54501f730cf7697d5bce04f634c95a236bfdd.zip gdb-eea54501f730cf7697d5bce04f634c95a236bfdd.tar.gz gdb-eea54501f730cf7697d5bce04f634c95a236bfdd.tar.bz2 | |
* gas/config/tc-arm.c (arm_ext_adiv): New variable.
(do_div): New function.
(insns): Accept UDIV and SDIV in ARM state.
(arm_cpus): The cortex-a15 option has all current v7-A extensions.
(arm_extensions): Add 'idiv' extension.
(aeabi_set_public_attributes): Update Tag_DIV_use values for the
Integer Divide extension.
* gas/doc/c-arm.texi: Document the idiv extension.
* gas/testsuite/gas/arm/armv7-a+idiv.d: New test.
* gas/testsuite/gas/arm/armv7-a+idiv.s: Likewise.
* gas/testsuite/gas/arm/attr-march-all.d: Update for Integer divide extension.
* gas/testsuite/gas/arm/attr-march-armv7-a+idiv.d: New test.
* include/opcode/arm.h (ARM_AEXT_ADIV): New define.
(ARM_ARCH_V7A_IDIV_MP_SEC): Likewise.
* opcodes/arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in
ARM state.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 5 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 4 |
2 files changed, 9 insertions, 0 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 3dd84e4..fb6b01a 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,5 +1,10 @@ 2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> + * arm-dis.c (arm_opcodes): Support disassembly of UDIV and SDIV in + ARM state. + +2010-09-23 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> + * arm-dis.c (arm_opcodes): SMC implies Security Extensions. (thumb32_opcodes): Likewise. diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index 76a04e3..005c957 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -829,6 +829,10 @@ static const struct opcode32 arm_opcodes[] = {ARM_EXT_V3M, 0x00800090, 0x0fa000f0, "%22?sumull%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"}, {ARM_EXT_V3M, 0x00a00090, 0x0fa000f0, "%22?sumlal%20's%c\t%12-15Ru, %16-19Ru, %0-3R, %8-11R"}, + /* Integer Divide Extension instructions. */ + {ARM_EXT_ADIV, 0x0710f010, 0x0ff0f0f0, "sdiv%c\t%16-19r, %0-3r, %8-11r"}, + {ARM_EXT_ADIV, 0x0730f010, 0x0ff0f0f0, "udiv%c\t%16-19r, %0-3r, %8-11r"}, + /* MP Extension instructions. */ {ARM_EXT_MP, 0xf410f000, 0xfc70f000, "pldw\t%a"}, |