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authorKazu Hirata <kazu@codesourcery.com>2007-01-08 18:42:37 +0000
committerKazu Hirata <kazu@codesourcery.com>2007-01-08 18:42:37 +0000
commit3bdcfdf41f04c851af504aa0b653e0c806a930f4 (patch)
treec3b84f2be979ef63edfcca340ffb50b340af54fa /opcodes
parent00fa51f6801ada6b33763db75f5cdab6c74ea90b (diff)
downloadgdb-3bdcfdf41f04c851af504aa0b653e0c806a930f4.zip
gdb-3bdcfdf41f04c851af504aa0b653e0c806a930f4.tar.gz
gdb-3bdcfdf41f04c851af504aa0b653e0c806a930f4.tar.bz2
bfd/
* archures.c (bfd_mach_cpu32_fido): Rename to bfd_mach_fido. * bfd-in2.h: Regenerate. * cpu-m68k.c (arch_info_struct): Use bfd_mach_fido instead of bfd_mach_cpu32_fido. (m68k_arch_features): Use fido_a instead of cpu32. (bfd_m68k_compatible): Reject the combination of Fido and ColdFire. Accept the combination of CPU32 and Fido with a warning. * elf32-m68k.c (elf32_m68k_object_p, elf32_m68k_merge_private_bfd_data, elf32_m68k_print_private_bfd_data): Treat Fido as an architecture by itself. binutils/ * readelf.c (get_machine_flags): Treat Fido as an architecture by itself. gas/ * config/tc-m68k.c (m68k_archs, m68k_cpus): Treat Fido as an architecture by itself. (m68k_ip): Don't issue a warning for tbl instructions on fido. (m68k_elf_final_processing): Treat Fido as an architecture by itself. include/elf/ * m68k.h (EF_M68K_FIDO): New. (EF_M68K_ARCH_MASK): OR EF_M68K_FIDO. (EF_M68K_CPU32_FIDO_A, EF_M68K_CPU32_MASK): Remove. include/opcode/ * m68k.h (m68010up): OR fido_a. opcodes/ * m68k-opc.c (m68k_opcodes): Replace cpu32 with cpu32 | fido_a except on tbl instructions.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/m68k-opc.c184
2 files changed, 97 insertions, 92 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 7e43932..c28285c 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2007-01-08 Kazu Hirata <kazu@codesourcery.com>
+
+ * m68k-opc.c (m68k_opcodes): Replace cpu32 with
+ cpu32 | fido_a except on tbl instructions.
+
2007-01-04 Paul Brook <paul@codesourcery.com>
* arm-dis.c (arm_opcodes): Fix cpsie and cpsid entries.
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index 51b62d4..c3948cf 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -131,20 +131,20 @@ const struct m68k_opcode m68k_opcodes[] =
{"bgtw", 2, one(0067000), one(0177777), "BW", m68000up | mcfisa_a },
{"blew", 2, one(0067400), one(0177777), "BW", m68000up | mcfisa_a },
-{"bhil", 2, one(0061377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"blsl", 2, one(0061777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bccl", 2, one(0062377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bcsl", 2, one(0062777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bnel", 2, one(0063377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"beql", 2, one(0063777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bvcl", 2, one(0064377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bvsl", 2, one(0064777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bpll", 2, one(0065377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bmil", 2, one(0065777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bgel", 2, one(0066377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bltl", 2, one(0066777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"bgtl", 2, one(0067377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
-{"blel", 2, one(0067777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
+{"bhil", 2, one(0061377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"blsl", 2, one(0061777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bccl", 2, one(0062377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bcsl", 2, one(0062777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bnel", 2, one(0063377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"beql", 2, one(0063777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bvcl", 2, one(0064377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bvsl", 2, one(0064777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bpll", 2, one(0065377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bmil", 2, one(0065777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bgel", 2, one(0066377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bltl", 2, one(0066777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"bgtl", 2, one(0067377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
+{"blel", 2, one(0067777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
{"bhis", 2, one(0061000), one(0177400), "BB", m68000up | mcfisa_a },
{"blss", 2, one(0061400), one(0177400), "BB", m68000up | mcfisa_a },
@@ -193,14 +193,14 @@ const struct m68k_opcode m68k_opcodes[] =
{"bfset", 4, two(0167300, 0), two(0177700, 0170000), "?sO2O3", m68020up },
{"bftst", 4, two(0164300, 0), two(0177700, 0170000), "/sO2O3", m68020up },
-{"bgnd", 2, one(0045372), one(0177777), "", cpu32 },
+{"bgnd", 2, one(0045372), one(0177777), "", cpu32 | fido_a },
{"bitrev", 2, one(0000300), one(0177770), "Ds", mcfisa_aa},
{"bkpt", 2, one(0044110), one(0177770), "ts", m68010up },
{"braw", 2, one(0060000), one(0177777), "BW", m68000up | mcfisa_a },
-{"bral", 2, one(0060377), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
+{"bral", 2, one(0060377), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
{"bras", 2, one(0060000), one(0177400), "BB", m68000up | mcfisa_a },
{"bset", 2, one(0000700), one(0170700), "Dd$s", m68000up | mcfisa_a },
@@ -209,7 +209,7 @@ const struct m68k_opcode m68k_opcodes[] =
{"bset", 4, one(0004300), one(0177700), "#bqs", mcfisa_a },
{"bsrw", 2, one(0060400), one(0177777), "BW", m68000up | mcfisa_a },
-{"bsrl", 2, one(0060777), one(0177777), "BL", m68020up | cpu32 | mcfisa_b},
+{"bsrl", 2, one(0060777), one(0177777), "BL", m68020up | cpu32 | fido_a | mcfisa_b},
{"bsrs", 2, one(0060400), one(0177400), "BB", m68000up | mcfisa_a },
{"btst", 2, one(0000400), one(0170700), "Dd;b", m68000up | mcfisa_a },
@@ -229,9 +229,9 @@ const struct m68k_opcode m68k_opcodes[] =
{"casw", 4, two(0006300, 0), two(0177700, 0177070), "D3D2~s", m68020up },
{"casl", 4, two(0007300, 0), two(0177700, 0177070), "D3D2~s", m68020up },
-{"chk2b", 4, two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"chk2w", 4, two(0001300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"chk2l", 4, two(0002300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 },
+{"chk2b", 4, two(0000300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
+{"chk2w", 4, two(0001300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
+{"chk2l", 4, two(0002300,0004000), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
{"chkl", 2, one(0040400), one(0170700), ";lDd", m68000up },
{"chkw", 2, one(0040600), one(0170700), ";wDd", m68000up },
@@ -256,9 +256,9 @@ const struct m68k_opcode m68k_opcodes[] =
{"clrw", 2, one(0041100), one(0177700), "$s", m68000up | mcfisa_a },
{"clrl", 2, one(0041200), one(0177700), "$s", m68000up | mcfisa_a },
-{"cmp2b", 4, two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"cmp2w", 4, two(0001300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
-{"cmp2l", 4, two(0002300,0), two(0177700,07777), "!sR1", m68020up | cpu32 },
+{"cmp2b", 4, two(0000300,0), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
+{"cmp2w", 4, two(0001300,0), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
+{"cmp2l", 4, two(0002300,0), two(0177700,07777), "!sR1", m68020up | cpu32 | fido_a },
{"cmpaw", 2, one(0130300), one(0170700), "*wAd", m68000up },
{"cmpal", 2, one(0130700), one(0170700), "*lAd", m68000up | mcfisa_a },
@@ -310,21 +310,21 @@ const struct m68k_opcode m68k_opcodes[] =
{"divsw", 2, one(0100700), one(0170700), ";wDd", m68000up | mcfhwdiv },
-{"divsl", 4, two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
-{"divsl", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 },
+{"divsl", 4, two(0046100,0006000),two(0177700,0107770),";lD3D1", m68020up | cpu32 | fido_a },
+{"divsl", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up | cpu32 | fido_a },
{"divsl", 4, two(0046100,0004000),two(0177700,0107770),"qsDD", mcfhwdiv },
-{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
-{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up|cpu32 },
+{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lD3D1",m68020up | cpu32 | fido_a },
+{"divsll", 4, two(0046100,0004000),two(0177700,0107770),";lDD", m68020up | cpu32 | fido_a },
{"divuw", 2, one(0100300), one(0170700), ";wDd", m68000up | mcfhwdiv },
-{"divul", 4, two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up|cpu32 },
-{"divul", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
+{"divul", 4, two(0046100,0002000),two(0177700,0107770),";lD3D1", m68020up | cpu32 | fido_a },
+{"divul", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up | cpu32 | fido_a },
{"divul", 4, two(0046100,0000000),two(0177700,0107770),"qsDD", mcfhwdiv },
-{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up|cpu32 },
-{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up|cpu32 },
+{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lD3D1",m68020up | cpu32 | fido_a },
+{"divull", 4, two(0046100,0000000),two(0177700,0107770),";lDD", m68020up | cpu32 | fido_a },
{"eorib", 4, one(0005000), one(0177700), "#b$s", m68000up },
{"eorib", 4, one(0005074), one(0177777), "#bCs", m68000up },
@@ -358,7 +358,7 @@ const struct m68k_opcode m68k_opcodes[] =
{"extw", 2, one(0044200), one(0177770), "Ds", m68000up|mcfisa_a },
{"extl", 2, one(0044300), one(0177770), "Ds", m68000up|mcfisa_a },
-{"extbl", 2, one(0044700), one(0177770), "Ds", m68020up|cpu32|mcfisa_a },
+{"extbl", 2, one(0044700), one(0177770), "Ds", m68020up | cpu32 | fido_a | mcfisa_a },
{"ff1", 2, one(0002300), one(0177770), "Ds", mcfisa_aa},
@@ -1437,12 +1437,12 @@ const struct m68k_opcode m68k_opcodes[] =
{"lea", 2, one(0040700), one(0170700), "!sAd", m68000up | mcfisa_a },
-{"lpstop", 6, two(0174000,0000700),two(0177777,0177777),"#w", cpu32|m68060 },
+{"lpstop", 6, two(0174000,0000700),two(0177777,0177777),"#w", cpu32 | fido_a | m68060 },
{"linkw", 4, one(0047120), one(0177770), "As#w", m68000up | mcfisa_a },
-{"linkl", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 },
+{"linkl", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 | fido_a },
{"link", 4, one(0047120), one(0177770), "As#W", m68000up | mcfisa_a },
-{"link", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 },
+{"link", 6, one(0044010), one(0177770), "As#l", m68020up | cpu32 | fido_a },
{"lslb", 2, one(0160410), one(0170770), "QdDs", m68000up },
{"lslb", 2, one(0160450), one(0170770), "DdDs", m68000up },
@@ -1672,14 +1672,14 @@ const struct m68k_opcode m68k_opcodes[] =
{"msacl", 4, two(0xa000, 0x0900), two(0xf130, 0x0f00), "RMRmeH", mcfemac },
{"mulsw", 2, one(0140700), one(0170700), ";wDd", m68000up|mcfisa_a },
-{"mulsl", 4, two(0046000,004000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
+{"mulsl", 4, two(0046000,004000), two(0177700,0107770), ";lD1", m68020up | cpu32 | fido_a },
{"mulsl", 4, two(0046000,004000), two(0177700,0107770), "qsD1", mcfisa_a },
-{"mulsl", 4, two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
+{"mulsl", 4, two(0046000,006000), two(0177700,0107770), ";lD3D1",m68020up | cpu32 | fido_a },
{"muluw", 2, one(0140300), one(0170700), ";wDd", m68000up|mcfisa_a },
-{"mulul", 4, two(0046000,000000), two(0177700,0107770), ";lD1", m68020up|cpu32 },
+{"mulul", 4, two(0046000,000000), two(0177700,0107770), ";lD1", m68020up | cpu32 | fido_a },
{"mulul", 4, two(0046000,000000), two(0177700,0107770), "qsD1", mcfisa_a },
-{"mulul", 4, two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up|cpu32 },
+{"mulul", 4, two(0046000,002000), two(0177700,0107770), ";lD3D1",m68020up | cpu32 | fido_a },
{"nbcd", 2, one(0044000), one(0177700), "$s", m68000up },
@@ -2000,59 +2000,59 @@ const struct m68k_opcode m68k_opcodes[] =
/* Traps have to come before conditional sets, as they have a more
specific opcode. */
-{"trapcc", 2, one(0052374), one(0177777), "", m68020up | cpu32 },
-{"trapcs", 2, one(0052774), one(0177777), "", m68020up | cpu32 },
-{"trapeq", 2, one(0053774), one(0177777), "", m68020up | cpu32 },
+{"trapcc", 2, one(0052374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapcs", 2, one(0052774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapeq", 2, one(0053774), one(0177777), "", m68020up | cpu32 | fido_a },
{"tpf", 2, one(0050774), one(0177777), "", mcfisa_a },
-{"trapf", 2, one(0050774), one(0177777), "", m68020up | cpu32 | mcfisa_a },
-{"trapge", 2, one(0056374), one(0177777), "", m68020up | cpu32 },
-{"trapgt", 2, one(0057374), one(0177777), "", m68020up | cpu32 },
-{"traphi", 2, one(0051374), one(0177777), "", m68020up | cpu32 },
-{"traple", 2, one(0057774), one(0177777), "", m68020up | cpu32 },
-{"trapls", 2, one(0051774), one(0177777), "", m68020up | cpu32 },
-{"traplt", 2, one(0056774), one(0177777), "", m68020up | cpu32 },
-{"trapmi", 2, one(0055774), one(0177777), "", m68020up | cpu32 },
-{"trapne", 2, one(0053374), one(0177777), "", m68020up | cpu32 },
-{"trappl", 2, one(0055374), one(0177777), "", m68020up | cpu32 },
-{"trapt", 2, one(0050374), one(0177777), "", m68020up | cpu32 },
-{"trapvc", 2, one(0054374), one(0177777), "", m68020up | cpu32 },
-{"trapvs", 2, one(0054774), one(0177777), "", m68020up | cpu32 },
-
-{"trapccw", 4, one(0052372), one(0177777), "#w", m68020up|cpu32 },
-{"trapcsw", 4, one(0052772), one(0177777), "#w", m68020up|cpu32 },
-{"trapeqw", 4, one(0053772), one(0177777), "#w", m68020up|cpu32 },
+{"trapf", 2, one(0050774), one(0177777), "", m68020up | cpu32 | fido_a | mcfisa_a },
+{"trapge", 2, one(0056374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapgt", 2, one(0057374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"traphi", 2, one(0051374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"traple", 2, one(0057774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapls", 2, one(0051774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"traplt", 2, one(0056774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapmi", 2, one(0055774), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapne", 2, one(0053374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trappl", 2, one(0055374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapt", 2, one(0050374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapvc", 2, one(0054374), one(0177777), "", m68020up | cpu32 | fido_a },
+{"trapvs", 2, one(0054774), one(0177777), "", m68020up | cpu32 | fido_a },
+
+{"trapccw", 4, one(0052372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapcsw", 4, one(0052772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapeqw", 4, one(0053772), one(0177777), "#w", m68020up | cpu32 | fido_a },
{"tpfw", 4, one(0050772), one(0177777), "#w", mcfisa_a},
-{"trapfw", 4, one(0050772), one(0177777), "#w", m68020up|cpu32|mcfisa_a},
-{"trapgew", 4, one(0056372), one(0177777), "#w", m68020up|cpu32 },
-{"trapgtw", 4, one(0057372), one(0177777), "#w", m68020up|cpu32 },
-{"traphiw", 4, one(0051372), one(0177777), "#w", m68020up|cpu32 },
-{"traplew", 4, one(0057772), one(0177777), "#w", m68020up|cpu32 },
-{"traplsw", 4, one(0051772), one(0177777), "#w", m68020up|cpu32 },
-{"trapltw", 4, one(0056772), one(0177777), "#w", m68020up|cpu32 },
-{"trapmiw", 4, one(0055772), one(0177777), "#w", m68020up|cpu32 },
-{"trapnew", 4, one(0053372), one(0177777), "#w", m68020up|cpu32 },
-{"trapplw", 4, one(0055372), one(0177777), "#w", m68020up|cpu32 },
-{"traptw", 4, one(0050372), one(0177777), "#w", m68020up|cpu32 },
-{"trapvcw", 4, one(0054372), one(0177777), "#w", m68020up|cpu32 },
-{"trapvsw", 4, one(0054772), one(0177777), "#w", m68020up|cpu32 },
-
-{"trapccl", 6, one(0052373), one(0177777), "#l", m68020up|cpu32 },
-{"trapcsl", 6, one(0052773), one(0177777), "#l", m68020up|cpu32 },
-{"trapeql", 6, one(0053773), one(0177777), "#l", m68020up|cpu32 },
+{"trapfw", 4, one(0050772), one(0177777), "#w", m68020up | cpu32 | fido_a | mcfisa_a},
+{"trapgew", 4, one(0056372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapgtw", 4, one(0057372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"traphiw", 4, one(0051372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"traplew", 4, one(0057772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"traplsw", 4, one(0051772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapltw", 4, one(0056772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapmiw", 4, one(0055772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapnew", 4, one(0053372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapplw", 4, one(0055372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"traptw", 4, one(0050372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapvcw", 4, one(0054372), one(0177777), "#w", m68020up | cpu32 | fido_a },
+{"trapvsw", 4, one(0054772), one(0177777), "#w", m68020up | cpu32 | fido_a },
+
+{"trapccl", 6, one(0052373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapcsl", 6, one(0052773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapeql", 6, one(0053773), one(0177777), "#l", m68020up | cpu32 | fido_a },
{"tpfl", 6, one(0050773), one(0177777), "#l", mcfisa_a},
-{"trapfl", 6, one(0050773), one(0177777), "#l", m68020up|cpu32|mcfisa_a},
-{"trapgel", 6, one(0056373), one(0177777), "#l", m68020up|cpu32 },
-{"trapgtl", 6, one(0057373), one(0177777), "#l", m68020up|cpu32 },
-{"traphil", 6, one(0051373), one(0177777), "#l", m68020up|cpu32 },
-{"traplel", 6, one(0057773), one(0177777), "#l", m68020up|cpu32 },
-{"traplsl", 6, one(0051773), one(0177777), "#l", m68020up|cpu32 },
-{"trapltl", 6, one(0056773), one(0177777), "#l", m68020up|cpu32 },
-{"trapmil", 6, one(0055773), one(0177777), "#l", m68020up|cpu32 },
-{"trapnel", 6, one(0053373), one(0177777), "#l", m68020up|cpu32 },
-{"trappll", 6, one(0055373), one(0177777), "#l", m68020up|cpu32 },
-{"traptl", 6, one(0050373), one(0177777), "#l", m68020up|cpu32 },
-{"trapvcl", 6, one(0054373), one(0177777), "#l", m68020up|cpu32 },
-{"trapvsl", 6, one(0054773), one(0177777), "#l", m68020up|cpu32 },
+{"trapfl", 6, one(0050773), one(0177777), "#l", m68020up | cpu32 | fido_a | mcfisa_a},
+{"trapgel", 6, one(0056373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapgtl", 6, one(0057373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"traphil", 6, one(0051373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"traplel", 6, one(0057773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"traplsl", 6, one(0051773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapltl", 6, one(0056773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapmil", 6, one(0055773), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapnel", 6, one(0053373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trappll", 6, one(0055373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"traptl", 6, one(0050373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapvcl", 6, one(0054373), one(0177777), "#l", m68020up | cpu32 | fido_a },
+{"trapvsl", 6, one(0054773), one(0177777), "#l", m68020up | cpu32 | fido_a },
{"trapv", 2, one(0047166), one(0177777), "", m68000up },
@@ -2160,11 +2160,11 @@ TBL("tblunb", "tblunw", "tblunl", 0, 0),
{"trapx", 2, one(0047060), one(0177760), "Ts", fido_a },
-{"tstb", 2, one(0045000), one(0177700), ";b", m68020up|cpu32|mcfisa_a },
+{"tstb", 2, one(0045000), one(0177700), ";b", m68020up | cpu32 | fido_a | mcfisa_a },
{"tstb", 2, one(0045000), one(0177700), "$b", m68000up },
-{"tstw", 2, one(0045100), one(0177700), "*w", m68020up|cpu32|mcfisa_a },
+{"tstw", 2, one(0045100), one(0177700), "*w", m68020up | cpu32 | fido_a | mcfisa_a },
{"tstw", 2, one(0045100), one(0177700), "$w", m68000up },
-{"tstl", 2, one(0045200), one(0177700), "*l", m68020up|cpu32|mcfisa_a },
+{"tstl", 2, one(0045200), one(0177700), "*l", m68020up | cpu32 | fido_a | mcfisa_a },
{"tstl", 2, one(0045200), one(0177700), "$l", m68000up },
{"unlk", 2, one(0047130), one(0177770), "As", m68000up | mcfisa_a },