This commit was manufactured by cvs2svn to create branchinterps-20030202-branchpoint

'interps-20030202-branch'.

Sprout from cagney-unwind-20030108-branch 2003-01-09 20:50:26 UTC nobody 'This commit was manufactured by cvs2svn to create branch 'cagney-'
Cherrypick from master 2003-02-02 23:00:06 UTC Alan Modra <amodra@gmail.com> 'daily update':
    ChangeLog
    Makefile.in
    Makefile.tpl
    bfd/ChangeLog
    bfd/Makefile.am
    bfd/Makefile.in
    bfd/aclocal.m4
    bfd/archures.c
    bfd/bfd-in2.h
    bfd/bfd.c
    bfd/coffcode.h
    bfd/config.bfd
    bfd/cpu-sh.c
    bfd/elf-bfd.h
    bfd/elf.c
    bfd/elf32-i386.c
    bfd/elf32-mips.c
    bfd/elf32-ppc.c
    bfd/elf32-s390.c
    bfd/elf32-sh.c
    bfd/elf32-sh64-com.c
    bfd/elf32-sh64.c
    bfd/elf32-sh64.h
    bfd/elf32-sparc.c
    bfd/elf64-alpha.c
    bfd/elf64-mips.c
    bfd/elf64-mmix.c
    bfd/elf64-ppc.c
    bfd/elf64-s390.c
    bfd/elf64-sparc.c
    bfd/elfn32-mips.c
    bfd/elfxx-ia64.c
    bfd/elfxx-mips.c
    bfd/elfxx-mips.h
    bfd/elfxx-target.h
    bfd/libbfd.h
    bfd/opncls.c
    bfd/po/SRC-POTFILES.in
    bfd/reloc.c
    bfd/version.h
    config.if
    configure
    configure.in
    gdb/ChangeLog
    gdb/ChangeLog-2002
    gdb/MAINTAINERS
    gdb/Makefile.in
    gdb/NEWS
    gdb/README
    gdb/acinclude.m4
    gdb/aclocal.m4
    gdb/ada-valprint.c
    gdb/alpha-nat.c
    gdb/alpha-tdep.c
    gdb/alpha-tdep.h
    gdb/ax-gdb.c
    gdb/blockframe.c
    gdb/breakpoint.c
    gdb/breakpoint.h
    gdb/buildsym.c
    gdb/c-exp.y
    gdb/c-valprint.c
    gdb/charset.c
    gdb/cli/cli-decode.h
    gdb/cli/cli-script.c
    gdb/complaints.c
    gdb/complaints.h
    gdb/config.in
    gdb/config/alpha/nm-linux.h
    gdb/config/djgpp/fnchange.lst
    gdb/config/h8500/tm-h8500.h
    gdb/config/i386/tm-ptx.h
    gdb/config/i386/tm-symmetry.h
    gdb/config/i386/xm-i386sco.h
    gdb/config/m68k/nm-apollo68b.h
    gdb/config/m68k/tm-sun3.h
    gdb/config/nm-lynx.h
    gdb/config/ns32k/nm-nbsd.h
    gdb/config/pa/tm-hppa.h
    gdb/config/pa/tm-hppa64.h
    gdb/config/sparc/tm-sp64.h
    gdb/config/sparc/tm-sparc.h
    gdb/configure
    gdb/configure.host
    gdb/configure.in
    gdb/configure.tgt
    gdb/corefile.c
    gdb/corelow.c
    gdb/cp-valprint.c
    gdb/cris-tdep.c
    gdb/d10v-tdep.c
    gdb/dbxread.c
    gdb/defs.h
    gdb/demangle.c
    gdb/disasm.c
    gdb/doc/ChangeLog
    gdb/doc/gdb.texinfo
    gdb/doc/gdbint.texinfo
    gdb/doc/stabs.texinfo
    gdb/dummy-frame.c
    gdb/dummy-frame.h
    gdb/dve3900-rom.c
    gdb/dwarf2cfi.c
    gdb/dwarf2read.c
    gdb/dwarfread.c
    gdb/elfread.c
    gdb/eval.c
    gdb/exec.c
    gdb/expprint.c
    gdb/expression.h
    gdb/f-exp.y
    gdb/f-typeprint.c
    gdb/f-valprint.c
    gdb/findvar.c
    gdb/frame-unwind.c
    gdb/frame-unwind.h
    gdb/frame.c
    gdb/frame.h
    gdb/gcore.c
    gdb/gdb-stabs.h
    gdb/gdb_dirent.h
    gdb/gdb_indent.sh
    gdb/gdb_mbuild.sh
    gdb/gdbarch.c
    gdb/gdbarch.h
    gdb/gdbarch.sh
    gdb/gdbcore.h
    gdb/gdbtypes.c
    gdb/gdbtypes.h
    gdb/gnu-v2-abi.c
    gdb/hppa-tdep.c
    gdb/hppab-nat.c
    gdb/hppah-nat.c
    gdb/hpread.c
    gdb/hpux-thread.c
    gdb/i386v-nat.c
    gdb/infcmd.c
    gdb/inferior.h
    gdb/infrun.c
    gdb/inftarg.c
    gdb/irix4-nat.c
    gdb/jv-typeprint.c
    gdb/language.c
    gdb/language.h
    gdb/lin-lwp.c
    gdb/linespec.c
    gdb/lynx-nat.c
    gdb/m32r-tdep.c
    gdb/m68klinux-nat.c
    gdb/main.c
    gdb/maint.c
    gdb/mdebugread.c
    gdb/mi/ChangeLog
    gdb/mi/gdbmi.texinfo
    gdb/mi/mi-cmd-env.c
    gdb/mi/mi-cmd-var.c
    gdb/mi/mi-main.c
    gdb/mips-nat.c
    gdb/mips-tdep.c
    gdb/mipsv4-nat.c
    gdb/mn10200-tdep.c
    gdb/monitor.c
    gdb/monitor.h
    gdb/objc-exp.y
    gdb/objfiles.c
    gdb/objfiles.h
    gdb/ocd.c
    gdb/parse.c
    gdb/proc-utils.h
    gdb/procfs.c
    gdb/remote-e7000.c
    gdb/remote-mips.c
    gdb/remote-sds.c
    gdb/remote-sim.c
    gdb/remote-vx.c
    gdb/rom68k-rom.c
    gdb/rs6000-nat.c
    gdb/scm-lang.c
    gdb/scm-lang.h
    gdb/sentinel-frame.c
    gdb/sentinel-frame.h
    gdb/ser-go32.c
    gdb/sh-tdep.c
    gdb/solib-svr4.c
    gdb/solib.c
    gdb/somread.c
    gdb/somsolib.c
    gdb/somsolib.h
    gdb/source.c
    gdb/sparc-tdep.c
    gdb/stabsread.c
    gdb/stabsread.h
    gdb/stack.c
    gdb/symfile.c
    gdb/symfile.h
    gdb/symmisc.c
    gdb/symtab.c
    gdb/symtab.h
    gdb/target.c
    gdb/target.h
    gdb/testsuite/ChangeLog
    gdb/testsuite/gdb.arch/altivec-abi.exp
    gdb/testsuite/gdb.arch/altivec-regs.exp
    gdb/testsuite/gdb.asm/arm.inc
    gdb/testsuite/gdb.asm/asm-source.exp
    gdb/testsuite/gdb.base/advance.c
    gdb/testsuite/gdb.base/advance.exp
    gdb/testsuite/gdb.base/args.c
    gdb/testsuite/gdb.base/args.exp
    gdb/testsuite/gdb.base/break.exp
    gdb/testsuite/gdb.base/constvars.exp
    gdb/testsuite/gdb.base/default.exp
    gdb/testsuite/gdb.base/display.exp
    gdb/testsuite/gdb.base/float.exp
    gdb/testsuite/gdb.base/help.exp
    gdb/testsuite/gdb.base/long_long.exp
    gdb/testsuite/gdb.base/mips_pro.exp
    gdb/testsuite/gdb.base/overlays.exp
    gdb/testsuite/gdb.base/printcmds.exp
    gdb/testsuite/gdb.base/relocate.exp
    gdb/testsuite/gdb.base/selftest.exp
    gdb/testsuite/gdb.base/setshow.exp
    gdb/testsuite/gdb.base/step-line.exp
    gdb/testsuite/gdb.base/step-test.exp
    gdb/testsuite/gdb.base/until.exp
    gdb/testsuite/gdb.c++/cplusfuncs.exp
    gdb/testsuite/gdb.c++/demangle.exp
    gdb/testsuite/gdb.c++/inherit.exp
    gdb/testsuite/gdb.c++/local.exp
    gdb/testsuite/gdb.c++/overload.exp
    gdb/testsuite/gdb.c++/printmethod.exp
    gdb/testsuite/gdb.c++/virtfunc.exp
    gdb/testsuite/gdb.mi/gdb669.exp
    gdb/testsuite/gdb.mi/gdb792.exp
    gdb/testsuite/gdb.mi/mi-console.exp
    gdb/testsuite/gdb.mi/mi-pthreads.exp
    gdb/testsuite/gdb.mi/mi-syn-frame.c
    gdb/testsuite/gdb.mi/mi-syn-frame.exp
    gdb/testsuite/gdb.mi/mi-var-child.exp
    gdb/testsuite/gdb.mi/mi-var-display.exp
    gdb/testsuite/gdb.mi/mi1-console.exp
    gdb/testsuite/gdb.mi/mi1-pthreads.exp
    gdb/testsuite/gdb.threads/killed.exp
    gdb/testsuite/lib/gdb.exp
    gdb/testsuite/lib/mi-support.exp
    gdb/thread-db.c
    gdb/thread.c
    gdb/top.c
    gdb/typeprint.c
    gdb/utils.c
    gdb/v850ice.c
    gdb/valarith.c
    gdb/valops.c
    gdb/value.h
    gdb/values.c
    gdb/version.in
    gdb/win32-nat.c
    gdb/x86-64-linux-nat.c
    gdb/x86-64-linux-tdep.c
    gdb/xcoffread.c
    gdb/z8k-tdep.c
    include/ChangeLog
    include/coff/ti.h
    include/coff/tic4x.h
    include/elf/ChangeLog
    include/elf/common.h
    include/elf/mips.h
    include/elf/ppc.h
    include/elf/ppc64.h
    include/elf/s390.h
    include/elf/sh.h
    include/elf/sparc.h
    include/hashtab.h
    include/opcode/ChangeLog
    include/opcode/hppa.h
    include/opcode/m68hc11.h
    include/splay-tree.h
    libiberty/ChangeLog
    libiberty/Makefile.in
    libiberty/configure
    libiberty/configure.in
    libiberty/functions.texi
    libiberty/hashtab.c
    libiberty/pex-common.h
    libiberty/pex-djgpp.c
    libiberty/pex-mpw.c
    libiberty/pex-msdos.c
    libiberty/pex-os2.c
    libiberty/pex-unix.c
    libiberty/pex-win32.c
    libiberty/pexecute.txh
    opcodes/ChangeLog
    opcodes/Makefile.am
    opcodes/Makefile.in
    opcodes/alpha-opc.c
    opcodes/po/POTFILES.in
    opcodes/sh-dis.c
    opcodes/sh-opc.h
    opcodes/sh64-dis.c
    opcodes/sparc-dis.c
    readline/ChangeLog.gdb
    readline/display.c
    sim/arm/ChangeLog
    sim/arm/README
    sim/h8300/ChangeLog
    sim/h8300/compile.c
    sim/mips/ChangeLog
    sim/mips/mips.igen
Delete:
    gdb/a68v-nat.c
    gdb/config/i386/i386dgux.mh
    gdb/config/i386/i386mk.mh
    gdb/config/i386/i386mk.mt
    gdb/config/i386/i386v32.mh
    gdb/config/i386/tm-i386os9k.h
    gdb/config/i386/xm-i386v32.h
    gdb/config/m68k/es1800.mt
    gdb/hp300ux-nat.c
    gdb/mon960-rom.c
    gdb/nindy-share/Makefile
    gdb/nindy-share/Onindy.c
    gdb/nindy-share/README
    gdb/nindy-share/VERSION
    gdb/nindy-share/b.out.h
    gdb/nindy-share/block_io.h
    gdb/nindy-share/coff.h
    gdb/nindy-share/env.h
    gdb/nindy-share/nindy.c
    gdb/nindy-share/stop.h
    gdb/nindy-share/ttyflush.c
    gdb/nindy-tdep.c
    gdb/ptx4-nat.c
    gdb/remote-es.c
    gdb/saber.suppress
    libiberty/pexecute.c
    sim/arm/README.Cygnus

9 files changed, 435 insertions, 334 deletions

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index aaa97d3..a0c083b 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,37 @@
+2003-01-29  Henric Jungheim <henric@attbi.com>
+
+	* sparc-dis.c (print_insn_sparc): When examining values added in
+	to rs1, make sure that there are previous instructions.
+
+2003-01-23  Nick Clifton  <nickc@redhat.com>
+
+	* Add sh2e support:
+
+	2002-04-02  Alexandre Oliva  <aoliva@redhat.com>
+
+		* sh-dis.c (print_insn_shx): Handle bfd_mach_sh2e.
+		* sh-opc.h (arch_sh2e, arch_sh2e_up): New.
+		(arch_sh2_up): Added sh2e.
+		(sh_table): Replaced all occurrences of arch_sh3e_up with
+		arch_sh2e_up, except in fsqrt.
+
+2003-01-23  Alan Modra  <amodra@bigpond.net.au>
+
+	* sh64-dis.c: Include elf32-sh64.h.
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+
+2003-01-17  Richard Henderson  <rth@redhat.com>
+
+	* alpha-opc.c (alpha_opcodes): Add bugchk, rduniq, wruniq, gentrap
+	PAL entry points.
+
+2003-01-16  Alan Modra  <amodra@bigpond.net.au>
+
+	* Makefile.am: Run "make dep-am".
+	* Makefile.in: Regenerate.
+	* po/POTFILES.in: Regenerate.
+
 2003-01-08  Klee Dienes  <kdienes@apple.com>
 
 	* Makefile.am (ALL_MACHINES): Add msp430-dis.lo.
diff --git a/opcodes/Makefile.am b/opcodes/Makefile.am
index 00afec3..d3ecd6f 100644
--- a/opcodes/Makefile.am
+++ b/opcodes/Makefile.am
@@ -518,7 +518,7 @@ arm-dis.lo: arm-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/elf/reloc-macros.h
 avr-dis.lo: avr-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h \
-  $(INCDIR)/opcode/avr.h
+  $(INCDIR)/libiberty.h $(INCDIR)/opcode/avr.h
 cgen-asm.lo: cgen-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \
   $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h opintl.h
@@ -553,10 +553,11 @@ fr30-asm.lo: fr30-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 fr30-desc.lo: fr30-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen.h \
-  fr30-opc.h opintl.h $(INCDIR)/libiberty.h
+  fr30-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h
 fr30-dis.lo: fr30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h \
-  $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  fr30-desc.h $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h
 fr30-ibld.lo: fr30-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h \
   $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/safe-ctype.h
@@ -569,10 +570,11 @@ frv-asm.lo: frv-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 frv-desc.lo: frv-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen.h \
-  frv-opc.h opintl.h $(INCDIR)/libiberty.h
+  frv-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h
 frv-dis.lo: frv-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h frv-desc.h \
-  $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  frv-desc.h $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h
 frv-ibld.lo: frv-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h frv-desc.h \
   $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/safe-ctype.h
@@ -582,7 +584,7 @@ frv-opc.lo: frv-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/elf/reloc-macros.h
 h8300-dis.lo: h8300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h opintl.h
+  $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h
 h8500-dis.lo: h8500-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
   opintl.h
@@ -620,7 +622,7 @@ ia64-gen.lo: ia64-gen.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
   $(INCDIR)/safe-ctype.h sysdep.h config.h $(INCDIR)/getopt.h \
   ia64-opc.h $(INCDIR)/opcode/ia64.h $(BFD_H) $(INCDIR)/symcat.h \
   ia64-opc-a.c ia64-opc-i.c ia64-opc-m.c ia64-opc-b.c \
-  ia64-opc-f.c ia64-opc-x.c ia64-opc-d.c
+  ia64-opc-f.c ia64-opc-x.c ia64-opc-d.c ../intl/libintl.h
 ia64-asmtab.lo: ia64-asmtab.c
 ip2k-asm.lo: ip2k-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen.h \
@@ -628,26 +630,44 @@ ip2k-asm.lo: ip2k-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 ip2k-desc.lo: ip2k-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen.h \
-  ip2k-opc.h opintl.h $(INCDIR)/libiberty.h
+  ip2k-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h
 ip2k-dis.lo: ip2k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h \
-  $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  ip2k-desc.h $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h
 ip2k-ibld.lo: ip2k-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h \
   $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h $(INCDIR)/safe-ctype.h
 ip2k-opc.lo: ip2k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen.h \
-  ip2k-opc.h $(INCDIR)/libiberty.h
+  ip2k-opc.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+iq2000-asm.lo: iq2000-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
+  iq2000-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+iq2000-desc.lo: iq2000-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
+  iq2000-opc.h opintl.h $(INCDIR)/libiberty.h
+iq2000-dis.lo: iq2000-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h \
+  $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h
+iq2000-ibld.lo: iq2000-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h \
+  $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h $(INCDIR)/safe-ctype.h
+iq2000-opc.lo: iq2000-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
+  iq2000-opc.h $(INCDIR)/libiberty.h
 m32r-asm.lo: m32r-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen.h \
   m32r-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 m32r-desc.lo: m32r-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen.h \
-  m32r-opc.h opintl.h $(INCDIR)/libiberty.h
+  m32r-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h
 m32r-dis.lo: m32r-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h \
-  $(INCDIR)/opcode/cgen.h m32r-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  m32r-desc.h $(INCDIR)/opcode/cgen.h m32r-opc.h opintl.h
 m32r-ibld.lo: m32r-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h \
   $(INCDIR)/opcode/cgen.h m32r-opc.h opintl.h $(INCDIR)/safe-ctype.h
@@ -669,14 +689,14 @@ m68k-opc.lo: m68k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/m68k.h
 m88k-dis.lo: m88k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/m88k.h \
-  opintl.h
+  opintl.h $(INCDIR)/libiberty.h
 mcore-dis.lo: mcore-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   mcore-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
 mips-dis.lo: mips-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/mips.h \
-  opintl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
-  $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
-  $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/opcode/mips.h opintl.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h
 mips-opc.lo: mips-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/mips.h
 mips16-opc.lo: mips16-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
@@ -704,10 +724,12 @@ openrisc-asm.lo: openrisc-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 openrisc-desc.lo: openrisc-desc.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
-  $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h $(INCDIR)/libiberty.h
+  $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 openrisc-dis.lo: openrisc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
-  $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  openrisc-desc.h $(INCDIR)/opcode/cgen.h openrisc-opc.h \
+  opintl.h
 openrisc-ibld.lo: openrisc-ibld.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
   openrisc-desc.h $(INCDIR)/opcode/cgen.h openrisc-opc.h \
@@ -744,7 +766,8 @@ sh64-dis.lo: sh64-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
   $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
   sh64-opc.h $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
-  $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
+  $(BFDDIR)/elf32-sh64.h
 sh64-opc.lo: sh64-opc.c sh64-opc.h
 sparc-dis.lo: sparc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/sparc.h $(INCDIR)/dis-asm.h $(BFD_H) \
@@ -781,11 +804,12 @@ xstormy16-asm.lo: xstormy16-asm.c sysdep.h config.h \
   $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 xstormy16-desc.lo: xstormy16-desc.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
-  $(INCDIR)/opcode/cgen.h xstormy16-opc.h opintl.h $(INCDIR)/libiberty.h
+  $(INCDIR)/opcode/cgen.h xstormy16-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 xstormy16-dis.lo: xstormy16-dis.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
-  xstormy16-desc.h $(INCDIR)/opcode/cgen.h xstormy16-opc.h \
-  opintl.h
+  $(INCDIR)/libiberty.h xstormy16-desc.h $(INCDIR)/opcode/cgen.h \
+  xstormy16-opc.h opintl.h
 xstormy16-ibld.lo: xstormy16-ibld.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
   xstormy16-desc.h $(INCDIR)/opcode/cgen.h xstormy16-opc.h \
@@ -795,5 +819,6 @@ xstormy16-opc.lo: xstormy16-opc.c sysdep.h config.h \
   $(INCDIR)/opcode/cgen.h xstormy16-opc.h $(INCDIR)/libiberty.h
 z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h z8k-opc.h
-z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h
+z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/libiberty.h
 # IF YOU PUT ANYTHING HERE IT WILL GO AWAY
diff --git a/opcodes/Makefile.in b/opcodes/Makefile.in
index e935fd4..4939324 100644
--- a/opcodes/Makefile.in
+++ b/opcodes/Makefile.in
@@ -1,4 +1,4 @@
-# Makefile.in generated automatically by automake 1.4-p5 from Makefile.am
+# Makefile.in generated automatically by automake 1.4-p6 from Makefile.am
 
 # Copyright (C) 1994, 1995-8, 1999, 2001 Free Software Foundation, Inc.
 # This Makefile.in is free software; the Free Software Foundation
@@ -404,8 +404,8 @@ noinst_LIBRARIES = libopcodes.a
 POTFILES = $(HFILES) $(CFILES)
 
 CLEANFILES = \
-	stamp-ip2k stamp-iq2000 stamp-m32r stamp-fr30 stamp-frv stamp-openrisc \
-	stamp-xstormy16 \
+	stamp-ip2k stamp-m32r stamp-fr30 stamp-frv stamp-openrisc \
+	stamp-iq2000 stamp-xstormy16 \
 	libopcodes.a stamp-lib dep.sed DEP DEPA DEP1 DEP2
 
 
@@ -425,8 +425,6 @@ CGENDEPS = \
 CGEN_CPUS = fr30 frv ip2k m32r openrisc xstormy16
 @CGEN_MAINT_TRUE@IP2K_DEPS = @CGEN_MAINT_TRUE@stamp-ip2k
 @CGEN_MAINT_FALSE@IP2K_DEPS = 
-@CGEN_MAINT_TRUE@IQ2000_DEPS = @CGEN_MAINT_TRUE@stamp-ip2000
-@CGEN_MAINT_FALSE@IQ2000_DEPS = 
 @CGEN_MAINT_TRUE@M32R_DEPS = @CGEN_MAINT_TRUE@stamp-m32r
 @CGEN_MAINT_FALSE@M32R_DEPS = 
 @CGEN_MAINT_TRUE@FR30_DEPS = @CGEN_MAINT_TRUE@stamp-fr30
@@ -435,6 +433,8 @@ CGEN_CPUS = fr30 frv ip2k m32r openrisc xstormy16
 @CGEN_MAINT_FALSE@FRV_DEPS = 
 @CGEN_MAINT_TRUE@OPENRISC_DEPS = @CGEN_MAINT_TRUE@stamp-openrisc
 @CGEN_MAINT_FALSE@OPENRISC_DEPS = 
+@CGEN_MAINT_TRUE@IQ2000_DEPS = @CGEN_MAINT_TRUE@stamp-iq2000
+@CGEN_MAINT_FALSE@IQ2000_DEPS = 
 @CGEN_MAINT_TRUE@XSTORMY16_DEPS = @CGEN_MAINT_TRUE@stamp-xstormy16
 @CGEN_MAINT_FALSE@XSTORMY16_DEPS = 
 ACLOCAL_M4 = $(top_srcdir)/aclocal.m4
@@ -465,7 +465,7 @@ acinclude.m4 aclocal.m4 config.in configure configure.in
 
 DISTFILES = $(DIST_COMMON) $(SOURCES) $(HEADERS) $(TEXINFOS) $(EXTRA_DIST)
 
-TAR = gtar
+TAR = tar
 GZIP_ENV = --best
 SOURCES = libopcodes.a.c $(libopcodes_la_SOURCES)
 OBJECTS = libopcodes.a.$(OBJEXT) $(libopcodes_la_OBJECTS)
@@ -891,12 +891,6 @@ $(srcdir)/ip2k-desc.h $(srcdir)/ip2k-desc.c $(srcdir)/ip2k-opc.h $(srcdir)/ip2k-
 stamp-ip2k: $(CGENDEPS) $(CPUDIR)/ip2k.cpu $(CPUDIR)/ip2k.opc
 	$(MAKE) run-cgen arch=ip2k prefix=ip2k options= extrafiles=
 
-$(srcdir)/iq2000-desc.h $(srcdir)/iq2000-desc.c $(srcdir)/iq2000-opc.h $(srcdir)/iq2000-opc.c $(srcdir)/iq2000-ibld.c $(srcdir)/iq2000-asm.c $(srcdir)/iq2000-dis.c: $(IQ2000_DEPS)
-	@true
-stamp-iq2000: $(CGENDEPS) $(CPUDIR)/iq2000.cpu $(CPUDIR)/iq2000.opc \
-	$(CPUDIR)/iq2000m.cpu $(CPUDIR)/iq10.cpu
-	$(MAKE) run-cgen arch=iq2000 prefix=iq2000 options= extrafiles=
-
 $(srcdir)/m32r-desc.h $(srcdir)/m32r-desc.c $(srcdir)/m32r-opc.h $(srcdir)/m32r-opc.c $(srcdir)/m32r-ibld.c $(srcdir)/m32r-opinst.c $(srcdir)/m32r-asm.c $(srcdir)/m32r-dis.c: $(M32R_DEPS)
 	@true
 stamp-m32r: $(CGENDEPS) $(CPUDIR)/m32r.cpu $(CPUDIR)/m32r.opc
@@ -917,6 +911,12 @@ $(srcdir)/openrisc-desc.h $(srcdir)/openrisc-desc.c $(srcdir)/openrisc-opc.h $(s
 stamp-openrisc: $(CGENDEPS) $(CPUDIR)/openrisc.cpu $(CPUDIR)/openrisc.opc
 	$(MAKE) run-cgen arch=openrisc prefix=openrisc options= extrafiles=
 
+$(srcdir)/iq2000-desc.h $(srcdir)/iq2000-desc.c $(srcdir)/iq2000-opc.h $(srcdir)/iq2000-opc.c $(srcdir)/iq2000-ibld.c $(srcdir)/iq2000-asm.c $(srcdir)/iq2000-dis.c: $(IQ2000_DEPS)
+	@true
+stamp-iq2000: $(CGENDEPS) $(CPUDIR)/iq2000.cpu $(CPUDIR)/iq2000.opc \
+	$(CPUDIR)/iq2000m.cpu $(CPUDIR)/iq10.cpu
+	$(MAKE) run-cgen arch=iq2000 prefix=iq2000 options= extrafiles=
+
 $(srcdir)/xstormy16-desc.h $(srcdir)/xstormy16-desc.c $(srcdir)/xstormy16-opc.h $(srcdir)/xstormy16-opc.c $(srcdir)/xstormy16-ibld.c $(srcdir)/xstormy16-asm.c $(srcdir)/xstormy16-dis.c: $(XSTORMY16_DEPS)
 	@true
 stamp-xstormy16: $(CGENDEPS) $(CPUDIR)/xstormy16.cpu $(CPUDIR)/xstormy16.opc
@@ -1014,7 +1014,7 @@ arm-dis.lo: arm-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/elf/reloc-macros.h
 avr-dis.lo: avr-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h opintl.h \
-  $(INCDIR)/opcode/avr.h
+  $(INCDIR)/libiberty.h $(INCDIR)/opcode/avr.h
 cgen-asm.lo: cgen-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h $(BFD_H) \
   $(INCDIR)/symcat.h $(INCDIR)/opcode/cgen.h opintl.h
@@ -1049,10 +1049,11 @@ fr30-asm.lo: fr30-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 fr30-desc.lo: fr30-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h $(INCDIR)/opcode/cgen.h \
-  fr30-opc.h opintl.h $(INCDIR)/libiberty.h
+  fr30-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h
 fr30-dis.lo: fr30-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h \
-  $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  fr30-desc.h $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h
 fr30-ibld.lo: fr30-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h fr30-desc.h \
   $(INCDIR)/opcode/cgen.h fr30-opc.h opintl.h $(INCDIR)/safe-ctype.h
@@ -1065,10 +1066,11 @@ frv-asm.lo: frv-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 frv-desc.lo: frv-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h frv-desc.h $(INCDIR)/opcode/cgen.h \
-  frv-opc.h opintl.h $(INCDIR)/libiberty.h
+  frv-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h
 frv-dis.lo: frv-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h frv-desc.h \
-  $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  frv-desc.h $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h
 frv-ibld.lo: frv-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h frv-desc.h \
   $(INCDIR)/opcode/cgen.h frv-opc.h opintl.h $(INCDIR)/safe-ctype.h
@@ -1078,7 +1080,7 @@ frv-opc.lo: frv-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/elf/reloc-macros.h
 h8300-dis.lo: h8300-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/h8300.h $(INCDIR)/dis-asm.h $(BFD_H) \
-  $(INCDIR)/symcat.h opintl.h
+  $(INCDIR)/symcat.h opintl.h $(INCDIR)/libiberty.h
 h8500-dis.lo: h8500-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   h8500-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
   opintl.h
@@ -1116,7 +1118,7 @@ ia64-gen.lo: ia64-gen.c $(INCDIR)/ansidecl.h $(INCDIR)/libiberty.h \
   $(INCDIR)/safe-ctype.h sysdep.h config.h $(INCDIR)/getopt.h \
   ia64-opc.h $(INCDIR)/opcode/ia64.h $(BFD_H) $(INCDIR)/symcat.h \
   ia64-opc-a.c ia64-opc-i.c ia64-opc-m.c ia64-opc-b.c \
-  ia64-opc-f.c ia64-opc-x.c ia64-opc-d.c
+  ia64-opc-f.c ia64-opc-x.c ia64-opc-d.c ../intl/libintl.h
 ia64-asmtab.lo: ia64-asmtab.c
 ip2k-asm.lo: ip2k-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen.h \
@@ -1124,43 +1126,44 @@ ip2k-asm.lo: ip2k-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 ip2k-desc.lo: ip2k-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen.h \
-  ip2k-opc.h opintl.h $(INCDIR)/libiberty.h
+  ip2k-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h
 ip2k-dis.lo: ip2k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h \
-  $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  ip2k-desc.h $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h
 ip2k-ibld.lo: ip2k-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h \
   $(INCDIR)/opcode/cgen.h ip2k-opc.h opintl.h $(INCDIR)/safe-ctype.h
 ip2k-opc.lo: ip2k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h ip2k-desc.h $(INCDIR)/opcode/cgen.h \
-  ip2k-opc.h $(INCDIR)/libiberty.h
-iq2000-asm.lo: iq2000-asm.c sysdep.h config.h $(BFD_H) \
-  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h iq2000-desc.h \
-  $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h
-iq2000-desc.lo: iq2000-desc.c sysdep.h config.h $(BFD_H) \
-  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h iq2000-desc.h \
+  ip2k-opc.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+iq2000-asm.lo: iq2000-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
+  iq2000-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
+  $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
+iq2000-desc.lo: iq2000-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
+  iq2000-opc.h opintl.h $(INCDIR)/libiberty.h
+iq2000-dis.lo: iq2000-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h \
   $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h
-iq2000-dis.lo: iq2000-dis.c sysdep.h config.h $(INCDIR)/dis-asm.h \
-  $(BFD_H) $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
-  iq2000-opc.h opintl.h
-iq2000-ibld.lo: iq2000-ibld.c sysdep.h config.h $(INCDIR)/dis-asm.h \
-  $(BFD_H) $(INCDIR)/ansidecl.h \
-  $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
-  iq2000-opc.h opintl.h
-iq2000-opc.lo: iq2000-opc.c sysdep.h config.h $(BFD_H) \
-  $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h iq2000-desc.h \
-  $(INCDIR)/opcode/cgen.h iq2000-opc.h
+iq2000-ibld.lo: iq2000-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h \
+  $(INCDIR)/opcode/cgen.h iq2000-opc.h opintl.h $(INCDIR)/safe-ctype.h
+iq2000-opc.lo: iq2000-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(BFD_H) $(INCDIR)/symcat.h iq2000-desc.h $(INCDIR)/opcode/cgen.h \
+  iq2000-opc.h $(INCDIR)/libiberty.h
 m32r-asm.lo: m32r-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen.h \
   m32r-opc.h opintl.h $(INCDIR)/xregex.h $(INCDIR)/xregex2.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 m32r-desc.lo: m32r-desc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h $(INCDIR)/opcode/cgen.h \
-  m32r-opc.h opintl.h $(INCDIR)/libiberty.h
+  m32r-opc.h opintl.h $(INCDIR)/libiberty.h $(INCDIR)/xregex.h \
+  $(INCDIR)/xregex2.h
 m32r-dis.lo: m32r-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h \
-  $(INCDIR)/opcode/cgen.h m32r-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  m32r-desc.h $(INCDIR)/opcode/cgen.h m32r-opc.h opintl.h
 m32r-ibld.lo: m32r-ibld.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h m32r-desc.h \
   $(INCDIR)/opcode/cgen.h m32r-opc.h opintl.h $(INCDIR)/safe-ctype.h
@@ -1182,14 +1185,14 @@ m68k-opc.lo: m68k-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/m68k.h
 m88k-dis.lo: m88k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/m88k.h \
-  opintl.h
+  opintl.h $(INCDIR)/libiberty.h
 mcore-dis.lo: mcore-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   mcore-opc.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h
 mips-dis.lo: mips-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/opcode/mips.h \
-  opintl.h $(BFDDIR)/elf-bfd.h $(INCDIR)/elf/common.h \
-  $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h $(INCDIR)/bfdlink.h \
-  $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/opcode/mips.h opintl.h $(BFDDIR)/elf-bfd.h \
+  $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
+  $(INCDIR)/bfdlink.h $(INCDIR)/elf/mips.h $(INCDIR)/elf/reloc-macros.h
 mips-opc.lo: mips-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/mips.h
 mips16-opc.lo: mips16-opc.c sysdep.h config.h $(INCDIR)/ansidecl.h \
@@ -1217,10 +1220,12 @@ openrisc-asm.lo: openrisc-asm.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 openrisc-desc.lo: openrisc-desc.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
-  $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h $(INCDIR)/libiberty.h
+  $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 openrisc-dis.lo: openrisc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
-  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h openrisc-desc.h \
-  $(INCDIR)/opcode/cgen.h openrisc-opc.h opintl.h
+  $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h $(INCDIR)/libiberty.h \
+  openrisc-desc.h $(INCDIR)/opcode/cgen.h openrisc-opc.h \
+  opintl.h
 openrisc-ibld.lo: openrisc-ibld.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
   openrisc-desc.h $(INCDIR)/opcode/cgen.h openrisc-opc.h \
@@ -1257,7 +1262,8 @@ sh64-dis.lo: sh64-dis.c $(INCDIR)/dis-asm.h $(BFD_H) \
   $(INCDIR)/ansidecl.h $(INCDIR)/symcat.h sysdep.h config.h \
   sh64-opc.h $(INCDIR)/libiberty.h $(BFDDIR)/elf-bfd.h \
   $(INCDIR)/elf/common.h $(INCDIR)/elf/internal.h $(INCDIR)/elf/external.h \
-  $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h
+  $(INCDIR)/bfdlink.h $(INCDIR)/elf/sh.h $(INCDIR)/elf/reloc-macros.h \
+  $(BFDDIR)/elf32-sh64.h
 sh64-opc.lo: sh64-opc.c sh64-opc.h
 sparc-dis.lo: sparc-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/opcode/sparc.h $(INCDIR)/dis-asm.h $(BFD_H) \
@@ -1294,11 +1300,12 @@ xstormy16-asm.lo: xstormy16-asm.c sysdep.h config.h \
   $(INCDIR)/xregex2.h $(INCDIR)/libiberty.h $(INCDIR)/safe-ctype.h
 xstormy16-desc.lo: xstormy16-desc.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(BFD_H) $(INCDIR)/symcat.h xstormy16-desc.h \
-  $(INCDIR)/opcode/cgen.h xstormy16-opc.h opintl.h $(INCDIR)/libiberty.h
+  $(INCDIR)/opcode/cgen.h xstormy16-opc.h opintl.h $(INCDIR)/libiberty.h \
+  $(INCDIR)/xregex.h $(INCDIR)/xregex2.h
 xstormy16-dis.lo: xstormy16-dis.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
-  xstormy16-desc.h $(INCDIR)/opcode/cgen.h xstormy16-opc.h \
-  opintl.h
+  $(INCDIR)/libiberty.h xstormy16-desc.h $(INCDIR)/opcode/cgen.h \
+  xstormy16-opc.h opintl.h
 xstormy16-ibld.lo: xstormy16-ibld.c sysdep.h config.h \
   $(INCDIR)/ansidecl.h $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h \
   xstormy16-desc.h $(INCDIR)/opcode/cgen.h xstormy16-opc.h \
@@ -1308,7 +1315,8 @@ xstormy16-opc.lo: xstormy16-opc.c sysdep.h config.h \
   $(INCDIR)/opcode/cgen.h xstormy16-opc.h $(INCDIR)/libiberty.h
 z8k-dis.lo: z8k-dis.c sysdep.h config.h $(INCDIR)/ansidecl.h \
   $(INCDIR)/dis-asm.h $(BFD_H) $(INCDIR)/symcat.h z8k-opc.h
-z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h
+z8kgen.lo: z8kgen.c sysdep.h config.h $(INCDIR)/ansidecl.h \
+  $(INCDIR)/libiberty.h
 # IF YOU PUT ANYTHING HERE IT WILL GO AWAY
 
 # Tell versions [3.59,3.63) of GNU make to not export all variables.
diff --git a/opcodes/alpha-opc.c b/opcodes/alpha-opc.c
index 6cf7d4c..8dc10e4 100644
--- a/opcodes/alpha-opc.c
+++ b/opcodes/alpha-opc.c
@@ -533,9 +533,13 @@ const struct alpha_opcode alpha_opcodes[] = {
   { "halt",		SPCD(0x00,0x0000), BASE, ARG_NONE },
   { "draina",		SPCD(0x00,0x0002), BASE, ARG_NONE },
   { "bpt",		SPCD(0x00,0x0080), BASE, ARG_NONE },
+  { "bugchk",		SPCD(0x00,0x0081), BASE, ARG_NONE },
   { "callsys",		SPCD(0x00,0x0083), BASE, ARG_NONE },
   { "chmk", 		SPCD(0x00,0x0083), BASE, ARG_NONE },
   { "imb",		SPCD(0x00,0x0086), BASE, ARG_NONE },
+  { "rduniq",		SPCD(0x00,0x009e), BASE, ARG_NONE },
+  { "wruniq",		SPCD(0x00,0x009f), BASE, ARG_NONE },
+  { "gentrap",		SPCD(0x00,0x00aa), BASE, ARG_NONE },
   { "call_pal",		PCD(0x00), BASE, ARG_PCD },
   { "pal",		PCD(0x00), BASE, ARG_PCD },		/* alias */
 
diff --git a/opcodes/po/POTFILES.in b/opcodes/po/POTFILES.in
index 861e410..9a14a1d 100644
--- a/opcodes/po/POTFILES.in
+++ b/opcodes/po/POTFILES.in
@@ -61,6 +61,13 @@ ip2k-dis.c
 ip2k-ibld.c
 ip2k-opc.c
 ip2k-opc.h
+iq2000-asm.c
+iq2000-desc.c
+iq2000-desc.h
+iq2000-dis.c
+iq2000-ibld.c
+iq2000-opc.c
+iq2000-opc.h
 m10200-dis.c
 m10200-opc.c
 m10300-dis.c
diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c
index 966a10e..a23110f 100644
--- a/opcodes/sh-dis.c
+++ b/opcodes/sh-dis.c
@@ -1,20 +1,20 @@
 /* Disassemble SH instructions.
-   Copyright 1993, 1994, 1995, 1997, 1998, 2000, 2001, 2002
+   Copyright 1993, 1994, 1995, 1997, 1998, 2000, 2001, 2002, 2003
    Free Software Foundation, Inc.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
 
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 #include <stdio.h>
 #include "sysdep.h"
@@ -315,6 +315,9 @@ print_insn_sh (memaddr, info)
     case bfd_mach_sh2:
       target_arch = arch_sh2;
       break;
+    case bfd_mach_sh2e:
+      target_arch = arch_sh2e;
+      break;
     case bfd_mach_sh_dsp:
       target_arch = arch_sh_dsp;
       break;
diff --git a/opcodes/sh-opc.h b/opcodes/sh-opc.h
index 21f64dd..f415e5e 100644
--- a/opcodes/sh-opc.h
+++ b/opcodes/sh-opc.h
@@ -1,167 +1,176 @@
 /* Definitions for SH opcodes.
-   Copyright 1993, 1994, 1995, 1997, 1999, 2000
+   Copyright 1993, 1994, 1995, 1997, 1999, 2000, 2003
    Free Software Foundation, Inc.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
-
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
-
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
-
-typedef enum {
-	HEX_0,
-	HEX_1,
-	HEX_2,
-	HEX_3,
-	HEX_4,
-	HEX_5,
-	HEX_6,
-	HEX_7,
-	HEX_8,
-	HEX_9,
-	HEX_A,
-	HEX_B,
-	HEX_C,
-	HEX_D,
-	HEX_E,
-	HEX_F,
-	REG_N,
-	REG_M,
-	SDT_REG_N,
-	REG_NM,
-        REG_B,
-	BRANCH_12,
-	BRANCH_8,
-	IMM0_4,
-	IMM0_4BY2,
-	IMM0_4BY4,
-	IMM1_4,
-	IMM1_4BY2,
-	IMM1_4BY4,
-	PCRELIMM_8BY2,
-	PCRELIMM_8BY4,
-	IMM0_8,
-	IMM0_8BY2,
-	IMM0_8BY4,
-	IMM1_8,
-	IMM1_8BY2,
-	IMM1_8BY4,
-	PPI,
-	NOPX,
-	NOPY,
-	MOVX,
-	MOVY,
-	PSH,
-	PMUL,
-	PPI3,
-	PDC,
-	PPIC,
-	REPEAT
-} sh_nibble_type;
-
-typedef enum {
-	A_END,
-	A_BDISP12,
-	A_BDISP8,
-	A_DEC_M,
-	A_DEC_N,
-	A_DISP_GBR,
-	A_PC,
-	A_DISP_PC,
-	A_DISP_PC_ABS,
-	A_DISP_REG_M,
-	A_DISP_REG_N,
-	A_GBR,
-	A_IMM,
-	A_INC_M,
-	A_INC_N,
-	A_IND_M,
-	A_IND_N,
-	A_PMOD_N,
-	A_PMODY_N,
-	A_IND_R0_REG_M,
-	A_IND_R0_REG_N,
-	A_MACH,
-	A_MACL,
-	A_PR,
-	A_R0,
-	A_R0_GBR,
-	A_REG_M,
-	A_REG_N,
-	A_REG_B,
-	A_SR,
-	A_VBR,
-	A_MOD,
-	A_RE,
-	A_RS,
-	A_DSR,
-	DSP_REG_M,
-	DSP_REG_N,
-	DSP_REG_X,
-	DSP_REG_Y,
-	DSP_REG_E,
-	DSP_REG_F,
-	DSP_REG_G,
-	A_A0,
-	A_X0,
-	A_X1,
-	A_Y0,
-	A_Y1,
-	A_SSR,
-	A_SPC,
-	A_SGR,
-	A_DBR,
-	F_REG_N,
-	F_REG_M,
-	D_REG_N,
-	D_REG_M,
-	X_REG_N, /* Only used for argument parsing */
-	X_REG_M, /* Only used for argument parsing */
-	DX_REG_N,
-	DX_REG_M,
-	V_REG_N,
-	V_REG_M,
-	XMTRX_M4,
-	F_FR0,
-	FPUL_N,
-	FPUL_M,
-	FPSCR_N,
-	FPSCR_M
-} sh_arg_type;
-
-typedef enum {
-  A_A1_NUM =   5,
-  A_A0_NUM =   7,
-  A_X0_NUM, A_X1_NUM, A_Y0_NUM, A_Y1_NUM,
-  A_M0_NUM, A_A1G_NUM, A_M1_NUM, A_A0G_NUM
-} sh_dsp_reg_nums;
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
+
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
+
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+
+typedef enum
+  {
+    HEX_0,
+    HEX_1,
+    HEX_2,
+    HEX_3,
+    HEX_4,
+    HEX_5,
+    HEX_6,
+    HEX_7,
+    HEX_8,
+    HEX_9,
+    HEX_A,
+    HEX_B,
+    HEX_C,
+    HEX_D,
+    HEX_E,
+    HEX_F,
+    REG_N,
+    REG_M,
+    SDT_REG_N,
+    REG_NM,
+    REG_B,
+    BRANCH_12,
+    BRANCH_8,
+    IMM0_4,
+    IMM0_4BY2,
+    IMM0_4BY4,
+    IMM1_4,
+    IMM1_4BY2,
+    IMM1_4BY4,
+    PCRELIMM_8BY2,
+    PCRELIMM_8BY4,
+    IMM0_8,
+    IMM0_8BY2,
+    IMM0_8BY4,
+    IMM1_8,
+    IMM1_8BY2,
+    IMM1_8BY4,
+    PPI,
+    NOPX,
+    NOPY,
+    MOVX,
+    MOVY,
+    PSH,
+    PMUL,
+    PPI3,
+    PDC,
+    PPIC,
+    REPEAT
+  }
+sh_nibble_type;
+
+typedef enum
+  {
+    A_END,
+    A_BDISP12,
+    A_BDISP8,
+    A_DEC_M,
+    A_DEC_N,
+    A_DISP_GBR,
+    A_PC,
+    A_DISP_PC,
+    A_DISP_PC_ABS,
+    A_DISP_REG_M,
+    A_DISP_REG_N,
+    A_GBR,
+    A_IMM,
+    A_INC_M,
+    A_INC_N,
+    A_IND_M,
+    A_IND_N,
+    A_PMOD_N,
+    A_PMODY_N,
+    A_IND_R0_REG_M,
+    A_IND_R0_REG_N,
+    A_MACH,
+    A_MACL,
+    A_PR,
+    A_R0,
+    A_R0_GBR,
+    A_REG_M,
+    A_REG_N,
+    A_REG_B,
+    A_SR,
+    A_VBR,
+    A_MOD,
+    A_RE,
+    A_RS,
+    A_DSR,
+    DSP_REG_M,
+    DSP_REG_N,
+    DSP_REG_X,
+    DSP_REG_Y,
+    DSP_REG_E,
+    DSP_REG_F,
+    DSP_REG_G,
+    A_A0,
+    A_X0,
+    A_X1,
+    A_Y0,
+    A_Y1,
+    A_SSR,
+    A_SPC,
+    A_SGR,
+    A_DBR,
+    F_REG_N,
+    F_REG_M,
+    D_REG_N,
+    D_REG_M,
+    X_REG_N, /* Only used for argument parsing.  */
+    X_REG_M, /* Only used for argument parsing.  */
+    DX_REG_N,
+    DX_REG_M,
+    V_REG_N,
+    V_REG_M,
+    XMTRX_M4,
+    F_FR0,
+    FPUL_N,
+    FPUL_M,
+    FPSCR_N,
+    FPSCR_M
+  }
+sh_arg_type;
+
+typedef enum
+  {
+    A_A1_NUM =   5,
+    A_A0_NUM =   7,
+    A_X0_NUM, A_X1_NUM, A_Y0_NUM, A_Y1_NUM,
+    A_M0_NUM, A_A1G_NUM, A_M1_NUM, A_A0G_NUM
+  }
+sh_dsp_reg_nums;
 
 #define arch_sh1     0x0001
 #define arch_sh2     0x0002
 #define arch_sh3     0x0004
 #define arch_sh3e    0x0008
 #define arch_sh4     0x0010
+#define arch_sh2e    0x0020
 #define arch_sh_dsp  0x0100
 #define arch_sh3_dsp 0x0200
 
-#define arch_sh1_up (arch_sh1 | arch_sh2_up)
-#define arch_sh2_up (arch_sh2 | arch_sh3_up | arch_sh_dsp)
-#define arch_sh3_up (arch_sh3 | arch_sh3e_up | arch_sh3_dsp)
+#define arch_sh1_up  (arch_sh1 | arch_sh2_up)
+#define arch_sh2_up  (arch_sh2 | arch_sh2e_up | arch_sh3_up | arch_sh_dsp)
+#define arch_sh2e_up (arch_sh2e | arch_sh3e_up)
+#define arch_sh3_up  (arch_sh3 | arch_sh3e_up | arch_sh3_dsp)
 #define arch_sh3e_up (arch_sh3e | arch_sh4_up)
-#define arch_sh4_up arch_sh4
+#define arch_sh4_up  arch_sh4
 
 #define arch_sh_dsp_up (arch_sh_dsp | arch_sh3_dsp_up)
 #define arch_sh3_dsp_up arch_sh3_dsp
 
-typedef struct {
+typedef struct
+{
   char *name;
   sh_arg_type arg[4];
   sh_nibble_type nibbles[4];
@@ -170,8 +179,8 @@ typedef struct {
 
 #ifdef DEFINE_TABLE
 
-const sh_opcode_info sh_table[] = {
-
+const sh_opcode_info sh_table[] =
+  {
 /* 0111nnnni8*1.... add #<imm>,<REG_N>  */{"add",{A_IMM,A_REG_N},{HEX_7,REG_N,IMM0_8}, arch_sh1_up},
 
 /* 0011nnnnmmmm1100 add <REG_M>,<REG_N> */{"add",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_C}, arch_sh1_up},
@@ -306,9 +315,9 @@ const sh_opcode_info sh_table[] = {
 
 /* 0100nnnn10111010 lds <REG_N>,Y1	*/{"lds",{A_REG_N,A_Y1},{HEX_4,REG_N,HEX_B,HEX_A}, arch_sh_dsp_up},
 
-/* 0100nnnn01011010 lds <REG_N>,FPUL    */{"lds",{A_REG_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_A}, arch_sh3e_up},
-
-/* 0100nnnn01101010 lds <REG_M>,FPSCR   */{"lds",{A_REG_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_A}, arch_sh3e_up},
+/* 0100nnnn01011010 lds <REG_N>,FPUL    */{"lds",{A_REG_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_A}, arch_sh2e_up},
+  
+/* 0100nnnn01101010 lds <REG_M>,FPSCR   */{"lds",{A_REG_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_A}, arch_sh2e_up},
 
 /* 0100nnnn00000110 lds.l @<REG_N>+,MACH*/{"lds.l",{A_INC_N,A_MACH},{HEX_4,REG_N,HEX_0,HEX_6}, arch_sh1_up},
 
@@ -328,9 +337,9 @@ const sh_opcode_info sh_table[] = {
 
 /* 0100nnnn10110110 lds.l @<REG_N>+,Y1	*/{"lds.l",{A_INC_N,A_Y1},{HEX_4,REG_N,HEX_B,HEX_6}, arch_sh_dsp_up},
 
-/* 0100nnnn01010110 lds.l @<REG_M>+,FPUL*/{"lds.l",{A_INC_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_6}, arch_sh3e_up},
-
-/* 0100nnnn01100110 lds.l @<REG_M>+,FPSCR*/{"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}, arch_sh3e_up},
+/* 0100nnnn01010110 lds.l @<REG_M>+,FPUL*/{"lds.l",{A_INC_M,FPUL_N},{HEX_4,REG_M,HEX_5,HEX_6}, arch_sh2e_up},
+  
+/* 0100nnnn01100110 lds.l @<REG_M>+,FPSCR*/{"lds.l",{A_INC_M,FPSCR_N},{HEX_4,REG_M,HEX_6,HEX_6}, arch_sh2e_up},
 
 /* 0000000000111000 ldtlb               */{"ldtlb",{0},{HEX_0,HEX_0,HEX_3,HEX_8}, arch_sh3_up},
 
@@ -551,9 +560,9 @@ const sh_opcode_info sh_table[] = {
 
 /* 0000nnnn10111010 sts Y1,<REG_N>	*/{"sts",{A_Y1,A_REG_N},{HEX_0,REG_N,HEX_B,HEX_A}, arch_sh_dsp_up},
 
-/* 0000nnnn01011010 sts FPUL,<REG_N>    */{"sts",{FPUL_M,A_REG_N},{HEX_0,REG_N,HEX_5,HEX_A}, arch_sh3e_up},
-
-/* 0000nnnn01101010 sts FPSCR,<REG_N>   */{"sts",{FPSCR_M,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_A}, arch_sh3e_up},
+/* 0000nnnn01011010 sts FPUL,<REG_N>    */{"sts",{FPUL_M,A_REG_N},{HEX_0,REG_N,HEX_5,HEX_A}, arch_sh2e_up},
+  
+/* 0000nnnn01101010 sts FPSCR,<REG_N>   */{"sts",{FPSCR_M,A_REG_N},{HEX_0,REG_N,HEX_6,HEX_A}, arch_sh2e_up},
 
 /* 0100nnnn00000010 sts.l MACH,@-<REG_N>*/{"sts.l",{A_MACH,A_DEC_N},{HEX_4,REG_N,HEX_0,HEX_2}, arch_sh1_up},
 
@@ -573,9 +582,9 @@ const sh_opcode_info sh_table[] = {
 
 /* 0100nnnn10110110 sts.l Y1,@-<REG_N>	*/{"sts.l",{A_Y1,A_DEC_N},{HEX_4,REG_N,HEX_B,HEX_2}, arch_sh_dsp_up},
 
-/* 0100nnnn01010010 sts.l FPUL,@-<REG_N>*/{"sts.l",{FPUL_M,A_DEC_N},{HEX_4,REG_N,HEX_5,HEX_2}, arch_sh3e_up},
-
-/* 0100nnnn01100010 sts.l FPSCR,@-<REG_N>*/{"sts.l",{FPSCR_M,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_2}, arch_sh3e_up},
+/* 0100nnnn01010010 sts.l FPUL,@-<REG_N>*/{"sts.l",{FPUL_M,A_DEC_N},{HEX_4,REG_N,HEX_5,HEX_2}, arch_sh2e_up},
+  
+/* 0100nnnn01100010 sts.l FPSCR,@-<REG_N>*/{"sts.l",{FPSCR_M,A_DEC_N},{HEX_4,REG_N,HEX_6,HEX_2}, arch_sh2e_up},
 
 /* 0011nnnnmmmm1000 sub <REG_M>,<REG_N> */{"sub",{ A_REG_M,A_REG_N},{HEX_3,REG_N,REG_M,HEX_8}, arch_sh1_up},
 
@@ -736,57 +745,57 @@ const sh_opcode_info sh_table[] = {
 /* 11111101xxyynnnn plds <DSP_REG_N>,MACL */
 {"plds", {DSP_REG_N,A_MACL},{PPI,PPIC,HEX_F,HEX_D}, arch_sh_dsp_up},
 
-/* 1111nnnn01011101 fabs <F_REG_N>     */{"fabs",{F_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh3e_up},
+/* 1111nnnn01011101 fabs <F_REG_N>     */{"fabs",{F_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh2e_up},
 /* 1111nnnn01011101 fabs <D_REG_N>     */{"fabs",{D_REG_N},{HEX_F,REG_N,HEX_5,HEX_D}, arch_sh4_up},
 
-/* 1111nnnnmmmm0000 fadd <F_REG_M>,<F_REG_N>*/{"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh3e_up},
+/* 1111nnnnmmmm0000 fadd <F_REG_M>,<F_REG_N>*/{"fadd",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh2e_up},
 /* 1111nnn0mmm00000 fadd <D_REG_M>,<D_REG_N>*/{"fadd",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_0}, arch_sh4_up},
 
-/* 1111nnnnmmmm0100 fcmp/eq <F_REG_M>,<F_REG_N>*/{"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh3e_up},
+/* 1111nnnnmmmm0100 fcmp/eq <F_REG_M>,<F_REG_N>*/{"fcmp/eq",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh2e_up},
 /* 1111nnn0mmm00100 fcmp/eq <D_REG_M>,<D_REG_N>*/{"fcmp/eq",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_4}, arch_sh4_up},
 
-/* 1111nnnnmmmm0101 fcmp/gt <F_REG_M>,<F_REG_N>*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh3e_up},
+/* 1111nnnnmmmm0101 fcmp/gt <F_REG_M>,<F_REG_N>*/{"fcmp/gt",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh2e_up},
 /* 1111nnn0mmm00101 fcmp/gt <D_REG_M>,<D_REG_N>*/{"fcmp/gt",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_5}, arch_sh4_up},
 
 /* 1111nnn010111101 fcnvds <D_REG_N>,FPUL*/{"fcnvds",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_B,HEX_D}, arch_sh4_up},
 
 /* 1111nnn010101101 fcnvsd FPUL,<D_REG_N>*/{"fcnvsd",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_A,HEX_D}, arch_sh4_up},
 
-/* 1111nnnnmmmm0011 fdiv <F_REG_M>,<F_REG_N>*/{"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh3e_up},
+/* 1111nnnnmmmm0011 fdiv <F_REG_M>,<F_REG_N>*/{"fdiv",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh2e_up},
 /* 1111nnn0mmm00011 fdiv <D_REG_M>,<D_REG_N>*/{"fdiv",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_3}, arch_sh4_up},
 
 /* 1111nnmm11101101 fipr <V_REG_M>,<V_REG_N>*/{"fipr",{V_REG_M,V_REG_N},{HEX_F,REG_NM,HEX_E,HEX_D}, arch_sh4_up},
 
-/* 1111nnnn10001101 fldi0 <F_REG_N>    */{"fldi0",{F_REG_N},{HEX_F,REG_N,HEX_8,HEX_D}, arch_sh3e_up},
+/* 1111nnnn10001101 fldi0 <F_REG_N>    */{"fldi0",{F_REG_N},{HEX_F,REG_N,HEX_8,HEX_D}, arch_sh2e_up},
 
-/* 1111nnnn10011101 fldi1 <F_REG_N>    */{"fldi1",{F_REG_N},{HEX_F,REG_N,HEX_9,HEX_D}, arch_sh3e_up},
+/* 1111nnnn10011101 fldi1 <F_REG_N>    */{"fldi1",{F_REG_N},{HEX_F,REG_N,HEX_9,HEX_D}, arch_sh2e_up},
 
-/* 1111nnnn00011101 flds <F_REG_N>,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}, arch_sh3e_up},
+/* 1111nnnn00011101 flds <F_REG_N>,FPUL*/{"flds",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_1,HEX_D}, arch_sh2e_up},
 
-/* 1111nnnn00101101 float FPUL,<F_REG_N>*/{"float",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh3e_up},
+/* 1111nnnn00101101 float FPUL,<F_REG_N>*/{"float",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh2e_up},
 /* 1111nnnn00101101 float FPUL,<D_REG_N>*/{"float",{FPUL_M,D_REG_N},{HEX_F,REG_N,HEX_2,HEX_D}, arch_sh4_up},
 
-/* 1111nnnnmmmm1110 fmac FR0,<F_REG_M>,<F_REG_N>*/{"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}, arch_sh3e_up},
+/* 1111nnnnmmmm1110 fmac FR0,<F_REG_M>,<F_REG_N>*/{"fmac",{F_FR0,F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_E}, arch_sh2e_up},
 
-/* 1111nnnnmmmm1100 fmov <F_REG_M>,<F_REG_N>*/{"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh3e_up},
+/* 1111nnnnmmmm1100 fmov <F_REG_M>,<F_REG_N>*/{"fmov",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh2e_up},
 /* 1111nnnnmmmm1100 fmov <DX_REG_M>,<DX_REG_N>*/{"fmov",{DX_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_C}, arch_sh4_up},
 
-/* 1111nnnnmmmm1000 fmov @<REG_M>,<F_REG_N>*/{"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh3e_up},
+/* 1111nnnnmmmm1000 fmov @<REG_M>,<F_REG_N>*/{"fmov",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh2e_up},
 /* 1111nnnnmmmm1000 fmov @<REG_M>,<DX_REG_N>*/{"fmov",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh4_up},
 
-/* 1111nnnnmmmm1010 fmov <F_REG_M>,@<REG_N>*/{"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh3e_up},
+/* 1111nnnnmmmm1010 fmov <F_REG_M>,@<REG_N>*/{"fmov",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2e_up},
 /* 1111nnnnmmmm1010 fmov <DX_REG_M>,@<REG_N>*/{"fmov",{DX_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh4_up},
 
-/* 1111nnnnmmmm1001 fmov @<REG_M>+,<F_REG_N>*/{"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh3e_up},
+/* 1111nnnnmmmm1001 fmov @<REG_M>+,<F_REG_N>*/{"fmov",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh2e_up},
 /* 1111nnnnmmmm1001 fmov @<REG_M>+,<DX_REG_N>*/{"fmov",{A_INC_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh4_up},
 
-/* 1111nnnnmmmm1011 fmov <F_REG_M>,@-<REG_N>*/{"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh3e_up},
+/* 1111nnnnmmmm1011 fmov <F_REG_M>,@-<REG_N>*/{"fmov",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2e_up},
 /* 1111nnnnmmmm1011 fmov <DX_REG_M>,@-<REG_N>*/{"fmov",{DX_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh4_up},
 
-/* 1111nnnnmmmm0110 fmov @(R0,<REG_M>),<F_REG_N>*/{"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh3e_up},
+/* 1111nnnnmmmm0110 fmov @(R0,<REG_M>),<F_REG_N>*/{"fmov",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh2e_up},
 /* 1111nnnnmmmm0110 fmov @(R0,<REG_M>),<DX_REG_N>*/{"fmov",{A_IND_R0_REG_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh4_up},
 
-/* 1111nnnnmmmm0111 fmov <F_REG_M>,@(R0,<REG_N>)*/{"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh3e_up},
+/* 1111nnnnmmmm0111 fmov <F_REG_M>,@(R0,<REG_N>)*/{"fmov",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2e_up},
 /* 1111nnnnmmmm0111 fmov <DX_REG_M>,@(R0,<REG_N>)*/{"fmov",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh4_up},
 
 /* 1111nnnnmmmm1000 fmov.d @<REG_M>,<DX_REG_N>*/{"fmov.d",{A_IND_M,DX_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh4_up},
@@ -801,22 +810,22 @@ const sh_opcode_info sh_table[] = {
 
 /* 1111nnnnmmmm0111 fmov.d <DX_REG_M>,@(R0,<REG_N>)*/{"fmov.d",{DX_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh4_up},
 
-/* 1111nnnnmmmm1000 fmov.s @<REG_M>,<F_REG_N>*/{"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh3e_up},
+/* 1111nnnnmmmm1000 fmov.s @<REG_M>,<F_REG_N>*/{"fmov.s",{A_IND_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_8}, arch_sh2e_up},
 
-/* 1111nnnnmmmm1010 fmov.s <F_REG_M>,@<REG_N>*/{"fmov.s",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh3e_up},
+/* 1111nnnnmmmm1010 fmov.s <F_REG_M>,@<REG_N>*/{"fmov.s",{F_REG_M,A_IND_N},{HEX_F,REG_N,REG_M,HEX_A}, arch_sh2e_up},
 
-/* 1111nnnnmmmm1001 fmov.s @<REG_M>+,<F_REG_N>*/{"fmov.s",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh3e_up},
+/* 1111nnnnmmmm1001 fmov.s @<REG_M>+,<F_REG_N>*/{"fmov.s",{A_INC_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_9}, arch_sh2e_up},
 
-/* 1111nnnnmmmm1011 fmov.s <F_REG_M>,@-<REG_N>*/{"fmov.s",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh3e_up},
+/* 1111nnnnmmmm1011 fmov.s <F_REG_M>,@-<REG_N>*/{"fmov.s",{F_REG_M,A_DEC_N},{HEX_F,REG_N,REG_M,HEX_B}, arch_sh2e_up},
 
-/* 1111nnnnmmmm0110 fmov.s @(R0,<REG_M>),<F_REG_N>*/{"fmov.s",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh3e_up},
+/* 1111nnnnmmmm0110 fmov.s @(R0,<REG_M>),<F_REG_N>*/{"fmov.s",{A_IND_R0_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_6}, arch_sh2e_up},
 
-/* 1111nnnnmmmm0111 fmov.s <F_REG_M>,@(R0,<REG_N>)*/{"fmov.s",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh3e_up},
+/* 1111nnnnmmmm0111 fmov.s <F_REG_M>,@(R0,<REG_N>)*/{"fmov.s",{F_REG_M,A_IND_R0_REG_N},{HEX_F,REG_N,REG_M,HEX_7}, arch_sh2e_up},
 
-/* 1111nnnnmmmm0010 fmul <F_REG_M>,<F_REG_N>*/{"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}, arch_sh3e_up},
+/* 1111nnnnmmmm0010 fmul <F_REG_M>,<F_REG_N>*/{"fmul",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_2}, arch_sh2e_up},
 /* 1111nnn0mmm00010 fmul <D_REG_M>,<D_REG_N>*/{"fmul",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_2}, arch_sh4_up},
 
-/* 1111nnnn01001101 fneg <F_REG_N>     */{"fneg",{F_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh3e_up},
+/* 1111nnnn01001101 fneg <F_REG_N>     */{"fneg",{F_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh2e_up},
 /* 1111nnnn01001101 fneg <D_REG_N>     */{"fneg",{D_REG_N},{HEX_F,REG_N,HEX_4,HEX_D}, arch_sh4_up},
 
 /* 1111101111111101 frchg               */{"frchg",{0},{HEX_F,HEX_B,HEX_F,HEX_D}, arch_sh4_up},
@@ -826,12 +835,12 @@ const sh_opcode_info sh_table[] = {
 /* 1111nnnn01101101 fsqrt <F_REG_N>    */{"fsqrt",{F_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh3e_up},
 /* 1111nnnn01101101 fsqrt <D_REG_N>    */{"fsqrt",{D_REG_N},{HEX_F,REG_N,HEX_6,HEX_D}, arch_sh4_up},
 
-/* 1111nnnn00001101 fsts FPUL,<F_REG_N>*/{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}, arch_sh3e_up},
+/* 1111nnnn00001101 fsts FPUL,<F_REG_N>*/{"fsts",{FPUL_M,F_REG_N},{HEX_F,REG_N,HEX_0,HEX_D}, arch_sh2e_up},
 
-/* 1111nnnnmmmm0001 fsub <F_REG_M>,<F_REG_N>*/{"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh3e_up},
+/* 1111nnnnmmmm0001 fsub <F_REG_M>,<F_REG_N>*/{"fsub",{F_REG_M,F_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh2e_up},
 /* 1111nnn0mmm00001 fsub <D_REG_M>,<D_REG_N>*/{"fsub",{D_REG_M,D_REG_N},{HEX_F,REG_N,REG_M,HEX_1}, arch_sh4_up},
 
-/* 1111nnnn00111101 ftrc <F_REG_N>,FPUL*/{"ftrc",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh3e_up},
+/* 1111nnnn00111101 ftrc <F_REG_N>,FPUL*/{"ftrc",{F_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh2e_up},
 /* 1111nnnn00111101 ftrc <D_REG_N>,FPUL*/{"ftrc",{D_REG_N,FPUL_M},{HEX_F,REG_N,HEX_3,HEX_D}, arch_sh4_up},
 
 /* 1111nn0111111101 ftrv XMTRX_M4,<V_REG_n>*/{"ftrv",{XMTRX_M4,V_REG_N},{HEX_F,REG_NM,HEX_F,HEX_D}, arch_sh4_up},
diff --git a/opcodes/sh64-dis.c b/opcodes/sh64-dis.c
index 631678c..063c261 100644
--- a/opcodes/sh64-dis.c
+++ b/opcodes/sh64-dis.c
@@ -1,5 +1,5 @@
 /* Disassemble SH64 instructions.
-   Copyright 2000, 2001, 2002 Free Software Foundation, Inc.
+   Copyright 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
 
    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
@@ -25,6 +25,7 @@
 /* We need to refer to the ELF header structure.  */
 #include "elf-bfd.h"
 #include "elf/sh.h"
+#include "elf32-sh64.h"
 
 #define ELF_MODE32_CODE_LABEL_P(SYM) \
  (((elf_symbol_type *) (SYM))->internal_elf_sym.st_other & STO_SH5_ISA32)
diff --git a/opcodes/sparc-dis.c b/opcodes/sparc-dis.c
index 47ebb31..c68df38 100644
--- a/opcodes/sparc-dis.c
+++ b/opcodes/sparc-dis.c
@@ -1,20 +1,20 @@
 /* Print SPARC instructions.
    Copyright 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
-   2000, 2002 Free Software Foundation, Inc.
+   2000, 2002, 2003 Free Software Foundation, Inc.
 
-This program is free software; you can redistribute it and/or modify
-it under the terms of the GNU General Public License as published by
-the Free Software Foundation; either version 2 of the License, or
-(at your option) any later version.
+   This program is free software; you can redistribute it and/or modify
+   it under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 2 of the License, or
+   (at your option) any later version.
 
-This program is distributed in the hope that it will be useful,
-but WITHOUT ANY WARRANTY; without even the implied warranty of
-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-GNU General Public License for more details.
+   This program is distributed in the hope that it will be useful,
+   but WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+   GNU General Public License for more details.
 
-You should have received a copy of the GNU General Public License
-along with this program; if not, write to the Free Software
-Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
+   You should have received a copy of the GNU General Public License
+   along with this program; if not, write to the Free Software
+   Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.  */
 
 #include <stdio.h>
 
@@ -46,7 +46,8 @@ static const struct sparc_opcode **sorted_opcodes;
 static int opcode_bits[4] = { 0x01c00000, 0x0, 0x01f80000, 0x01f80000 };
 #define HASH_INSN(INSN) \
   ((((INSN) >> 24) & 0xc0) | (((INSN) & opcode_bits[((INSN) >> 30) & 3]) >> 19))
-struct opcode_hash {
+struct opcode_hash
+{
   struct opcode_hash *next;
   const struct sparc_opcode *opcode;
 };
@@ -257,7 +258,7 @@ print_insn_sparc (memaddr, info)
   }
 
   /* On SPARClite variants such as DANlite (sparc86x), instructions
-     are always big-endian even when the machine is in little-endian mode. */
+     are always big-endian even when the machine is in little-endian mode.  */
   if (info->endian == BFD_ENDIAN_BIG || info->mach == bfd_mach_sparc_sparclite)
     getword = bfd_getb32;
   else
@@ -265,10 +266,10 @@ print_insn_sparc (memaddr, info)
 
   insn = getword (buffer);
 
-  info->insn_info_valid = 1;			/* We do return this info */
-  info->insn_type = dis_nonbranch;		/* Assume non branch insn */
-  info->branch_delay_insns = 0;			/* Assume no delay */
-  info->target = 0;				/* Assume no target known */
+  info->insn_info_valid = 1;			/* We do return this info.  */
+  info->insn_type = dis_nonbranch;		/* Assume non branch insn.  */
+  info->branch_delay_insns = 0;			/* Assume no delay.  */
+  info->target = 0;				/* Assume no target known.  */
 
   for (op = opcode_hash_table[HASH_INSN (insn)]; op; op = op->next)
     {
@@ -316,32 +317,34 @@ print_insn_sparc (memaddr, info)
 
 	    if (opcode->args[0] != ',')
 	      (*info->fprintf_func) (stream, " ");
+
 	    for (s = opcode->args; *s != '\0'; ++s)
 	      {
 		while (*s == ',')
 		  {
 		    (*info->fprintf_func) (stream, ",");
 		    ++s;
-		    switch (*s) {
-		    case 'a':
-		      (*info->fprintf_func) (stream, "a");
-		      is_annulled = 1;
-		      ++s;
-		      continue;
-		    case 'N':
-		      (*info->fprintf_func) (stream, "pn");
-		      ++s;
-		      continue;
-
-		    case 'T':
-		      (*info->fprintf_func) (stream, "pt");
-		      ++s;
-		      continue;
-
-		    default:
-		      break;
-		    }		/* switch on arg */
-		  }		/* while there are comma started args */
+		    switch (*s)
+		      {
+		      case 'a':
+			(*info->fprintf_func) (stream, "a");
+			is_annulled = 1;
+			++s;
+			continue;
+		      case 'N':
+			(*info->fprintf_func) (stream, "pn");
+			++s;
+			continue;
+
+		      case 'T':
+			(*info->fprintf_func) (stream, "pt");
+			++s;
+			continue;
+
+		      default:
+			break;
+		      }
+		  }
 
 		(*info->fprintf_func) (stream, " ");
 			
@@ -682,26 +685,33 @@ print_insn_sparc (memaddr, info)
 	      unsigned long prev_insn;
 	      int errcode;
 
-	      errcode =
-		(*info->read_memory_func)
+	      if (memaddr >= 4)
+		errcode =
+		  (*info->read_memory_func)
 		  (memaddr - 4, buffer, sizeof (buffer), info);
+	      else
+		errcode = 1;
+
 	      prev_insn = getword (buffer);
 
 	      if (errcode == 0)
 		{
 		  /* If it is a delayed branch, we need to look at the
 		     instruction before the delayed branch.  This handles
-		     sequences such as
+		     sequences such as:
 
 		     sethi %o1, %hi(_foo), %o1
 		     call _printf
-		     or %o1, %lo(_foo), %o1
-		     */
+		     or %o1, %lo(_foo), %o1  */
 
 		  if (is_delayed_branch (prev_insn))
 		    {
-		      errcode = (*info->read_memory_func)
-			(memaddr - 8, buffer, sizeof (buffer), info);
+		      if (memaddr >= 8)
+			errcode = (*info->read_memory_func)
+			  (memaddr - 8, buffer, sizeof (buffer), info);
+		      else
+			errcode = 1;
+
 		      prev_insn = getword (buffer);
 		    }
 		}
@@ -746,7 +756,7 @@ print_insn_sparc (memaddr, info)
 	}
     }
 
-  info->insn_type = dis_noninsn;	/* Mark as non-valid instruction */
+  info->insn_type = dis_noninsn;	/* Mark as non-valid instruction.  */
   (*info->fprintf_func) (stream, _("unknown"));
   return sizeof (buffer);
 }