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| author | Tamar Christina <tamar.christina@arm.com> | 2018-10-19 10:31:42 +0100 |
|---|---|---|
| committer | Tamar Christina <tamar.christina@arm.com> | 2018-10-19 10:33:11 +0100 |
| commit | 0b347048e7e33070212a408dc2371075ee60b556 (patch) | |
| tree | 55dfcb25a5e55e764242fab9898b76cde0f92e12 /opcodes | |
| parent | 33d64ca5db656f1f377de18f94403d8b3b91e3a1 (diff) | |
| download | gdb-0b347048e7e33070212a408dc2371075ee60b556.zip gdb-0b347048e7e33070212a408dc2371075ee60b556.tar.gz gdb-0b347048e7e33070212a408dc2371075ee60b556.tar.bz2 | |
Arm: Fix disassembler crashing on -b binary when thumb file and thumb not forced.
The disassembler for Arm has some aborts in it in places it assumes can never
be reached. Under normal circumstances they indeed cannot be reached because
the right options are selected from the ARM attributes in the ELF file.
However when disassembling with -b binary then if you do not get the options
right the disassembler just aborts. This changes it so it just prints how it
was trying to interpret the instruction and prints UNKNOWN instructions next to it.
This way the user has an idea of what's going.
gas/ChangeLog:
* testsuite/gas/arm/undefined-insn-arm.d: New test.
* testsuite/gas/arm/undefined-insn-thumb.d: New test.
* testsuite/gas/arm/undefined-insn.s: New test.
opcodes/ChangeLog:
* arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode.
(UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode.
(print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them.
Diffstat (limited to 'opcodes')
| -rw-r--r-- | opcodes/ChangeLog | 6 | ||||
| -rw-r--r-- | opcodes/arm-dis.c | 11 |
2 files changed, 14 insertions, 3 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 4f5e200..3d26869 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,9 @@ +2018-10-19 Tamar Christina <tamar.christina@arm.com> + + * arm-dis.c (UNKNOWN_INSTRUCTION_32BIT): Format specifier for arm mode. + (UNKNOWN_INSTRUCTION_16BIT): Format specifier for thumb mode. + (print_insn_arm, print_insn_thumb16, print_insn_thumb32): Use them. + 2018-10-16 Matthew Malcomson <matthew.malcomson@arm.com> * aarch64-opc.c (struct operand_qualifier_data): Change qualifier data diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index f22a78f..f0b9051 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -141,6 +141,8 @@ enum opcode_sentinel_enum } opcode_sentinels; #define UNDEFINED_INSTRUCTION "\t\t; <UNDEFINED> instruction: %0-31x" +#define UNKNOWN_INSTRUCTION_32BIT "\t\t; <UNDEFINED> instruction: %08x" +#define UNKNOWN_INSTRUCTION_16BIT "\t\t; <UNDEFINED> instruction: %04x" #define UNPREDICTABLE_INSTRUCTION "\t; <UNPREDICTABLE>" /* Common coprocessor opcodes shared between Arm and Thumb-2. */ @@ -5194,7 +5196,8 @@ print_insn_arm (bfd_vma pc, struct disassemble_info *info, long given) return; } } - abort (); + func (stream, UNKNOWN_INSTRUCTION_32BIT, (unsigned)given); + return; } /* Print one 16-bit Thumb instruction from PC on INFO->STREAM. */ @@ -5465,7 +5468,8 @@ print_insn_thumb16 (bfd_vma pc, struct disassemble_info *info, long given) } /* No match. */ - abort (); + func (stream, UNKNOWN_INSTRUCTION_16BIT, (unsigned)given); + return; } /* Return the name of an V7M special register. */ @@ -6089,7 +6093,8 @@ print_insn_thumb32 (bfd_vma pc, struct disassemble_info *info, long given) } /* No match. */ - abort (); + func (stream, UNKNOWN_INSTRUCTION_32BIT, (unsigned)given); + return; } /* Print data bytes on INFO->STREAM. */ |