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authorQuentin Neill <quentin.neill@amd.com>2011-04-19 23:45:17 +0000
committerQuentin Neill <quentin.neill@amd.com>2011-04-19 23:45:17 +0000
commitb13a3ca6832172b400d9dc68551672f1530b7d62 (patch)
tree2814cf7d53d33d4dce6d10ca727334f52141c8cc /opcodes
parent7a9dd1b270ed6fa1dbf81ef4aea857e7947e9d44 (diff)
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* i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
from bdver1 flags.
Diffstat (limited to 'opcodes')
-rw-r--r--opcodes/ChangeLog5
-rw-r--r--opcodes/i386-gen.c2
2 files changed, 6 insertions, 1 deletions
diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index ad85706..d3aad8a 100644
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,3 +1,8 @@
+2011-04-19 Quentin Neill <quentin.neill@amd.com>
+
+ * i386-gen.c (cpu_flag_init): Remove 3dnow and 3dnowa bits
+ from bdver1 flags.
+
2011-04-13 Nick Clifton <nickc@redhat.com>
* v850-dis.c (disassemble): Always print a closing square brace if
diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c
index e791c61..d4adcf8 100644
--- a/opcodes/i386-gen.c
+++ b/opcodes/i386-gen.c
@@ -89,7 +89,7 @@ static initializer cpu_flag_init[] =
{ "CPU_AMDFAM10_FLAGS",
"Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM" },
{ "CPU_BDVER1_FLAGS",
- "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|Cpu3dnow|Cpu3dnowA|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" },
+ "Cpu186|Cpu286|Cpu386|Cpu486|Cpu586|Cpu686|CpuSYSCALL|CpuRdtscp|Cpu387|Cpu687|CpuFISTTP|CpuNop|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSE4a|CpuABM|CpuLM|CpuFMA4|CpuXOP|CpuLWP" },
{ "CPU_8087_FLAGS",
"Cpu8087" },
{ "CPU_287_FLAGS",