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| author | Nick Clifton <nickc@redhat.com> | 2011-05-19 11:10:59 +0000 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2011-05-19 11:10:59 +0000 |
| commit | fda544a25cc0bc04691f5f97dc27d66eb5bb5212 (patch) | |
| tree | 2030baa650274f697ddab3b2392849222e87d7c8 /opcodes/v850-opc.c | |
| parent | 3672b1be0a861d0ad31d79ce63f038a96e1bd1a2 (diff) | |
| download | gdb-fda544a25cc0bc04691f5f97dc27d66eb5bb5212.zip gdb-fda544a25cc0bc04691f5f97dc27d66eb5bb5212.tar.gz gdb-fda544a25cc0bc04691f5f97dc27d66eb5bb5212.tar.bz2 | |
* v850-opc.c (cmpf.[sd]): Reverse the order of the reg1 and reg2
operands.
Diffstat (limited to 'opcodes/v850-opc.c')
| -rw-r--r-- | opcodes/v850-opc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c index eea427c..67ba562 100644 --- a/opcodes/v850-opc.c +++ b/opcodes/v850-opc.c @@ -1205,10 +1205,10 @@ const struct v850_opcode v850_opcodes[] = { "cmovf.s", two (0x07e0, 0x0400), two (0x07e0, 0x07f1), {FFF, R1, R2, R3_NOTR0}, 0, PROCESSOR_V850E2V3 }, /* Default value for FFF is 0(not defined in spec). */ { "cmovf.s", two (0x07e0, 0x0400), two (0x07e0, 0x07ff), {R1, R2, R3_NOTR0}, 0, PROCESSOR_V850E2V3 }, -{ "cmpf.d", two (0x07e0, 0x0430), two (0x0fe1, 0x87f1), {FLOAT_CCCC, R1_EVEN, R2_EVEN, FFF}, 0, PROCESSOR_V850E2V3 }, -{ "cmpf.d", two (0x07e0, 0x0430), two (0x0fe1, 0x87ff), {FLOAT_CCCC, R1_EVEN, R2_EVEN}, 0, PROCESSOR_V850E2V3 }, -{ "cmpf.s", two (0x07e0, 0x0420), two (0x07e0, 0x87f1), {FLOAT_CCCC, R1, R2, FFF}, 0, PROCESSOR_V850E2V3 }, -{ "cmpf.s", two (0x07e0, 0x0420), two (0x07e0, 0x87ff), {FLOAT_CCCC, R1, R2}, 0, PROCESSOR_V850E2V3 }, +{ "cmpf.d", two (0x07e0, 0x0430), two (0x0fe1, 0x87f1), {FLOAT_CCCC, R2_EVEN, R1_EVEN, FFF}, 0, PROCESSOR_V850E2V3 }, +{ "cmpf.d", two (0x07e0, 0x0430), two (0x0fe1, 0x87ff), {FLOAT_CCCC, R2_EVEN, R1_EVEN}, 0, PROCESSOR_V850E2V3 }, +{ "cmpf.s", two (0x07e0, 0x0420), two (0x07e0, 0x87f1), {FLOAT_CCCC, R2, R1, FFF}, 0, PROCESSOR_V850E2V3 }, +{ "cmpf.s", two (0x07e0, 0x0420), two (0x07e0, 0x87ff), {FLOAT_CCCC, R2, R1}, 0, PROCESSOR_V850E2V3 }, { "cvtf.dl", two (0x07e4, 0x0454), two (0x0fff, 0x0fff), {R2_EVEN, R3_EVEN}, 0, PROCESSOR_V850E2V3 }, { "cvtf.ds", two (0x07e3, 0x0452), two (0x0fff, 0x07ff), {R2_EVEN, R3}, 0, PROCESSOR_V850E2V3 }, { "cvtf.dul", two (0x07f4, 0x0454), two (0x0fff, 0x0fff), {R2_EVEN, R3_EVEN}, 0, PROCESSOR_V850E2V3 }, |