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authorJeff Law <law@redhat.com>1996-08-22 02:08:02 +0000
committerJeff Law <law@redhat.com>1996-08-22 02:08:02 +0000
commit7c8157dd489806688d37bd20b3bf43944b764cca (patch)
treee2707ed6735999e51b6a11cfeffb5298427f25c9 /opcodes/v850-opc.c
parentfed1d21fc0c3ed467c99e04c69555f279b7ec534 (diff)
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* v850-opc.c (v850_operands): Add "B3" support.
(v850_opcodes): Fix and enable "set1", "clr1", "not1" and "tst1".
Diffstat (limited to 'opcodes/v850-opc.c')
-rw-r--r--opcodes/v850-opc.c16
1 files changed, 9 insertions, 7 deletions
diff --git a/opcodes/v850-opc.c b/opcodes/v850-opc.c
index 3a99f03..bf3baaa 100644
--- a/opcodes/v850-opc.c
+++ b/opcodes/v850-opc.c
@@ -51,7 +51,11 @@ const struct v850_operand v850_operands[] = {
/* The DISP22 field in a format 4 insn. */
#define D22 (D16+1)
- { 16, 0, OPERAND_NUM }
+ { 16, 0, OPERAND_NUM },
+
+#define B3 (D22+1)
+/* The 3 bit immediate field in format 8 insn. */
+ { 3, 3, OPERAND_NUM }
} ;
@@ -172,13 +176,11 @@ const struct v850_opcode v850_opcodes[] = {
{ "jarl", one(0x0780), one(0xf83f), { R2,D22 } },
{ "jr", one(0x0780), one(0xffe0), { D22 } },
-#if 0
/* bit manipulation instructions */
-{ "set1", one(0x07c0), one(0xc7e0), {B3, R1, D16} },
-{ "not1", one(0x47c0), one(0xc7e0), {B3, R1, D16} },
-{ "clr1", one(0x87c0), one(0xc7e0), {B3, R1, D16} },
-{ "tst1", one(0xc7c0), one(0xc7e0), {B3, R1, D16} },
-#endif
+{ "set1", two(0x07c0,0x0000), two(0xc7e0,0x0000), {B3, R1, D16} },
+{ "not1", two(0x47c0,0x0000), two(0xc7e0,0x0000), {B3, R1, D16} },
+{ "clr1", two(0x87c0,0x0000), two(0xc7e0,0x0000), {B3, R1, D16} },
+{ "tst1", two(0xc7c0,0x0000), two(0xc7e0,0x0000), {B3, R1, D16} },
/* special instructions */
{ "di", two(0x07e0,0x0160), two(0xffff,0xffff), {0} },