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authorJeff Law <law@redhat.com>1996-08-31 20:56:05 +0000
committerJeff Law <law@redhat.com>1996-08-31 20:56:05 +0000
commit502535cff728b070ac9d121cfb2394551b9cd73b (patch)
tree5d5b836fdb22debb11fea1e730a0396eb16f7536 /opcodes/v850-dis.c
parenta0a36aa08535f52a9862a867fd5cb8a39393d8fa (diff)
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* v850-dis.c (v850_reg_names): Define.
(v850_sreg_names, v850_cc_names): Likewise. (disassemble): Very rough cut at printing operands (unformatted). One step at a time. * v850-opc.c (BOP_MASK): Fix. (v850_opcodes): Fix mask for jarl and jr. Bugs exposed by disassembler testing.
Diffstat (limited to 'opcodes/v850-dis.c')
-rw-r--r--opcodes/v850-dis.c52
1 files changed, 52 insertions, 0 deletions
diff --git a/opcodes/v850-dis.c b/opcodes/v850-dis.c
index 3ee3959..413e5e9 100644
--- a/opcodes/v850-dis.c
+++ b/opcodes/v850-dis.c
@@ -22,6 +22,23 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
#include "opcode/v850.h"
#include "dis-asm.h"
+static const char *const v850_reg_names[] =
+{ "r0", "r1", "r2", "sp", "gp", "r5", "r6", "r7",
+ "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
+ "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
+ "r24", "r25", "r26", "r27", "r28", "r29", "ep", "r31" };
+
+static const char *const v850_sreg_names[] =
+{ "eipc", "eipsw", "fepc", "fepsw", "ecr", "psw", "sr6", "sr7",
+ "sr8", "sr9", "sr10", "sr11", "sr12", "sr13", "sr14", "sr15",
+ "sr16", "sr17", "sr18", "sr19", "sr20", "sr21", "sr22", "sr23",
+ "sr24", "sr25", "sr26", "sr27", "sr28", "sr29", "sr30", "sr31" };
+
+static const char *const v850_cc_names[] =
+{ "v", "c/l", "z", "nh", "s/n", "t", "lt", "le",
+ "nv", "nc/nl", "nz", "h", "ns/p", "sa", "lt", "ge",
+ "le", "gt" };
+
int
print_insn_v850 (memaddr, info)
bfd_vma memaddr;
@@ -51,6 +68,7 @@ disassemble (insn, info)
struct disassemble_info *info;
{
struct v850_opcode *op = (struct v850_opcode *)v850_opcodes;
+ const struct v850_operand *operand;
int match = 0;
/* If this is a two byte insn, then mask off the high bits. */
if ((insn & 0x0600) != 0x0600)
@@ -61,8 +79,42 @@ disassemble (insn, info)
{
if ((op->mask & insn) == op->opcode)
{
+ const unsigned char *opindex_ptr;
+
match = 1;
(*info->fprintf_func) (info->stream, "%s\t", op->name);
+
+ /* Now print the operands. */
+ for (opindex_ptr = op->operands; *opindex_ptr != 0; opindex_ptr++)
+ {
+ unsigned long value;
+
+ operand = &v850_operands[*opindex_ptr];
+
+ if (operand->extract)
+ value = (operand->extract) (insn, 0);
+ else
+ value = (insn >> operand->shift) & ((1 << operand->bits) - 1);
+
+ if ((operand->flags & V850_OPERAND_SIGNED) != 0)
+ value = ((signed long)(value << (32 - operand->bits))
+ >> (32 - operand->bits));
+ if ((operand->flags & V850_OPERAND_REG) != 0)
+ (*info->fprintf_func) (info->stream, "%s",
+ v850_reg_names[value]);
+ else if ((operand->flags & V850_OPERAND_SRG) != 0)
+ (*info->fprintf_func) (info->stream, "%s",
+ v850_sreg_names[value]);
+ else if ((operand->flags & V850_OPERAND_CC) != 0)
+ (*info->fprintf_func) (info->stream, "%s",
+ v850_cc_names[value]);
+ else if ((operand->flags & V850_OPERAND_EP) != 0)
+ (*info->fprintf_func) (info->stream, "ep");
+ else
+ (*info->fprintf_func) (info->stream, "%d", value);
+ }
+
+ /* All done. */
break;
}
op++;