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| author | Scott Bambrough <scottb@netwinder.org> | 2000-06-01 19:07:54 +0000 |
|---|---|---|
| committer | Scott Bambrough <scottb@netwinder.org> | 2000-06-01 19:07:54 +0000 |
| commit | a6836251f636c0cb1078966331647d70376208ed (patch) | |
| tree | 5a23d5f6e2a94d6e7997bb30f6145773aded6a08 /opcodes/tic80-opc.c | |
| parent | 3903e627f366251cede71c48c67b4f214b1cdcf4 (diff) | |
| download | gdb-a6836251f636c0cb1078966331647d70376208ed.zip gdb-a6836251f636c0cb1078966331647d70376208ed.tar.gz gdb-a6836251f636c0cb1078966331647d70376208ed.tar.bz2 | |
The ARM assembler is not assembling the following instruction
correctly.
mrs lr, spsr
The string pointer is advanced to far before the check to set
the SPSR bit.
Thu Jun 01 2000 Scott Bambrough <scottb@netwinder.org>
* config/tc-arm.c (do_mrs): Allow SPSR_BIT to be set correctly.
Diffstat (limited to 'opcodes/tic80-opc.c')
0 files changed, 0 insertions, 0 deletions