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| author | H.J. Lu <hjl.tools@gmail.com> | 2015-08-12 04:45:07 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2015-08-12 04:45:07 -0700 |
| commit | 43e65147c07b1400ae0dbb6694882eceb2363713 (patch) | |
| tree | e52d56a58d00c74db6c82e736464ab0f500a7181 /opcodes/spu-opc.c | |
| parent | f3445b37b67deb8f67f7885274b2544684503f78 (diff) | |
| download | gdb-43e65147c07b1400ae0dbb6694882eceb2363713.zip gdb-43e65147c07b1400ae0dbb6694882eceb2363713.tar.gz gdb-43e65147c07b1400ae0dbb6694882eceb2363713.tar.bz2 | |
Remove trailing spaces in opcodes
Diffstat (limited to 'opcodes/spu-opc.c')
| -rw-r--r-- | opcodes/spu-opc.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/opcodes/spu-opc.c b/opcodes/spu-opc.c index f93d5b2..b5d803f 100644 --- a/opcodes/spu-opc.c +++ b/opcodes/spu-opc.c @@ -26,9 +26,9 @@ /* Example contents of spu-insn.h - id_tag mode mode type opcode mnemonic asmtype dependency FPU L/S? branch? instruction - QUAD WORD (0,RC,RB,RA,RT) latency - APUOP(M_LQD, 1, 0, RI9, 0x1f8, "lqd", ASM_RI9IDX, 00012, FXU, 1, 0) Load Quadword d-form + id_tag mode mode type opcode mnemonic asmtype dependency FPU L/S? branch? instruction + QUAD WORD (0,RC,RB,RA,RT) latency + APUOP(M_LQD, 1, 0, RI9, 0x1f8, "lqd", ASM_RI9IDX, 00012, FXU, 1, 0) Load Quadword d-form */ const struct spu_opcode spu_opcodes[] = { |