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author | David Edelsohn <dje.gcc@gmail.com> | 1997-07-24 20:05:46 +0000 |
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committer | David Edelsohn <dje.gcc@gmail.com> | 1997-07-24 20:05:46 +0000 |
commit | 3f9382002f1d3bb18e02e5ad5dd041985e1bc758 (patch) | |
tree | 5aa383b460360c21d58ba7153850350e6e5efe27 /opcodes/sparc-opc.c | |
parent | 9239dc2640d5106d28ae41b4ae5924151bff77f6 (diff) | |
download | gdb-3f9382002f1d3bb18e02e5ad5dd041985e1bc758.zip gdb-3f9382002f1d3bb18e02e5ad5dd041985e1bc758.tar.gz gdb-3f9382002f1d3bb18e02e5ad5dd041985e1bc758.tar.bz2 |
* sparc-opc.c (sparc_opcodes): Fix spelling on fpaddX, fpsubX insns.
Diffstat (limited to 'opcodes/sparc-opc.c')
-rw-r--r-- | opcodes/sparc-opc.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/opcodes/sparc-opc.c b/opcodes/sparc-opc.c index 2df9537..e46f683 100644 --- a/opcodes/sparc-opc.c +++ b/opcodes/sparc-opc.c @@ -1612,14 +1612,14 @@ IMPDEP ("impdep2", 0x37), { "shutdown", F3F(2, 0x36, 0x080), F3F(~2, ~0x36, ~0x080)|RD_G0|RS1_G0|RS2_G0, "", 0, v9a }, /* FIXME: Do we want to mark these as F_FLOAT, or something similar? */ -{ "fadd16", F3F(2, 0x36, 0x050), F3F(~2, ~0x36, ~0x050), "v,B,H", 0, v9a }, -{ "fadd16s", F3F(2, 0x36, 0x051), F3F(~2, ~0x36, ~0x051), "e,f,g", 0, v9a }, -{ "fadd32", F3F(2, 0x36, 0x052), F3F(~2, ~0x36, ~0x052), "v,B,H", 0, v9a }, -{ "fadd32s", F3F(2, 0x36, 0x053), F3F(~2, ~0x36, ~0x053), "e,f,g", 0, v9a }, -{ "fsub16", F3F(2, 0x36, 0x054), F3F(~2, ~0x36, ~0x054), "v,B,H", 0, v9a }, -{ "fsub16s", F3F(2, 0x36, 0x055), F3F(~2, ~0x36, ~0x055), "e,f,g", 0, v9a }, -{ "fsub32", F3F(2, 0x36, 0x056), F3F(~2, ~0x36, ~0x056), "v,B,H", 0, v9a }, -{ "fsub32s", F3F(2, 0x36, 0x057), F3F(~2, ~0x36, ~0x057), "e,f,g", 0, v9a }, +{ "fpadd16", F3F(2, 0x36, 0x050), F3F(~2, ~0x36, ~0x050), "v,B,H", 0, v9a }, +{ "fpadd16s", F3F(2, 0x36, 0x051), F3F(~2, ~0x36, ~0x051), "e,f,g", 0, v9a }, +{ "fpadd32", F3F(2, 0x36, 0x052), F3F(~2, ~0x36, ~0x052), "v,B,H", 0, v9a }, +{ "fpadd32s", F3F(2, 0x36, 0x053), F3F(~2, ~0x36, ~0x053), "e,f,g", 0, v9a }, +{ "fpsub16", F3F(2, 0x36, 0x054), F3F(~2, ~0x36, ~0x054), "v,B,H", 0, v9a }, +{ "fpsub16s", F3F(2, 0x36, 0x055), F3F(~2, ~0x36, ~0x055), "e,f,g", 0, v9a }, +{ "fpsub32", F3F(2, 0x36, 0x056), F3F(~2, ~0x36, ~0x056), "v,B,H", 0, v9a }, +{ "fpsub32s", F3F(2, 0x36, 0x057), F3F(~2, ~0x36, ~0x057), "e,f,g", 0, v9a }, { "fpack32", F3F(2, 0x36, 0x03a), F3F(~2, ~0x36, ~0x03a), "v,B,H", 0, v9a }, { "fpack16", F3F(2, 0x36, 0x03b), F3F(~2, ~0x36, ~0x03b)|RS1_G0, "B,g", 0, v9a }, |