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| author | Nick Clifton <nickc@redhat.com> | 2020-04-29 13:13:55 +0100 |
|---|---|---|
| committer | Nick Clifton <nickc@redhat.com> | 2020-04-29 13:13:55 +0100 |
| commit | 5c936ef50f02fe21a6e1306e30849b4487c65b2c (patch) | |
| tree | 5a9e05736ce354bf06a4221c3cb18e2a314e42ec /opcodes/sh-dis.c | |
| parent | 4849fabc7c4c47d770b61adc025e34bc2a23fe23 (diff) | |
| download | gdb-5c936ef50f02fe21a6e1306e30849b4487c65b2c.zip gdb-5c936ef50f02fe21a6e1306e30849b4487c65b2c.tar.gz gdb-5c936ef50f02fe21a6e1306e30849b4487c65b2c.tar.bz2 | |
Fix the disassmbly of SH instructions which have an unsigned 8-bit immediate operand.
PR 22699
opcodes * sh-opc.h (IMM0_8): Replace with IMM0_8S and IMM0_8U. Use
IMM0_8S for arithmetic insns and IMM0_8U for logical insns.
* sh-dis.c (print_insn_sh): Change IMM0_8 case to IMM0_8S and add
IMM0_8U case.
gas * config/tc-sh.c (build_Mytes): Change operand type IMM0_8 to
IMM0_8S and add support for IMM0_8U.
* testsuite/gas/sh/sh4a.s: Add test of a logical insn using an
unsigned 8-bit immediate.
* testsuite/gas/sh/sh4a.d: Extended expected disassembly.
Diffstat (limited to 'opcodes/sh-dis.c')
| -rw-r--r-- | opcodes/sh-dis.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/opcodes/sh-dis.c b/opcodes/sh-dis.c index 5d771a5..00bcffa 100644 --- a/opcodes/sh-dis.c +++ b/opcodes/sh-dis.c @@ -597,7 +597,7 @@ print_insn_sh (bfd_vma memaddr, struct disassemble_info *info) case IMM1_4BY4: imm = nibs[3] << 2; goto ok; - case IMM0_8: + case IMM0_8S: case IMM1_8: imm = (nibs[2] << 4) | nibs[3]; disp = imm; @@ -605,6 +605,10 @@ print_insn_sh (bfd_vma memaddr, struct disassemble_info *info) if (imm & 0x80) imm -= 0x100; goto ok; + case IMM0_8U: + disp = imm = (nibs[2] << 4) | nibs[3]; + has_disp = 1; + goto ok; case PCRELIMM_8BY2: imm = ((nibs[2] << 4) | nibs[3]) << 1; relmask = ~(bfd_vma) 1; |