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| author | Andreas Krebbel <krebbel@linux.vnet.ibm.com> | 2017-05-29 12:38:42 +0200 |
|---|---|---|
| committer | Andreas Krebbel <krebbel@linux.vnet.ibm.com> | 2017-05-30 10:36:35 +0200 |
| commit | ca87ae741fe9c8aad9db1afbf109dc070d0168cf (patch) | |
| tree | adad13d7565285459845dee5d1726537e7b098a8 /opcodes/s390-opc.c | |
| parent | 67aa8be4cb43cd94bc322fed8bdba48b3c8719c4 (diff) | |
| download | gdb-ca87ae741fe9c8aad9db1afbf109dc070d0168cf.zip gdb-ca87ae741fe9c8aad9db1afbf109dc070d0168cf.tar.gz gdb-ca87ae741fe9c8aad9db1afbf109dc070d0168cf.tar.bz2 | |
S/390: Fix instruction types of csdtr and csxtr
opcodes/ChangeLog:
2017-05-30 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* s390-opc.c: Add new instruction types RRF_0URF and RRF_0UREFE.
* s390-opc.txt: Fix instruction typs of csdtr and csxtr.
gas/ChangeLog:
2017-05-30 Andreas Krebbel <krebbel@linux.vnet.ibm.com>
* testsuite/gas/s390/zarch-z9-ec.d: Adjust csdtr and csxtr.
* testsuite/gas/s390/zarch-z9-ec.s: Likewise.
Diffstat (limited to 'opcodes/s390-opc.c')
| -rw-r--r-- | opcodes/s390-opc.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/opcodes/s390-opc.c b/opcodes/s390-opc.c index deefce3..6d4f91a 100644 --- a/opcodes/s390-opc.c +++ b/opcodes/s390-opc.c @@ -374,6 +374,8 @@ const struct s390_operand s390_operands[] = #define INSTR_RRF_U0RER 4, { RE_24,R_28,U4_16,0,0,0 } /* e.g. trte */ #define INSTR_RRF_U0RERE 4, { RE_24,RE_28,U4_16,0,0,0 } /* e.g. cu24 */ #define INSTR_RRF_00RR 4, { R_24,R_28,0,0,0,0 } /* e.g. clrtne */ +#define INSTR_RRF_0URF 4, { R_24,F_28,U4_20,0,0,0 } /* e.g. csdtr */ +#define INSTR_RRF_0UREFE 4, { RE_24,FE_28,U4_20,0,0,0 } /* e.g. csxtr */ #define INSTR_RRF_UUFR 4, { F_24,U4_16,R_28,U4_20,0,0 } /* e.g. cdgtra */ #define INSTR_RRF_UUFER 4, { FE_24,U4_16,R_28,U4_20,0,0 } /* e.g. cxfbra */ #define INSTR_RRF_UURF 4, { R_24,U4_16,F_28,U4_20,0,0 } /* e.g. cgdtra */ @@ -590,6 +592,8 @@ const struct s390_operand s390_operands[] = #define MASK_RRF_U0RER { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_U0RERE { 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00 } #define MASK_RRF_00RR { 0xff, 0xff, 0xff, 0x00, 0x00, 0x00 } +#define MASK_RRF_0URF { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 } +#define MASK_RRF_0UREFE { 0xff, 0xff, 0xf0, 0x00, 0x00, 0x00 } #define MASK_RRF_UUFR { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_UUFER { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } #define MASK_RRF_UURF { 0xff, 0xff, 0x00, 0x00, 0x00, 0x00 } |