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authorNick Clifton <nickc@redhat.com>2016-01-14 16:23:35 +0000
committerNick Clifton <nickc@redhat.com>2016-01-14 16:23:35 +0000
commit4d82fe66e8d38b20ad429cb99a99ed8741336d72 (patch)
tree56de9e0bebe4497372817e943c106ccdb8124aa1 /opcodes/rl78-dis.c
parente7cf25a8ab54cd02b48e7443ef25764475f02315 (diff)
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Fix display of RL78 MOVW instructions that use the stack pointer.
* rl78-decode.opc (rl78_decode_opcode): Add 's' operand to movw instructions that can support stack pointer operations. * rl78-decode.c: Regenerate. * rl78-dis.c: Fix display of stack pointer in MOVW based instructions. * testsuite/gas/rl78/sp-relative-movw.s: New test. * testsuite/gas/rl78/sp-relative-movw.d: Expected disassembly. * testsuite/gas/rl78/rl78.exp: Run the new test.
Diffstat (limited to 'opcodes/rl78-dis.c')
-rw-r--r--opcodes/rl78-dis.c14
1 files changed, 13 insertions, 1 deletions
diff --git a/opcodes/rl78-dis.c b/opcodes/rl78-dis.c
index dd4f086..6784e53 100644
--- a/opcodes/rl78-dis.c
+++ b/opcodes/rl78-dis.c
@@ -227,7 +227,17 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
}
if (do_bang)
- PC ('!');
+ {
+ /* If we are going to display SP by name, we must omit the bang. */
+ if ((oper->type == RL78_Operand_Indirect || RL78_Operand_BitIndirect)
+ && oper->reg == RL78_Reg_None
+ && do_sfr
+ && ((oper->addend == 0xffff8 && opcode.size == RL78_Word)
+ || (oper->addend == 0x0fff8 && do_es && opcode.size == RL78_Word)))
+ ;
+ else
+ PC ('!');
+ }
if (do_cond)
{
@@ -265,6 +275,8 @@ print_insn_rl78_common (bfd_vma addr, disassemble_info * dis, RL78_Dis_Isa isa)
PR (PS, "psw");
else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Word)
PR (PS, "sp");
+ else if (oper->addend == 0x0fff8 && do_sfr && do_es && opcode.size == RL78_Word)
+ PR (PS, "sp");
else if (oper->addend == 0xffff8 && do_sfr && opcode.size == RL78_Byte)
PR (PS, "spl");
else if (oper->addend == 0xffff9 && do_sfr && opcode.size == RL78_Byte)