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| author | Jim Wilson <jimw@sifive.com> | 2018-12-07 12:31:05 -0800 |
|---|---|---|
| committer | Jim Wilson <jimw@sifive.com> | 2018-12-07 12:31:05 -0800 |
| commit | f50fabe4f66534c9addacddeaa439e8d164eadda (patch) | |
| tree | 626e34486c1f82beb99131a9895c65e4c61c2ced /opcodes/riscv-opc.c | |
| parent | 8bebfcda34f2ea883fa6b87e748ad8a5f72b352f (diff) | |
| download | gdb-f50fabe4f66534c9addacddeaa439e8d164eadda.zip gdb-f50fabe4f66534c9addacddeaa439e8d164eadda.tar.gz gdb-f50fabe4f66534c9addacddeaa439e8d164eadda.tar.bz2 | |
RISC-V: Fix 4-arg add parsing.
PR gas/23956
gas/
* config/tc-riscv.c (validate_riscv_insn) <'1'>: New case.
(percent_op_null): New.
(riscv_ip) <'j'>: Set imm_reloc before p.
<'1'>: New case.
<'0'>: Use percent_op_null and don't set imm_reloc.
<alu_op>: Handle *args == '1'.
* testsuite/gas/riscv/tprel-add.d: New.
* testsuite/gas/riscv/tprel-add.l: New.
* testsuite/gas/riscv/tprel-add.s: New.
opcodes/
* riscv-opc.c (riscv_opcodes) <"add">: Use 1 not 0 for fourth arg.
Diffstat (limited to 'opcodes/riscv-opc.c')
| -rw-r--r-- | opcodes/riscv-opc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index 3da2a77..29c6944 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -276,7 +276,7 @@ const struct riscv_opcode riscv_opcodes[] = {"add", 0, {"I", 0}, "d,s,t", MATCH_ADD, MASK_ADD, match_opcode, 0 }, /* This is used for TLS, where the fourth arg is %tprel_add, to get a reloc applied to an add instruction, for relaxation to use. */ -{"add", 0, {"I", 0}, "d,s,t,0",MATCH_ADD, MASK_ADD, match_opcode, 0 }, +{"add", 0, {"I", 0}, "d,s,t,1",MATCH_ADD, MASK_ADD, match_opcode, 0 }, {"add", 0, {"I", 0}, "d,s,j", MATCH_ADDI, MASK_ADDI, match_opcode, INSN_ALIAS }, {"la", 0, {"I", 0}, "d,B", 0, (int) M_LA, match_never, INSN_MACRO }, {"lla", 0, {"I", 0}, "d,B", 0, (int) M_LLA, match_never, INSN_MACRO }, |