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author | Jim Wilson <jimw@sifive.com> | 2018-03-14 16:04:03 -0700 |
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committer | Jim Wilson <jimw@sifive.com> | 2018-03-14 16:04:03 -0700 |
commit | 0e35537d754f1c687850d1caccb2d78d2e418391 (patch) | |
tree | 61e8574058def02b9f33ceba1eab999e575cad8e /opcodes/riscv-opc.c | |
parent | 3ae9ce5dd7d1119ca2c94c63a07b04921048ebe3 (diff) | |
download | gdb-0e35537d754f1c687850d1caccb2d78d2e418391.zip gdb-0e35537d754f1c687850d1caccb2d78d2e418391.tar.gz gdb-0e35537d754f1c687850d1caccb2d78d2e418391.tar.bz2 |
RISC-V: Add .insn support.
gas/ChangeLog
2018-03-07 Kito Cheng <kito.cheng@gmail.com>
* config/tc-riscv.c (opcode_name_list): New.
(opcode_names_hash): Likewise.
(init_opcode_names_hash): Likewise.
(opcode_name_lookup): Likewise.
(validate_riscv_insn): New argument length, and add new format
which used in .insn directive.
(md_begin): Refine hash table initialization logic into
init_opcode_hash.
(init_opcode_hash): New.
(my_getOpcodeExpression): Parse opcode name for .insn.
(riscv_ip): New argument hash, able to handle .insn directive.
(s_riscv_insn): Handler for .insn directive.
(riscv_pseudo_table): New entry for .insn.
* doc/c-riscv.texi: Add documentation for .insn directive.
* testsuite/gas/riscv/insn.d: Add testcase for .insn directive.
* testsuite/gas/riscv/insn.s: Likewise.
include/ChangeLog
2018-03-07 Kito Cheng <kito.cheng@gmail.com>
* opcode/riscv.h (OP_MASK_FUNCT3): New.
(OP_SH_FUNCT3): Likewise.
(OP_MASK_FUNCT7): Likewise.
(OP_SH_FUNCT7): Likewise.
(OP_MASK_OP2): Likewise.
(OP_SH_OP2): Likewise.
(OP_MASK_CFUNCT4): Likewise.
(OP_SH_CFUNCT4): Likewise.
(OP_MASK_CFUNCT3): Likewise.
(OP_SH_CFUNCT3): Likewise.
(riscv_insn_types): Likewise.
opcodes/ChangeLog
2018-03-07 Kito Cheng <kito.cheng@gmail.com>
* riscv-opc.c (riscv_insn_types): New.
Diffstat (limited to 'opcodes/riscv-opc.c')
-rw-r--r-- | opcodes/riscv-opc.c | 74 |
1 files changed, 74 insertions, 0 deletions
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index 4aeb55a..a285b14 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -741,3 +741,77 @@ const struct riscv_opcode riscv_opcodes[] = /* Terminate the list. */ {0, 0, 0, 0, 0, 0, 0} }; + +/* Instruction format for .insn directive. */ +const struct riscv_opcode riscv_insn_types[] = +{ +/* name, isa, operands, match, mask, match_func, pinfo. */ +{"r", "I", "O4,F3,F7,d,s,t", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F7,D,s,t", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F7,d,S,t", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F7,D,S,t", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F7,d,s,T", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F7,D,s,T", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F7,d,S,T", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F7,D,S,T", 0, 0, match_opcode, 0 }, + +{"r", "I", "O4,F3,F2,d,s,t,r", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,D,s,t,r", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,d,S,t,r", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,D,S,t,r", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,d,s,T,r", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,D,s,T,r", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,d,S,T,r", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,D,S,T,r", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,d,s,t,R", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,D,s,t,R", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,d,S,t,R", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,D,S,t,R", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,d,s,T,R", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,D,s,T,R", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,d,S,T,R", 0, 0, match_opcode, 0 }, +{"r", "I", "O4,F3,F2,D,S,T,R", 0, 0, match_opcode, 0 }, + +{"i", "I", "O4,F3,d,s,j", 0, 0, match_opcode, 0 }, +{"i", "I", "O4,F3,D,s,j", 0, 0, match_opcode, 0 }, +{"i", "I", "O4,F3,d,S,j", 0, 0, match_opcode, 0 }, +{"i", "I", "O4,F3,D,S,j", 0, 0, match_opcode, 0 }, + +{"i", "I", "O4,F3,d,o(s)", 0, 0, match_opcode, 0 }, +{"i", "I", "O4,F3,D,o(s)", 0, 0, match_opcode, 0 }, + +{"s", "I", "O4,F3,d,o(s)", 0, 0, match_opcode, 0 }, +{"s", "I", "O4,F3,D,o(s)", 0, 0, match_opcode, 0 }, + +{"sb", "I", "O4,F3,s,t,p", 0, 0, match_opcode, 0 }, +{"sb", "I", "O4,F3,S,t,p", 0, 0, match_opcode, 0 }, +{"sb", "I", "O4,F3,s,T,p", 0, 0, match_opcode, 0 }, +{"sb", "I", "O4,F3,S,T,p", 0, 0, match_opcode, 0 }, + +{"sb", "I", "O4,F3,t,q(s)", 0, 0, match_opcode, 0 }, +{"sb", "I", "O4,F3,T,q(s)", 0, 0, match_opcode, 0 }, + +{"u", "I", "O4,d,u", 0, 0, match_opcode, 0 }, +{"u", "I", "O4,D,u", 0, 0, match_opcode, 0 }, + +{"uj", "I", "O4,d,a", 0, 0, match_opcode, 0 }, +{"uj", "I", "O4,D,a", 0, 0, match_opcode, 0 }, + +{"cr", "C", "O2,CF4,d,CV", 0, 0, match_opcode, 0 }, +{"cr", "C", "O2,CF4,D,CV", 0, 0, match_opcode, 0 }, +{"cr", "C", "O2,CF4,d,CT", 0, 0, match_opcode, 0 }, +{"cr", "C", "O2,CF4,D,CT", 0, 0, match_opcode, 0 }, + +{"ci", "C", "O2,CF3,d,Co", 0, 0, match_opcode, 0 }, +{"ci", "C", "O2,CF3,D,Co", 0, 0, match_opcode, 0 }, + +{"ciw", "C", "O2,CF3,Ct,C8", 0, 0, match_opcode, 0 }, +{"ciw", "C", "O2,CF3,CD,C8", 0, 0, match_opcode, 0 }, + +{"cb", "C", "O2,CF3,Cs,Cp", 0, 0, match_opcode, 0 }, +{"cb", "C", "O2,CF3,CS,Cp", 0, 0, match_opcode, 0 }, + +{"cj", "C", "O2,CF3,Ca", 0, 0, match_opcode, 0 }, +/* Terminate the list. */ +{0, 0, 0, 0, 0, 0, 0} +}; |