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authorKito Cheng <kito.cheng@gmail.com>2017-03-07 19:56:40 +0800
committerPalmer Dabbelt <palmer@dabbelt.com>2017-03-15 07:47:52 -0700
commit03b039a518fa0f89a9900a44a8b874cc91061305 (patch)
tree4d83666b8fe704570f84e15d96b5d2e07cbe9a14 /opcodes/riscv-opc.c
parent9494d9636612cd9bd22e38625fbc89147beafea7 (diff)
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RISC-V: Fix assembler for c.addi, rd can be x0
opcodes/ChangeLog: 2017-03-14 Kito Cheng <kito.cheng@gmail.com> * riscv-opc.c (riscv_opcodes) <c.addi>: Use match_opcode.
Diffstat (limited to 'opcodes/riscv-opc.c')
-rw-r--r--opcodes/riscv-opc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c
index 1bb90ee..4a2ab7b 100644
--- a/opcodes/riscv-opc.c
+++ b/opcodes/riscv-opc.c
@@ -625,7 +625,7 @@ const struct riscv_opcode riscv_opcodes[] =
{"c.li", "C", "d,Cj", MATCH_C_LI, MASK_C_LI, match_rd_nonzero, 0 },
{"c.addi4spn","C", "Ct,Cc,CK", MATCH_C_ADDI4SPN, MASK_C_ADDI4SPN, match_opcode, 0 },
{"c.addi16sp","C", "Cc,CL", MATCH_C_ADDI16SP, MASK_C_ADDI16SP, match_opcode, 0 },
-{"c.addi", "C", "d,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_rd_nonzero, 0 },
+{"c.addi", "C", "d,Cj", MATCH_C_ADDI, MASK_C_ADDI, match_opcode, 0 },
{"c.add", "C", "d,CV", MATCH_C_ADD, MASK_C_ADD, match_c_add, 0 },
{"c.sub", "C", "Cs,Ct", MATCH_C_SUB, MASK_C_SUB, match_opcode, 0 },
{"c.and", "C", "Cs,Ct", MATCH_C_AND, MASK_C_AND, match_opcode, 0 },