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authorPeter Bergner <bergner@vnet.ibm.com>2009-04-07 18:28:02 +0000
committerPeter Bergner <bergner@vnet.ibm.com>2009-04-07 18:28:02 +0000
commit858d7a6db20b82c4cc9a2ae1a614169e95801e56 (patch)
treeca79f4dfd06d36d931e026627161d6e73fee9a44 /opcodes/ppc-opc.c
parentbcb012d3f5c0ea3015854d06f8778224f62bbfb8 (diff)
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opcodes/
* ppc-opc.c (powerpc_opcodes) <"tlbilxlpid", "tlbilxpid", "tlbilxva", "tlbilx">: Use secondary opcode "18" as per the ISA 2.06 documentation. Reorder entries so the extended mnemonics are listed before tlbilx. gas/testsuite/ * gas/ppc/e500mc.d: Update to match extended mnemonics.
Diffstat (limited to 'opcodes/ppc-opc.c')
-rw-r--r--opcodes/ppc-opc.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 7bf96c4..bc64e49 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -3464,6 +3464,11 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"isellt", X(31,15), X_MASK, PPCISEL, PPCNONE, {RT, RA, RB}},
+{"tlbilxlpid", XTO(31,18,0), XTO_MASK, E500MC, PPCNONE, {0}},
+{"tlbilxpid", XTO(31,18,1), XTO_MASK, E500MC, PPCNONE, {0}},
+{"tlbilxva", XTO(31,18,3), XTO_MASK, E500MC, PPCNONE, {RA0, RB}},
+{"tlbilx", X(31,18), X_MASK, E500MC, PPCNONE, {T, RA0, RB}},
+
{"mfcr", XFXM(31,19,0,0), XFXFXM_MASK, POWER4, PPCNONE, {RT, FXM4}},
{"mfcr", XFXM(31,19,0,0), XRARB_MASK, COM, POWER4, {RT}},
{"mfocrf", XFXM(31,19,0,1), XFXFXM_MASK, COM, PPCNONE, {RT, FXM}},
@@ -4551,10 +4556,6 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lxvw4x", X(31,780), XX1_MASK, PPCVSX, PPCNONE, {XT6, RA, RB}},
{"tlbivax", X(31,786), XRT_MASK, BOOKE, PPCNONE, {RA, RB}},
-{"tlbilx", X(31,787), X_MASK, E500MC, PPCNONE, {T, RA0, RB}},
-{"tlbilxlpid", XTO(31,787,0), XTO_MASK, E500MC, PPCNONE, {0}},
-{"tlbilxpid", XTO(31,787,1), XTO_MASK, E500MC, PPCNONE, {0}},
-{"tlbilxva", XTO(31,787,3), XTO_MASK, E500MC, PPCNONE, {RA0, RB}},
{"lwzcix", X(31,789), X_MASK, POWER6, PPCNONE, {RT, RA0, RB}},