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| author | Peter Bergner <bergner@linux.ibm.com> | 2021-09-25 18:21:17 -0500 |
|---|---|---|
| committer | Peter Bergner <bergner@linux.ibm.com> | 2021-09-25 18:21:17 -0500 |
| commit | 4d5d5d4689541d0522cdadf3df4a550954bc2e9f (patch) | |
| tree | 47edda141a0b58e5a72e6ae5de6b5017f2d97e45 /opcodes/ppc-opc.c | |
| parent | 98bf5c02cfe9d13428a55c0da8d5f150d7c1fc54 (diff) | |
| download | gdb-4d5d5d4689541d0522cdadf3df4a550954bc2e9f.zip gdb-4d5d5d4689541d0522cdadf3df4a550954bc2e9f.tar.gz gdb-4d5d5d4689541d0522cdadf3df4a550954bc2e9f.tar.bz2 | |
PowerPC: Enable mfppr mfppr32, mtppr and mtppr32 extended mnemonics on POWER5
SPR 896 and the mfppr mfppr32, mtppr and mtppr32 extended mnemonics were added
in ISA 2.03, so enable them on POWER5 and later.
opcodes/
* ppc-opc.c (powerpc_opcodes) <mfppr, mfppr32, mtppr, mtppr32>: Enable
on POWER5 and later.
gas/
* testsuite/gas/ppc/power5.s: New test.
* testsuite/gas/ppc/power5.d: Likewise.
* testsuite/gas/ppc/ppc.exp: Run it.
* testsuite/gas/ppc/power7.s: Remove tests for mfppr, mfppr32, mtppr
and mtppr32.
* testsuite/gas/ppc/power7.d: Likewise.
Diffstat (limited to 'opcodes/ppc-opc.c')
| -rw-r--r-- | opcodes/ppc-opc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c index 13d8b6c..a34df17 100644 --- a/opcodes/ppc-opc.c +++ b/opcodes/ppc-opc.c @@ -7073,8 +7073,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"mfdvlim", XSPR(31,339,883), XSPR_MASK, TITAN, EXT, {RT}}, {"mfclcsr", XSPR(31,339,884), XSPR_MASK, TITAN, EXT, {RT}}, {"mfccr1", XSPR(31,339,888), XSPR_MASK, TITAN, EXT, {RT}}, -{"mfppr", XSPR(31,339,896), XSPR_MASK, POWER7, EXT, {RT}}, -{"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER7, EXT, {RT}}, +{"mfppr", XSPR(31,339,896), XSPR_MASK, POWER5, EXT, {RT}}, +{"mfppr32", XSPR(31,339,898), XSPR_MASK, POWER5, EXT, {RT}}, {"mfgqr", XSPR(31,339,912), XSPRGQR_MASK, PPCPS, EXT, {RT, SPRGQR}}, {"mfhid2", XSPR(31,339,920), XSPR_MASK, GEKKO, EXT, {RT}}, {"mfwpar", XSPR(31,339,921), XSPR_MASK, GEKKO, EXT, {RT}}, @@ -7514,8 +7514,8 @@ const struct powerpc_opcode powerpc_opcodes[] = { {"mtdvlim", XSPR(31,467,883), XSPR_MASK, TITAN, EXT, {RS}}, {"mtclcsr", XSPR(31,467,884), XSPR_MASK, TITAN, EXT, {RS}}, {"mtccr1", XSPR(31,467,888), XSPR_MASK, TITAN, EXT, {RS}}, -{"mtppr", XSPR(31,467,896), XSPR_MASK, POWER7, EXT, {RS}}, -{"mtppr32", XSPR(31,467,898), XSPR_MASK, POWER7, EXT, {RS}}, +{"mtppr", XSPR(31,467,896), XSPR_MASK, POWER5, EXT, {RS}}, +{"mtppr32", XSPR(31,467,898), XSPR_MASK, POWER5, EXT, {RS}}, {"mtgqr", XSPR(31,467,912), XSPRGQR_MASK, PPCPS, EXT, {SPRGQR, RS}}, {"mthid2", XSPR(31,467,920), XSPR_MASK, GEKKO, EXT, {RS}}, {"mtwpar", XSPR(31,467,921), XSPR_MASK, GEKKO, EXT, {RS}}, |