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authorPeter Bergner <bergner@vnet.ibm.com>2009-02-19 21:18:46 +0000
committerPeter Bergner <bergner@vnet.ibm.com>2009-02-19 21:18:46 +0000
commit0e55be1624c24e2361c3ea06ea73ca4e67e030e0 (patch)
tree949d9f3d5c75e37cdba8804e700ba55deffe0235 /opcodes/ppc-opc.c
parent02e6c11cc47bd30dace28589399dc02e61c28f24 (diff)
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gas/testsuite/
* gas/ppc/e500mc.d ("lfdepx", "stfdepx"): Fix tests to expect a floating point register. opcodes/ * ppc-opc.c (powerpc_opcodes) <"lfdepx", "stfdepx">: Fix the first operand to be a float point register (FRT/FRS).
Diffstat (limited to 'opcodes/ppc-opc.c')
-rw-r--r--opcodes/ppc-opc.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/opcodes/ppc-opc.c b/opcodes/ppc-opc.c
index 5ce87b7..294af73 100644
--- a/opcodes/ppc-opc.c
+++ b/opcodes/ppc-opc.c
@@ -4286,7 +4286,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"lfdx", X(31,599), X_MASK, COM, PPCNONE, {FRT, RA0, RB}},
-{"lfdepx", X(31,607), X_MASK, E500MC, PPCNONE, {RT, RA, RB}},
+{"lfdepx", X(31,607), X_MASK, E500MC, PPCNONE, {FRT, RA, RB}},
{"mffgpr", XRC(31,607,0), XRA_MASK, POWER6, PPCNONE, {FRT, RB}},
{"lddx", X(31,611), X_MASK, E500MC, PPCNONE, {RT, RA, RB}},
@@ -4373,7 +4373,7 @@ const struct powerpc_opcode powerpc_opcodes[] = {
{"sreq", XRC(31,729,0), X_MASK, M601, PPCNONE, {RA, RS, RB}},
{"sreq.", XRC(31,729,1), X_MASK, M601, PPCNONE, {RA, RS, RB}},
-{"stfdepx", X(31,735), X_MASK, E500MC, PPCNONE, {RS, RA, RB}},
+{"stfdepx", X(31,735), X_MASK, E500MC, PPCNONE, {FRS, RA, RB}},
{"mftgpr", XRC(31,735,0), XRA_MASK, POWER6, PPCNONE, {RT, FRB}},
{"stddx", X(31,739), X_MASK, E500MC, PPCNONE, {RS, RA, RB}},