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authorPeter Bergner <bergner@vnet.ibm.com>2008-08-02 04:38:51 +0000
committerPeter Bergner <bergner@vnet.ibm.com>2008-08-02 04:38:51 +0000
commit9b4e57660d385d9135549aeb8360ebfa14fb3990 (patch)
treee508e99bbab020f78ccd3b320ca8bf30b1b95b96 /opcodes/ppc-dis.c
parentdbe454a3b5f62a101aa4a8b290a7c63a40f8ac52 (diff)
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* config/tc-ppc.c (parse_cpu): Rename altivec_or_spe to retain_flags. Handle -mvsx and -mpower7. (md_show_usage): Document -mpower7 and -mvsx. * doc/as.texinfo (Target PowerPC): Document -mvsx. * doc/c-ppc.texi (PowerPC-Opts): Document -mvsx and -mpower7. gas/testsuite/ * gas/ppc/power7.d: New. * gas/ppc/power7.s: Likewise. * gas/ppc/ppc.exp: Run power7 test. include/opcode/ * ppc.h (PPC_OPCODE_VSX, PPC_OPERAND_VSR): New. opcodes/ * ppc-dis.c (powerpc_init_dialect): Handle power7 and vsx options. (print_insn_powerpc): Prepend 'vs' when printing VSX registers. (print_ppc_disassembler_options): Document -Mpower7 and -Mvsx. * ppc-opc.c (insert_xt6): New static function. (extract_xt6): Likewise. (insert_xa6): Likewise. (extract_xa6: Likewise. (insert_xb6): Likewise. (extract_xb6): Likewise. (insert_xb6s): Likewise. (extract_xb6s): Likewise. (XS6, XT6, XA6, XB6, XB6S, DM, XX3, XX3DM, XX1_MASK, XX3_MASK, XX3DM_MASK, PPCVSX): New. (powerpc_opcodes): Add opcodes "lxvd2x", "lxvd2ux", "stxvd2x", "stxvd2ux", "xxmrghd", "xxmrgld", "xxpermdi", "xvmovdp", "xvcpsgndp".
Diffstat (limited to 'opcodes/ppc-dis.c')
-rw-r--r--opcodes/ppc-dis.c16
1 files changed, 15 insertions, 1 deletions
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c
index 7d4f9e1..bde4c49 100644
--- a/opcodes/ppc-dis.c
+++ b/opcodes/ppc-dis.c
@@ -107,7 +107,17 @@ powerpc_init_dialect (struct disassemble_info *info)
if (info->disassembler_options
&& strstr (info->disassembler_options, "power6") != NULL)
- dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6 | PPC_OPCODE_ALTIVEC;
+ dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_ALTIVEC;
+
+ if (info->disassembler_options
+ && strstr (info->disassembler_options, "power7") != NULL)
+ dialect |= PPC_OPCODE_POWER4 | PPC_OPCODE_POWER5 | PPC_OPCODE_POWER6
+ | PPC_OPCODE_ALTIVEC | PPC_OPCODE_VSX;
+
+ if (info->disassembler_options
+ && strstr (info->disassembler_options, "vsx") != NULL)
+ dialect |= PPC_OPCODE_VSX;
if (info->disassembler_options
&& strstr (info->disassembler_options, "any") != NULL)
@@ -321,6 +331,8 @@ print_insn_powerpc (bfd_vma memaddr,
(*info->fprintf_func) (info->stream, "f%ld", value);
else if ((operand->flags & PPC_OPERAND_VR) != 0)
(*info->fprintf_func) (info->stream, "v%ld", value);
+ else if ((operand->flags & PPC_OPERAND_VSR) != 0)
+ (*info->fprintf_func) (info->stream, "vs%ld", value);
else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0)
(*info->print_address_func) (memaddr + value, info);
else if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
@@ -401,6 +413,8 @@ the -M switch:\n");
fprintf (stream, " power4 Disassemble the Power4 instructions\n");
fprintf (stream, " power5 Disassemble the Power5 instructions\n");
fprintf (stream, " power6 Disassemble the Power6 instructions\n");
+ fprintf (stream, " power7 Disassemble the Power7 instructions\n");
+ fprintf (stream, " vsx Disassemble the Vector-Scalar (VSX) instructions\n");
fprintf (stream, " 32 Do not disassemble 64-bit instructions\n");
fprintf (stream, " 64 Allow disassembly of 64-bit instructions\n");
}