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| author | Alan Modra <amodra@gmail.com> | 2019-03-28 10:36:55 +1030 |
|---|---|---|
| committer | Alan Modra <amodra@gmail.com> | 2019-03-28 15:21:05 +1030 |
| commit | 96a86c01d119372f4af5aff2501d3104e6c1a8e3 (patch) | |
| tree | cbd1ac115b85d52e073ee0ca7b2ffd31901a3395 /opcodes/ppc-dis.c | |
| parent | 072029171354eee0e2f90527196ddda5a85e98c1 (diff) | |
| download | gdb-96a86c01d119372f4af5aff2501d3104e6c1a8e3.zip gdb-96a86c01d119372f4af5aff2501d3104e6c1a8e3.tar.gz gdb-96a86c01d119372f4af5aff2501d3104e6c1a8e3.tar.bz2 | |
PR24390, Don't decode mtfsb field as a cr field
"mtfsb0 4*cr7+lt" doesn't make all that much sense, but unfortunately
glibc uses just that instead of "mtfsb0 28" to clear the fpscr xe bit.
So for backwards compatibility accept cr field expressions when
assembling mtfsb operands, but disassemble to a plain number.
PR 24390
include/
* opcode/ppc.h (PPC_OPERAND_CR_REG): Comment.
opcodes/
* ppc-opc.c (BTF): Define.
(powerpc_opcodes): Use for mtfsb*.
* ppc-dis.c (print_insn_powerpc): Print fields with both
PPC_OPERAND_CR_REG and PPC_OPERAND_CR_BIT as a plain number.
gas/
* testsuite/gas/ppc/476.d: Update mtfsb*.
* testsuite/gas/ppc/a2.d: Likewise.
Diffstat (limited to 'opcodes/ppc-dis.c')
| -rw-r--r-- | opcodes/ppc-dis.c | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/opcodes/ppc-dis.c b/opcodes/ppc-dis.c index ff35fce..dbcbcc9 100644 --- a/opcodes/ppc-dis.c +++ b/opcodes/ppc-dis.c @@ -779,10 +779,12 @@ print_insn_powerpc (bfd_vma memaddr, else if ((operand->flags & PPC_OPERAND_UDI) != 0) (*info->fprintf_func) (info->stream, "%" PRId64, value); else if ((operand->flags & PPC_OPERAND_CR_REG) != 0 + && (operand->flags & PPC_OPERAND_CR_BIT) == 0 && (((dialect & PPC_OPCODE_PPC) != 0) || ((dialect & PPC_OPCODE_VLE) != 0))) (*info->fprintf_func) (info->stream, "cr%" PRId64, value); - else if (((operand->flags & PPC_OPERAND_CR_BIT) != 0) + else if ((operand->flags & PPC_OPERAND_CR_BIT) != 0 + && (operand->flags & PPC_OPERAND_CR_REG) == 0 && (((dialect & PPC_OPCODE_PPC) != 0) || ((dialect & PPC_OPCODE_VLE) != 0))) { |