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authorStafford Horne <shorne@gmail.com>2018-10-05 11:41:41 +0900
committerStafford Horne <shorne@gmail.com>2018-10-05 11:41:41 +0900
commitc8e98e3692cec125b92c995d8f881d9bdf1fac00 (patch)
tree1eab614292c9fd08a497dc6ac3dec0980d2c1a97 /opcodes/or1k-desc.h
parentf2c1801f6255a3f9f483ae2f07c7d7da0ddae4af (diff)
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or1k: Add the l.adrp insn and supporting relocations
This patch adds the new instruction and relocation as per proposal: https://openrisc.io/proposals/ladrp This is to be added to the spec in an upcoming revision. The new instruction l.adrp loads the page offset of the current instruction offset by a 21-bit immediate shifted left 13-bits. This is meant to be used with a 13-bit lower bit page offset. This allows us to free up the got register r16. l.adrp r3, foo l.ori r4, r3, po(foo) l.lbz r5, po(foo)(r3) l.sb po(foo)(r3), r6 The relocations we add are: - BFD_RELOC_OR1K_PLTA26 For PLT jump relocation with PLT entry asm: plta() implemented using l.ardp, meaning no need for r16 (the GOT reg) - BFD_RELOC_OR1K_GOT_PG21 Upper 21-bit Page offset got address asm: got() - BFD_RELOC_OR1K_TLS_GD_PG21 Upper 21-bit Page offset with TLS General asm: tlsgd() Dynamic calculation - BFD_RELOC_OR1K_TLS_LDM_PG21 Upper 21-bit Page offset with TLS local asm: tlsldm() dynamic calculation - BFD_RELOC_OR1K_TLS_IE_PG21 Upper 21-bit Page offset with TLS Initial asm: gottp() Executable calculation - BFD_RELOC_OR1K_PCREL_PG21 Default relocation for disp21 (l.adrp instructions) - BFD_RELOC_OR1K_LO13 low 13-bit page offset relocation asm: po() i.e. mem loads, addi etc - BFD_RELOC_OR1K_SLO13 low 13-bit page offset relocation asm: po() i.e. mem stores, with split immediate - BFD_RELOC_OR1K_GOT_LO13, low 13-bit page offset with GOT calcs asm: gotpo() - BFD_RELOC_OR1K_TLS_GD_LO13 Lower 13-bit offset with TLS GD calcs asm: tlsgdpo() - BFD_RELOC_OR1K_TLS_LDM_LO13 Lower 13-bit offset with TLS LD calcs asm: tlsldmpo() - BFD_RELOC_OR1K_TLS_IE_LO13 Lower 13-bit offset with TLS IE calcs asm: gottppo() bfd/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * bfd-in2.h: Regenerated. * elf32-or1k.c: (or1k_elf_howto_table): Fix formatting for R_OR1K_PLT26, Add R_OR1K_PCREL_PG21, R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21, R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_SLO13, R_OR1K_PLTA26. (or1k_reloc_map): Add BFD_RELOC_OR1K_PCREL_PG21, BFD_RELOC_OR1K_GOT_PG21, BFD_RELOC_OR1K_TLS_GD_PG21, BFD_RELOC_OR1K_TLS_LDM_PG21, BFD_RELOC_OR1K_TLS_IE_PG21, BFD_RELOC_OR1K_LO13, BFD_RELOC_OR1K_GOT_LO13, BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_LO13, BFD_RELOC_OR1K_SLO13, BFD_RELOC_OR1K_PLTA26. (elf_or1k_link_hash_table): Add field saw_plta. (or1k_final_link_relocate): Add value calculations for new relocations. (or1k_elf_relocate_section): Add section relocations for new relocations. (or1k_write_plt_entry): New function. (or1k_elf_finish_dynamic_sections): Add support for PLTA relocations using new l.adrp instruction. Cleanup PLT relocation code generation. * libbfd.h: Regenerated. * reloc.c: Add BFD_RELOC_OR1K_PCREL_PG21, BFD_RELOC_OR1K_LO13, BFD_RELOC_OR1K_SLO13, BFD_RELOC_OR1K_GOT_PG21, BFD_RELOC_OR1K_GOT_LO13, BFD_RELOC_OR1K_PLTA26, BFD_RELOC_OR1K_TLS_GD_PG21, BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_PG21, BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_PG21, BFD_RELOC_OR1K_TLS_IE_LO13. cpu/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * or1k.opc (parse_disp26): Add support for plta() relocations. (parse_disp21): New function. (or1k_rclass): New enum. (or1k_rtype): New enum. (or1k_imm16_relocs): Define new PO and SPO relocation mappings. (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations. (parse_imm16): Add support for the new 21bit and 13bit relocations. * or1korbis.cpu (f-disp26): Don't assume SI. (f-disp21): New pc-relative 21-bit 13 shifted to right. (insn-opcode): Add ADRP. (l-adrp): New instruction. gas/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * config/tc-or1k.c (or1k_apply_fix): Add BFD_RELOC_OR1K_TLS_GD_PG21, BFD_RELOC_OR1K_TLS_GD_LO13, BFD_RELOC_OR1K_TLS_LDM_PG21, BFD_RELOC_OR1K_TLS_LDM_LO13, BFD_RELOC_OR1K_TLS_IE_PG21, BFD_RELOC_OR1K_TLS_IE_LO13. * testsuite/gas/or1k/allinsn.s: Add test for l.adrp. * testsuite/gas/or1k/allinsn.d: Add test results for new instructions. * testsuite/gas/or1k/reloc-1.s: Add tests to generate R_OR1K_PLTA26, R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21, R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13, R_OR1K_TLD_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_LO13, R_OR1K_SLO13 relocations. * testsuite/gas/or1k/reloc-1.d: Add relocation results for tests. * testsuite/gas/or1k/reloc-2.s: Add negative tests for store to gotpo(). * testsuite/gas/or1k/reloc-2.l: Add expected error test results. ld/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * testsuite/ld-or1k/or1k.exp: Add test cases for plt generation. * testsuite/ld-or1k/plt1.dd: New file. * testsuite/ld-or1k/plt1.s: New file. * testsuite/ld-or1k/plt1.x.dd: New file. * testsuite/ld-or1k/plta1.dd: New file. * testsuite/ld-or1k/plta1.s: New file. * testsuite/ld-or1k/pltlib.s: New file. include/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * elf/or1k.h (elf_or1k_reloc_type): Add R_OR1K_PCREL_PG21, R_OR1K_GOT_PG21, R_OR1K_TLS_GD_PG21, R_OR1K_TLS_LDM_PG21, R_OR1K_TLS_IE_PG21, R_OR1K_LO13, R_OR1K_GOT_LO13, R_OR1K_TLS_GD_LO13, R_OR1K_TLS_LDM_LO13, R_OR1K_TLS_IE_LO13, R_OR1K_SLO13, R_OR1K_PLTA26. opcodes/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> * or1k-asm.c: Regenerated. * or1k-desc.c: Regenerated. * or1k-desc.h: Regenerated. * or1k-dis.c: Regenerated. * or1k-ibld.c: Regenerated. * or1k-opc.c: Regenerated. * or1k-opc.h: Regenerated. * or1k-opinst.c: Regenerated.
Diffstat (limited to 'opcodes/or1k-desc.h')
-rw-r--r--opcodes/or1k-desc.h37
1 files changed, 19 insertions, 18 deletions
diff --git a/opcodes/or1k-desc.h b/opcodes/or1k-desc.h
index 894a8bb..d84f0fa 100644
--- a/opcodes/or1k-desc.h
+++ b/opcodes/or1k-desc.h
@@ -279,18 +279,18 @@ typedef enum spr_field_masks {
/* Enum declaration for insn main opcode enums. */
typedef enum insn_opcode {
- OPC_J = 0, OPC_JAL = 1, OPC_BNF = 3, OPC_BF = 4
- , OPC_NOP = 5, OPC_MOVHIMACRC = 6, OPC_SYSTRAPSYNCS = 8, OPC_RFE = 9
- , OPC_VECTOR = 10, OPC_JR = 17, OPC_JALR = 18, OPC_MACI = 19
- , OPC_LWA = 27, OPC_CUST1 = 28, OPC_CUST2 = 29, OPC_CUST3 = 30
- , OPC_CUST4 = 31, OPC_LD = 32, OPC_LWZ = 33, OPC_LWS = 34
- , OPC_LBZ = 35, OPC_LBS = 36, OPC_LHZ = 37, OPC_LHS = 38
- , OPC_ADDI = 39, OPC_ADDIC = 40, OPC_ANDI = 41, OPC_ORI = 42
- , OPC_XORI = 43, OPC_MULI = 44, OPC_MFSPR = 45, OPC_SHROTI = 46
- , OPC_SFI = 47, OPC_MTSPR = 48, OPC_MAC = 49, OPC_FLOAT = 50
- , OPC_SWA = 51, OPC_SD = 52, OPC_SW = 53, OPC_SB = 54
- , OPC_SH = 55, OPC_ALU = 56, OPC_SF = 57, OPC_CUST5 = 60
- , OPC_CUST6 = 61, OPC_CUST7 = 62, OPC_CUST8 = 63
+ OPC_J = 0, OPC_JAL = 1, OPC_ADRP = 2, OPC_BNF = 3
+ , OPC_BF = 4, OPC_NOP = 5, OPC_MOVHIMACRC = 6, OPC_SYSTRAPSYNCS = 8
+ , OPC_RFE = 9, OPC_VECTOR = 10, OPC_JR = 17, OPC_JALR = 18
+ , OPC_MACI = 19, OPC_LWA = 27, OPC_CUST1 = 28, OPC_CUST2 = 29
+ , OPC_CUST3 = 30, OPC_CUST4 = 31, OPC_LD = 32, OPC_LWZ = 33
+ , OPC_LWS = 34, OPC_LBZ = 35, OPC_LBS = 36, OPC_LHZ = 37
+ , OPC_LHS = 38, OPC_ADDI = 39, OPC_ADDIC = 40, OPC_ANDI = 41
+ , OPC_ORI = 42, OPC_XORI = 43, OPC_MULI = 44, OPC_MFSPR = 45
+ , OPC_SHROTI = 46, OPC_SFI = 47, OPC_MTSPR = 48, OPC_MAC = 49
+ , OPC_FLOAT = 50, OPC_SWA = 51, OPC_SD = 52, OPC_SW = 53
+ , OPC_SB = 54, OPC_SH = 55, OPC_ALU = 56, OPC_SF = 57
+ , OPC_CUST5 = 60, OPC_CUST6 = 61, OPC_CUST7 = 62, OPC_CUST8 = 63
} INSN_OPCODE;
/* Enum declaration for systrapsync insn opcode enums. */
@@ -401,8 +401,8 @@ typedef enum ifield_type {
, OR1K_F_RESV_20_5, OR1K_F_RESV_20_4, OR1K_F_RESV_15_8, OR1K_F_RESV_15_6
, OR1K_F_RESV_10_11, OR1K_F_RESV_10_7, OR1K_F_RESV_10_3, OR1K_F_RESV_10_1
, OR1K_F_RESV_7_4, OR1K_F_RESV_5_2, OR1K_F_IMM16_25_5, OR1K_F_IMM16_10_11
- , OR1K_F_DISP26, OR1K_F_UIMM16, OR1K_F_SIMM16, OR1K_F_UIMM6
- , OR1K_F_UIMM16_SPLIT, OR1K_F_SIMM16_SPLIT, OR1K_F_MAX
+ , OR1K_F_DISP26, OR1K_F_DISP21, OR1K_F_UIMM16, OR1K_F_SIMM16
+ , OR1K_F_UIMM6, OR1K_F_UIMM16_SPLIT, OR1K_F_SIMM16_SPLIT, OR1K_F_MAX
} IFIELD_TYPE;
#define MAX_IFLD ((int) OR1K_F_MAX)
@@ -622,13 +622,14 @@ typedef enum cgen_operand_type {
, OR1K_OPERAND_SYS_SR_OVE, OR1K_OPERAND_SYS_CPUCFGR_OB64S, OR1K_OPERAND_SYS_CPUCFGR_ND, OR1K_OPERAND_SYS_FPCSR_RM
, OR1K_OPERAND_MAC_MACHI, OR1K_OPERAND_MAC_MACLO, OR1K_OPERAND_ATOMIC_RESERVE, OR1K_OPERAND_ATOMIC_ADDRESS
, OR1K_OPERAND_UIMM6, OR1K_OPERAND_RD, OR1K_OPERAND_RA, OR1K_OPERAND_RB
- , OR1K_OPERAND_DISP26, OR1K_OPERAND_SIMM16, OR1K_OPERAND_UIMM16, OR1K_OPERAND_SIMM16_SPLIT
- , OR1K_OPERAND_UIMM16_SPLIT, OR1K_OPERAND_RDSF, OR1K_OPERAND_RASF, OR1K_OPERAND_RBSF
- , OR1K_OPERAND_RDDF, OR1K_OPERAND_RADF, OR1K_OPERAND_RBDF, OR1K_OPERAND_MAX
+ , OR1K_OPERAND_DISP26, OR1K_OPERAND_DISP21, OR1K_OPERAND_SIMM16, OR1K_OPERAND_UIMM16
+ , OR1K_OPERAND_SIMM16_SPLIT, OR1K_OPERAND_UIMM16_SPLIT, OR1K_OPERAND_RDSF, OR1K_OPERAND_RASF
+ , OR1K_OPERAND_RBSF, OR1K_OPERAND_RDDF, OR1K_OPERAND_RADF, OR1K_OPERAND_RBDF
+ , OR1K_OPERAND_MAX
} CGEN_OPERAND_TYPE;
/* Number of operands types. */
-#define MAX_OPERANDS 31
+#define MAX_OPERANDS 32
/* Maximum number of operands referenced by any insn. */
#define MAX_OPERAND_INSTANCES 9