Fix simple gas testsuite failures.

binutils* readelf.c (is_24bit_abs_reloc): Add support for R_FT32_20
	reloc.

gas	* config/tc-ft32.c (md_assemble): Call dwarf2_emit_insn with the
	instruction size.
	* config/tc-mcore.c (md_assemble): Likewise.
	* config/tc-mn10200.c (md_assemble): Likewise.
	* config/tc-moxie.c (md_assemble): Likewise.
	* config/tc-pj.c (md_apply_fix): Handle BFD_RELOC_PJ_CODE_REL32.
	* testsuite/gas/all/gas.exp (diff1 test): Alpha sort list of
	exception targets.  Add alpha, hppa, microblaze and rl78 to list
	of exceptions.
	(forward): Add microblaze to list of exceptions.
	(fwdexp): Add alpha to list of exceptions.
	(redef2): Add arm-epoc-pe and rl78 to list of exceptions.
	(redef3): Add rl78 and x86_64 cygwin to list of exceptions.
	(do_930509a): Alpha sort list of exception targets.  Add h8300 and
	mn10200 to list of exceptions.
	(align2): Expect to fail for nds32.
	(cond): Add alpha and rl78 to list of exceptions.
	* testsuite/gas/all/none.d: Skip for ft32 and hppa.
	* testsuite/gas/all/string.d: Skip for tic4x.
	* testsuite/gas/alpha/alpha.exp: Note that the alpha-linuxecoff
	target does not support ELF.
	* testsuite/gas/arm/blx-bl-convert.dL Skip for the nto target.
	* testsuite/gas/cfi/cfi-alpha-2.d: All extended format names.
	* testsuite/gas/cfi/cfi.exp: Alpha sort list of targets.  Skip SH
	tests for sh-pe and sh-rtemscoff targets.
	* testsuite/gas/elf/elf.exp (redef): Add rl78, xgate and vax to
	list of exceptions.
	(type): Run the noifunc version for alpha-freebsd and visium.
	* testsuite/gas/elf/warn-2.s: Do not expect to fail on the mcore,
	mn10200 or moxie targets.
	* testsuite/gas/ft32/insn.d: Update expected disassembly.
	* testsuite/gas/i386/i386.exp (x86-64-pcrel): Skip for cygwin
	targets.
	* testsuite/gas/lns/lns.exp (lns-common-1): No longer skip for
	mcore and rx targets.
	* testsuite/gas/macros/macros.exp (dot): Add exceptions for ns32k,
	rl78 and vax.
	(purge): Expect to fail on the ns32k and vax.
	* testsuite/gas/nds32/alu-2.d: Update expected disassembly.
	* testsuite/gas/nds32/ls.d: Likewise.
	* testsuite/gas/nds32/sys-reg.d: Likewise.
	* testsuite/gas/nds32/usr-spe-reg.d: Likewise.
	* testsuite/gas/pe/aligncomm-d.d: Skip for the sh.
	* testsuite/gas/pe/section-align-3.d: Likewise.
	* testsuite/gas/pe/section-exclude.d: Likewise.
	* testsuite/gas/ppc/test2xcoff32.d: Pass once all the required
	data has been seen.
	* testsuite/gas/ppc/textalign-xcoff-001.d: Fix up regexp to allow
	for variations in whitespace.
	* testsuite/gas/tilepro/t_constants.d: Pass once all the required
	data has been seen.
	* testsuite/gas/tilepro/t_constants.s (.safe_word): New macro.
	Installs a 32-bit value without generating warnings on 64-bit
	hosts.
	Use the new macro to replace the .word directives.

opcodes	* nds32-dis.c (nds32_parse_audio_ext): Change printing of integer
	constants to match expected behaviour.
	(nds32_parse_opcode): Likewise.  Also for whitespace.

1 files changed, 43 insertions, 14 deletions

diff --git a/opcodes/nds32-dis.c b/opcodes/nds32-dis.c
index 6656342..e88e3bf 100644
--- a/opcodes/nds32-dis.c
+++ b/opcodes/nds32-dis.c
@@ -155,7 +155,7 @@ nds32_parse_audio_ext (const field_t *pfd,
       else
 	int_value = __GF (insn, pfd->bitpos, pfd->bitsize) << pfd->shift;
 
-      if (int_value < 0)
+      if (int_value < 10)
 	func (stream, "#%d", int_value);
       else
 	func (stream, "#0x%x", int_value);
@@ -269,7 +269,7 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
       else if (strstr (opc->instruction, "tito"))
 	func (stream, "%s", opc->opcode);
       else
-	func (stream, "%s ", opc->opcode);
+	func (stream, "%s\t", opc->opcode);
     }
 
   while (*pstr_src)
@@ -280,7 +280,7 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
 	case '=':
 	case '&':
 	  pstr_src++;
-	  /* compare with operand_fields[].name.  */
+	  /* Compare with operand_fields[].name.  */
 	  pstr_tmp = &tmp_string[0];
 	  while (*pstr_src)
 	    {
@@ -304,7 +304,7 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
 	      pfd++;
 	    }
 
-	  /* for insn-16.  */
+	  /* For insn-16.  */
 	  if (parse_mode & NDS32_PARSE_INSN16)
 	    {
 	      if (pfd->hw_res == HW_GPR)
@@ -373,13 +373,18 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
 		    }
 		  else if (pfd->hw_res == HW_INT)
 		    {
-		      if (int_value < 0)
+		      if (int_value < 10)
 			func (stream, "#%d", int_value);
 		      else
 			func (stream, "#0x%x", int_value);
 		    }
-		  else		/* if(pfd->hw_res == HW_UINT).  */
-		    func (stream, "#0x%x", int_value);
+		  else /* if (pfd->hw_res == HW_UINT).  */
+		    {
+		      if (int_value < 10)
+			func (stream, "#%u", int_value);
+		      else
+			func (stream, "#0x%x", int_value);
+		    }
 		}
 
 	    }
@@ -491,14 +496,17 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
 		}
 	      else if (pfd->hw_res == HW_INT)
 		{
-		  if (int_value < 0)
+		  if (int_value < 10)
 		    func (stream, "#%d", int_value);
 		  else
 		    func (stream, "#0x%x", int_value);
 		}
-	      else		/* if(pfd->hw_res == HW_UINT).  */
+	      else /* if (pfd->hw_res == HW_UINT).  */
 		{
-		  func (stream, "#0x%x", int_value);
+		  if (int_value < 10)
+		    func (stream, "#%u", int_value);
+		  else
+		    func (stream, "#0x%x", int_value);
 		}
 	    }
 	  break;
@@ -508,13 +516,34 @@ nds32_parse_opcode (struct nds32_opcode *opc, bfd_vma pc ATTRIBUTE_UNUSED,
 	  pstr_src++;
 	  break;
 
+	case ',':
+	  func (stream, ", ");
+	  pstr_src++;
+	  break;
+	  
+	case '+':
+	  func (stream, " + ");
+	  pstr_src++;
+	  break;
+	  
+	case '<':
+	  if (pstr_src[1] == '<')
+	    {
+	      func (stream, " << ");
+	      pstr_src += 2;
+	    }
+	  else
+	    {
+	      func (stream, " <");
+	      pstr_src++;
+	    }
+	  break;
+	  
 	default:
 	  func (stream, "%c", *pstr_src++);
 	  break;
-	}			/* switch (*pstr_src).  */
-
-    }				/* while (*pstr_src).  */
-  return;
+	}
+    }
 }
 
 /* Filter instructions with some bits must be fixed.  */