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authorNelson Chu <nelson.chu@sifive.com>2020-06-09 15:33:08 +0800
committerNelson Chu <nelson.chu@sifive.com>2020-06-22 09:54:02 +0800
commitcbd7581f343d85b4216db2eefdf601f6d988062d (patch)
treeb80542287da289dd0a23f2aa23b7343f91cc0c20 /opcodes/mt-asm.c
parent41ab2f9b7b6173bf8ae2dc4d78c07ac17012c4c6 (diff)
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RISC-V: Don't assume the priv attributes are in order when handling them.
There is no guarantee that the priv attributes should be defined in order. Therefore, we shouldn't have the order assumption when handling them in the riscv_merge_attributes. Set priv_attrs_merged to TRUE if we have handled all of the priv attributes. bfd/ * elfnn-riscv.c (riscv_merge_attributes): Once we meet one of the priv attributes, we will check the conflicts for all of them (major, minor and revision), and then set the priv_attrs_merged to TRUE to indicate that we have handled all of the priv attributes. Remove the unused boolean priv_may_conflict, in_priv_zero and out_priv_zero.
Diffstat (limited to 'opcodes/mt-asm.c')
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