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author | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-14 21:14:33 +0000 |
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committer | Maciej W. Rozycki <macro@imgtec.com> | 2016-12-14 22:02:24 +0000 |
commit | 63e014fccdd91a89873554f6b33d7128d7112813 (patch) | |
tree | 1d1662c2557727352e5dfb220d23a58c96cc41c0 /opcodes/mips16-opc.c | |
parent | c1fc2d7ee590f3bc87ee79c36e7216b0b6bb054b (diff) | |
download | gdb-63e014fccdd91a89873554f6b33d7128d7112813.zip gdb-63e014fccdd91a89873554f6b33d7128d7112813.tar.gz gdb-63e014fccdd91a89873554f6b33d7128d7112813.tar.bz2 |
MIPS16/opcodes: Fix and clarify MIPS16e commentary
Correct the note about JALRC/JRC being compact jumps rather than
branches, and add a reference from where the remaining MIPS16e additions
live and the jumps used to be too, complementing commit ceb94aa50d68
("Update insn_mo when converting to a MIPS16e compact jump"),
<https://sourceware.org/ml/binutils/2011-06/msg00369.html>.
opcodes/
* mips16-opc.c (mips16_opcodes): Update comments on MIPS16e
compact jumps.
Diffstat (limited to 'opcodes/mips16-opc.c')
-rw-r--r-- | opcodes/mips16-opc.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c index f1a67ed..0fcefc6 100644 --- a/opcodes/mips16-opc.c +++ b/opcodes/mips16-opc.c @@ -284,9 +284,9 @@ const struct mips_opcode mips16_opcodes[] = {"jr", "R", 0xe820, 0xffff, UBD, RD_31, I1, 0, 0 }, {"j", "x", 0xe800, 0xf8ff, RD_1|UBD, 0, I1, 0, 0 }, {"j", "R", 0xe820, 0xffff, UBD, RD_31, I1, 0, 0 }, -/* MIPS16e compact branches. We keep them near the ordinary branches - so that we easily find them when converting a normal branch to a - compact one. */ +/* MIPS16e compact jumps. We keep them near the ordinary jumps + so that we easily find them when converting a normal jump + to a compact one. */ {"jalrc", "x", 0xe8c0, 0xf8ff, RD_1|WR_31|NODS, UBR, I32, 0, 0 }, {"jalrc", "R,x", 0xe8c0, 0xf8ff, RD_2|WR_31|NODS, UBR, I32, 0, 0 }, {"jrc", "x", 0xe880, 0xf8ff, RD_1|NODS, UBR, I32, 0, 0 }, @@ -346,7 +346,7 @@ const struct mips_opcode mips16_opcodes[] = {"sw", "x,V(S)", 0xd000, 0xf800, RD_1, RD_SP, I1, 0, 0 }, {"sw", "R,V(S)", 0x6200, 0xff00, 0, RD_31|RD_SP, I1, 0, 0 }, {"xor", "x,y", 0xe80e, 0xf81f, MOD_1|RD_2, 0, I1, 0, 0 }, - /* MIPS16e additions */ + /* MIPS16e additions; see above for compact jumps. */ {"restore", "M", 0x6400, 0xff80, WR_31|NODS, MOD_SP, I32, 0, 0 }, {"save", "m", 0x6480, 0xff80, NODS, RD_31|MOD_SP, I32, 0, 0 }, {"sdbbp", "6", 0xe801, 0xf81f, TRAP, 0, I32, 0, 0 }, |