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| author | Thiemo Seufer <ths@networkno.de> | 2006-05-04 10:47:05 +0000 |
|---|---|---|
| committer | Thiemo Seufer <ths@networkno.de> | 2006-05-04 10:47:05 +0000 |
| commit | 39a7806daee10b8020ce7be18e54cab69c9e699f (patch) | |
| tree | e0e709f3dc36ebd5135bd8a533c7f16a44ec5a3c /opcodes/mips16-opc.c | |
| parent | 9578239d3edd0341cca6686bdf89ba9f5a1cd9f7 (diff) | |
| download | gdb-39a7806daee10b8020ce7be18e54cab69c9e699f.zip gdb-39a7806daee10b8020ce7be18e54cab69c9e699f.tar.gz gdb-39a7806daee10b8020ce7be18e54cab69c9e699f.tar.bz2 | |
[ gas/testsuite/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
* gas/mips/mips.exp: Run mips32-dsp tests only for mips32r2.
* gas/mips/set-arch.d: Adjust according to opcode table changes.
[ include/opcode/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips.h: Add INSN_SMARTMIPS define.
[ opcodes/ChangeLog ]
2006-05-04 Thiemo Seufer <ths@mips.com>
Nigel Stephens <nigel@mips.com>
David Ung <davidu@mips.com>
* mips-dis.c (mips_arch_choices): Add smartmips instruction
decoding to MIPS32 and MIPS32R2. Limit DSP decoding to release
2 ISAs. Add MIPS3D decoding to MIPS32R2. Add MT decoding to
MIPS64R2.
* mips-opc.c: fix random typos in comments.
(INSN_SMARTMIPS): New defines.
(mips_builtin_opcodes): Add paired single support for MIPS32R2.
Move bc3f, bc3fl, bc3t, bc3tl downwards. Move flushi, flushd,
flushid, wb upwards. Move cfc3, ctc3 downwards. Rework the
FP_S and FP_D flags to denote single and double register
accesses separately. Move dmfc3, dmtc3, mfc3, mtc3 downwards.
Allow jr.hb and jalr.hb for release 1 ISAs. Allow luxc1, suxc1
for MIPS32R2. Add SmartMIPS instructions. Add two-argument
variants of bc2f, bc2fl, bc2t, bc2tl. Add mfhc2, mthc2 to
release 2 ISAs.
* mips16-opc.c (mips16_opcodes): Add sdbbp instruction.
Diffstat (limited to 'opcodes/mips16-opc.c')
| -rw-r--r-- | opcodes/mips16-opc.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/opcodes/mips16-opc.c b/opcodes/mips16-opc.c index 4e5ae44..24b6107 100644 --- a/opcodes/mips16-opc.c +++ b/opcodes/mips16-opc.c @@ -64,6 +64,7 @@ Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA const struct mips_opcode mips16_opcodes[] = { +/* name, args, match, mask, pinfo, pinfo2, membership */ {"nop", "", 0x6500, 0xffff, RD_Z, 0, 0 }, /* move $0,$Z */ {"la", "x,A", 0x0800, 0xf800, WR_x|RD_PC, 0, 0 }, {"abs", "x,w", 0, (int) M_ABS, INSN_MACRO, 0, 0 }, @@ -228,6 +229,7 @@ const struct mips_opcode mips16_opcodes[] = {"jrc", "R", 0xe8a0, 0xffff, RD_31|TRAP, 0, 0 }, {"restore", "M", 0x6400, 0xff80, WR_31|RD_SP|WR_SP|TRAP, 0, 0 }, {"save", "m", 0x6480, 0xff80, RD_31|RD_SP|WR_SP|TRAP, 0, 0 }, +{"sdbbp", "6", 0xe801, 0xf81f, TRAP, 0, 0 }, {"seb", "x", 0xe891, 0xf8ff, WR_x|RD_x, 0, 0 }, {"seh", "x", 0xe8b1, 0xf8ff, WR_x|RD_x, 0, 0 }, {"sew", "x", 0xe8d1, 0xf8ff, WR_x|RD_x, 0, I3 }, |