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| author | Ian Lance Taylor <ian@airs.com> | 1997-12-22 09:37:47 +0000 |
|---|---|---|
| committer | Ian Lance Taylor <ian@airs.com> | 1997-12-22 09:37:47 +0000 |
| commit | e3d2cd9f377f2f5a31efef50ff83f232cb11ddac (patch) | |
| tree | 425522807a6d501b316ce7d61a3ac8f4c28272b3 /opcodes/mips-opc.c | |
| parent | 999539b55949bf5ce1acb1bfae87c8212ad6c9b2 (diff) | |
| download | gdb-e3d2cd9f377f2f5a31efef50ff83f232cb11ddac.zip gdb-e3d2cd9f377f2f5a31efef50ff83f232cb11ddac.tar.gz gdb-e3d2cd9f377f2f5a31efef50ff83f232cb11ddac.tar.bz2 | |
* mips-opc.c: Add FP_D to s.d instruction flags.
Diffstat (limited to 'opcodes/mips-opc.c')
| -rw-r--r-- | opcodes/mips-opc.c | 25 |
1 files changed, 24 insertions, 1 deletions
diff --git a/opcodes/mips-opc.c b/opcodes/mips-opc.c index 16dd297..a7c828b 100644 --- a/opcodes/mips-opc.c +++ b/opcodes/mips-opc.c @@ -541,6 +541,29 @@ const struct mips_opcode mips_builtin_opcodes[] = { /* start-sanitize-r5900 */ {"maddu1", "s,t", 0x70000021, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO, T5 }, {"maddu1", "d,s,t", 0x70000021, 0xfc0007ff, RD_s|RD_t|WR_HI|WR_LO|WR_d, T5 }, +{"adda.s", "S,T", 0x46000018, 0xffe007ff, RD_S|RD_T|FP_S, T5 }, +{"madda.s", "S,T", 0x4600001e, 0xffe007ff, RD_S|RD_T|FP_S, T5 }, +{"max.s", "D,S,T", 0x46000028, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, T5 }, +{"min.s", "D,S,T", 0x46000030, 0xffe0003f, WR_D|RD_S|RD_T|FP_S, T5 }, +{"msuba.s", "S,T", 0x4600001f, 0xffe007ff, RD_S|RD_T|FP_S, T5 }, +{"multa.s", "S,T", 0x4600001a, 0xffe007ff, RD_S|RD_T|FP_S, T5 }, +{"suba.s", "S,T", 0x46000019, 0xffe007ff, RD_S|RD_T|FP_S, T5 }, +{"di", "", 0x42000039, 0xffffffff, WR_C0, T5 }, +{"ei", "", 0x42000038, 0xffffffff, WR_C0, T5 }, +{"mfbpc", "t", 0x4000c000, 0xffe0ffff, RD_C0|WR_t, T5 }, +{"mfdab", "t", 0x4000c004, 0xffe0ffff, RD_C0|WR_t, T5 }, +{"mfdabm", "t", 0x4000c005, 0xffe0ffff, RD_C0|WR_t, T5 }, +{"mfdvb", "t", 0x4000c006, 0xffe0ffff, RD_C0|WR_t, T5 }, +{"mfdvbm", "t", 0x4000c007, 0xffe0ffff, RD_C0|WR_t, T5 }, +{"mfiab", "t", 0x4000c002, 0xffe0ffff, RD_C0|WR_t, T5 }, +{"mfiabm", "t", 0x4000c003, 0xffe0ffff, RD_C0|WR_t, T5 }, +{"mtbpc", "t", 0x4080c000, 0xffe0ffff, WR_C0|RD_t, T5 }, +{"mtdab", "t", 0x4080c004, 0xffe0ffff, WR_C0|RD_t, T5 }, +{"mtdabm", "t", 0x4080c005, 0xffe0ffff, WR_C0|RD_t, T5 }, +{"mtdvb", "t", 0x4080c006, 0xffe0ffff, WR_C0|RD_t, T5 }, +{"mtdvbm", "t", 0x4080c007, 0xffe0ffff, WR_C0|RD_t, T5 }, +{"mtiab", "t", 0x4080c002, 0xffe0ffff, WR_C0|RD_t, T5 }, +{"mtiabm", "t", 0x4080c003, 0xffe0ffff, WR_C0|RD_t, T5 }, /* end-sanitize-r5900 */ {"madd16", "s,t", 0x00000028, 0xfc00ffff, RD_s|RD_t|WR_HI|WR_LO|RD_HI|RD_LO, V1 }, /* start-sanitize-vr5400 */ @@ -864,7 +887,7 @@ const struct mips_opcode mips_builtin_opcodes[] = { {"sdc2", "E,A(b)", 0, (int) M_SDC2_AB, INSN_MACRO, I2 }, {"sdc3", "E,o(b)", 0xfc000000, 0xfc000000, SM|RD_C3|RD_b, I2 }, {"sdc3", "E,A(b)", 0, (int) M_SDC3_AB, INSN_MACRO, I2 }, -{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b, I2 }, +{"s.d", "T,o(b)", 0xf4000000, 0xfc000000, SM|RD_T|RD_b|FP_D, I2 }, {"s.d", "T,o(b)", 0, (int) M_S_DOB, INSN_MACRO, I1 }, {"s.d", "T,A(b)", 0, (int) M_S_DAB, INSN_MACRO, I1 }, {"sdl", "t,o(b)", 0xb0000000, 0xfc000000, SM|RD_t|RD_b, I3 }, |