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authorMaciej W. Rozycki <macro@imgtec.com>2016-04-11 17:56:01 +0100
committerMaciej W. Rozycki <macro@imgtec.com>2016-04-11 18:01:18 +0100
commit92708ceca544456c26b4b82e2e7fc8afcf1641c8 (patch)
tree88836f9d07f4b9ed5048d4df67ccea9d46ceee84 /opcodes/mips-dis.c
parent994aad6437e82ba41192b2235aed5adad61331fd (diff)
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MIPS/opcodes: Fix undecoded MIPS16 extended instruction bit disassembly
Correct the disassembly of hardware don't cares in MIPS16 extended instructions. Rather than e.g.: 0: f008 0231 addiu v0,sp,16433 4: f520 3260 sll v0,v1,-12 print: 0: f008 0231 addiu v0,sp,16401 4: f520 3260 sll v0,v1,20 respectively instead. opcodes/ * mips-dis.c (print_mips16_insn_arg): Mask unused extended instruction bits out. binutils/ * testsuite/binutils-all/mips/mips16-undecoded.d: New test. * testsuite/binutils-all/mips/mips16-undecoded.s: New test source. * testsuite/binutils-all/mips/mips.exp: Run the new test.
Diffstat (limited to 'opcodes/mips-dis.c')
-rw-r--r--opcodes/mips-dis.c6
1 files changed, 4 insertions, 2 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index e152876..7822295 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -1894,11 +1894,13 @@ print_mips16_insn_arg (struct disassemble_info *info,
{
operand = ext_operand;
if (operand->size == 16)
- uval |= ((extend & 0x1f) << 11) | (extend & 0x7e0);
+ uval = (((extend & 0x1f) << 11) | (extend & 0x7e0)
+ | (uval & 0x1f));
else if (operand->size == 15)
uval |= ((extend & 0xf) << 11) | (extend & 0x7f0);
else
- uval = ((extend >> 6) & 0x1f) | (extend & 0x20);
+ uval = ((((extend >> 6) & 0x1f) | (extend & 0x20))
+ & ((1U << operand->size) - 1));
}
}
}