diff options
| author | Richard Sandiford <rdsandiford@googlemail.com> | 2003-07-15 07:50:39 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2003-07-15 07:50:39 +0000 |
| commit | 5a7ea749508ca506900e38238305f70dd1cbe164 (patch) | |
| tree | d5eb505d1aad88c7dadeb2bce0154d15fca53449 /opcodes/mips-dis.c | |
| parent | ec178e1bbbb2314200cb408997efc934017f9684 (diff) | |
| download | gdb-5a7ea749508ca506900e38238305f70dd1cbe164.zip gdb-5a7ea749508ca506900e38238305f70dd1cbe164.tar.gz gdb-5a7ea749508ca506900e38238305f70dd1cbe164.tar.bz2 | |
include/opcode/
* mips.h (CPU_RM7000): New macro.
(OPCODE_IS_MEMBER): Match CPU_RM7000 against 4650 insns.
bfd/
* archures.c (bfd_mach_mips7000): New.
* bfd-in2.h: Regenerated.
* cpu-mips.c (arch_info_struct): Add an entry for mips:7000.
* elfxx-mips.c (mips_set_isa_flags): Handle bfd_mach_mips7000.
(mips_mach_extensions): Add an entry for it.
opcodes/
* mips-dis.c (mips_arch_choices): Add rm7000 and rm9000 entries.
gas/
* config/tc-mips.c (hilo_interlocks): True for CPU_RM7000.
(mips_cpu_info_table): Add rm7000 and rm9000 entries.
gas/testsuite/
* gas/mips/rm7000.[sd]: New test.
* gas/mips/mips.exp: Run it.
Diffstat (limited to 'opcodes/mips-dis.c')
| -rw-r--r-- | opcodes/mips-dis.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 20d95ab..af6c445 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -347,6 +347,10 @@ const struct mips_arch_choice mips_arch_choices[] = { mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, { "r6000", 1, bfd_mach_mips6000, CPU_R6000, ISA_MIPS2, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, + { "rm7000", 1, bfd_mach_mips7000, CPU_RM7000, ISA_MIPS4, + mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, + { "rm9000", 1, bfd_mach_mips7000, CPU_RM7000, ISA_MIPS4, + mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, { "r8000", 1, bfd_mach_mips8000, CPU_R8000, ISA_MIPS4, mips_cp0_names_numeric, NULL, 0, mips_hwr_names_numeric }, { "r10000", 1, bfd_mach_mips10000, CPU_R10000, ISA_MIPS4, |