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| author | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-07 09:50:43 +0000 |
|---|---|---|
| committer | Richard Sandiford <rdsandiford@googlemail.com> | 2013-07-07 09:50:43 +0000 |
| commit | 27c5c572c911ec2f77bab953586870919db15a29 (patch) | |
| tree | 3707c6f2cb9bb03b201d4ad70e28086b9830726b /opcodes/mips-dis.c | |
| parent | e76ff5abe375e1e7535f7827db01bce70bc9710d (diff) | |
| download | gdb-27c5c572c911ec2f77bab953586870919db15a29.zip gdb-27c5c572c911ec2f77bab953586870919db15a29.tar.gz gdb-27c5c572c911ec2f77bab953586870919db15a29.tar.bz2 | |
include/opcode/
* mips.h: Document "+i".
opcodes/
* mips-opc.c (mips_builtin_opcodes): Use "+i" rather than "a" for
"jalx".
* mips16-opc.c (mips16_opcodes): Likewise.
* micromips-opc.c (micromips_opcodes): Likewise.
* mips-dis.c (print_insn_args, print_mips16_insn_arg)
(print_insn_mips16): Handle "+i".
(print_insn_micromips): Likewise. Conditionally preserve the
ISA bit for "a" but not for "+i".
gas/
* config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
(mips_ip, mips16_ip): Handle "+i".
Diffstat (limited to 'opcodes/mips-dis.c')
| -rw-r--r-- | opcodes/mips-dis.c | 39 |
1 files changed, 22 insertions, 17 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 4d89220..9ef7247 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -1105,6 +1105,15 @@ print_insn_args (const char *d, infprintf (is, "%s", mips_fpr_names[GET_OP (l, FZ)]); break; + case 'i': /* JALX destination */ + info->target = (((pc + 4) & ~(bfd_vma) 0x0fffffff) + | (GET_OP (l, TARGET) << 2)); + /* For gdb disassembler, force odd address on jalx. */ + if (info->flavour == bfd_target_unknown_flavour) + info->target |= 1; + (*info->print_address_func) (info->target, info); + break; + case 'j': /* 9-bit signed offset in bit 7. */ infprintf (is, "%d", GET_OP_S (l, EVAOFFSET)); break; @@ -1229,10 +1238,6 @@ print_insn_args (const char *d, case 'a': info->target = (((pc + 4) & ~(bfd_vma) 0x0fffffff) | (GET_OP (l, TARGET) << 2)); - /* For gdb disassembler, force odd address on jalx. */ - if (info->flavour == bfd_target_unknown_flavour - && strcmp (opp->name, "jalx") == 0) - info->target |= 1; (*info->print_address_func) (info->target, info); break; @@ -1874,13 +1879,12 @@ print_mips16_insn_arg (char type, break; case 'a': + case 'i': { - int jalx = l & 0x400; - if (! use_extend) extend = 0; l = ((l & 0x1f) << 23) | ((l & 0x3e0) << 13) | (extend << 2); - if (!jalx && info->flavour == bfd_target_unknown_flavour) + if (type == 'a' && info->flavour == bfd_target_unknown_flavour) /* For gdb disassembler, maintain odd address. */ l |= 1; } @@ -2147,7 +2151,7 @@ print_insn_mips16 (bfd_vma memaddr, struct disassemble_info *info) { const char *s; - if (strchr (op->args, 'a') != NULL) + if (op->args[0] == 'a' || op->args[0] == 'i') { if (use_extend) { @@ -2422,15 +2426,10 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) break; case 'a': - if (strcmp (op->name, "jalx") == 0) - info->target = (((memaddr + 4) & ~(bfd_vma) 0x0fffffff) - | (GET_OP (insn, TARGET) << 2)); - else - info->target = (((memaddr + 4) & ~(bfd_vma) 0x07ffffff) - | (GET_OP (insn, TARGET) << 1)); - /* For gdb disassembler, force odd address on jalx. */ - if (info->flavour == bfd_target_unknown_flavour - && strcmp (op->name, "jalx") == 0) + info->target = (((memaddr + 4) & ~(bfd_vma) 0x07ffffff) + | (GET_OP (insn, TARGET) << 1)); + /* For gdb disassembler, maintain odd address. */ + if (info->flavour == bfd_target_unknown_flavour) info->target |= 1; (*info->print_address_func) (info->target, info); break; @@ -2658,6 +2657,12 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info) infprintf (is, "0x%x", msbd + 1); break; + case 'i': + info->target = (((memaddr + 4) & ~(bfd_vma) 0x0fffffff) + | (GET_OP (insn, TARGET) << 2)); + (*info->print_address_func) (info->target, info); + break; + case 'j': /* 9-bit signed offset in bit 0. */ delta = GET_OP_S (insn, EVAOFFSET); infprintf (is, "%d", delta); |