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| author | Ian Lance Taylor <ian@airs.com> | 1993-09-02 17:14:10 +0000 |
|---|---|---|
| committer | Ian Lance Taylor <ian@airs.com> | 1993-09-02 17:14:10 +0000 |
| commit | 547998d2c8cdffd961a414f8b040f69a07c445ef (patch) | |
| tree | 64161c5bfef53196fe5aa0bf92fedaa0e02cfcac /opcodes/mips-dis.c | |
| parent | fb27a96270c552c8880387c05bab565a4a6de46e (diff) | |
| download | gdb-547998d2c8cdffd961a414f8b040f69a07c445ef.zip gdb-547998d2c8cdffd961a414f8b040f69a07c445ef.tar.gz gdb-547998d2c8cdffd961a414f8b040f69a07c445ef.tar.bz2 | |
* mips-opc.c: Change div machine instruction to be z,s,t rather
than s,t. Change div macro to be d,v,t rather than d,s,t.
Likewise for divu, ddiv, ddivu. Added z,s,t case for drem, dremu,
rem and remu which generates only the corresponding div
instruction. This is for compatibility with the MIPS assembler,
which only generates the simple machine instruction when an
explicit destination of $0 is used.
* mips-dis.c (print_insn_arg): Handle 'z' (always register zero).
Diffstat (limited to 'opcodes/mips-dis.c')
| -rw-r--r-- | opcodes/mips-dis.c | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 6806bcd..6ccd8c7 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -49,7 +49,7 @@ static CONST char * CONST reg_names[] = REGISTER_NAMES; /* subroutine */ static void print_insn_arg (d, l, pc, info) - char *d; + const char *d; register unsigned long int l; bfd_vma pc; struct disassemble_info *info; @@ -114,6 +114,10 @@ print_insn_arg (d, l, pc, info) reg_names[(l >> OP_SH_RD) & OP_MASK_RD]); break; + case 'z': + (*info->fprintf_func) (info->stream, "$%s", reg_names[0]); + break; + case '<': (*info->fprintf_func) (info->stream, "0x%x", (l >> OP_SH_SHAMT) & OP_MASK_SHAMT); @@ -180,7 +184,7 @@ _print_insn_mips (memaddr, word, info) unsigned long int word; { register int i; - register char *d; + register const char *d; for (i = 0; i < NUMOPCODES; i++) { |