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authorThiemo Seufer <ths@networkno.de>2002-07-09 14:21:40 +0000
committerThiemo Seufer <ths@networkno.de>2002-07-09 14:21:40 +0000
commitaec421e08bbb6921022f45cf5f19a194177f2afb (patch)
treeed791de238cf0d5678e713ad58922f39bb36b989 /opcodes/mips-dis.c
parenta534e424ef4ba55edce00fcd0a9e85dcf2736b13 (diff)
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* config/tc-mips.c (macro_build): Handle MIPS16 insns.
(mips_ip): Likewise. * mips.h (INSN_MIPS16): New define. * mips-dis.c (mips_isa_type): Add MIPS16 insn handling. * mips-opc.c (I16): New define. (mips_builtin_opcodes): Make jalx an I16 insn.
Diffstat (limited to 'opcodes/mips-dis.c')
-rw-r--r--opcodes/mips-dis.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index b832ca2..9b35a47 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -412,7 +412,7 @@ mips_isa_type (mach, isa, cputype)
break;
case bfd_mach_mips16:
*cputype = CPU_MIPS16;
- *isa = ISA_MIPS3;
+ *isa = ISA_MIPS3 | INSN_MIPS16;
break;
case bfd_mach_mips5:
*cputype = CPU_MIPS5;
@@ -429,12 +429,12 @@ mips_isa_type (mach, isa, cputype)
_MIPS32 Architecture For Programmers Volume I: Introduction to the
MIPS32 Architecture_ (MIPS Document Number MD00082, Revision 0.95),
page 1. */
- *isa = ISA_MIPS32;
+ *isa = ISA_MIPS32 | INSN_MIPS16;
break;
case bfd_mach_mipsisa64:
*cputype = CPU_MIPS64;
/* For stock MIPS64, disassemble all applicable MIPS-specified ASEs. */
- *isa = ISA_MIPS64 | INSN_MDMX | INSN_MIPS3D;
+ *isa = ISA_MIPS64 | INSN_MIPS16 | INSN_MIPS3D | INSN_MDMX;
break;
default: