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| author | Chris Demetriou <cgd@google.com> | 2001-10-18 01:42:16 +0000 |
|---|---|---|
| committer | Chris Demetriou <cgd@google.com> | 2001-10-18 01:42:16 +0000 |
| commit | 2228315b47c1647bd28e7d7d0074fd23310080af (patch) | |
| tree | db91d877e14db26b9177119819df7e7ccda29838 /opcodes/mips-dis.c | |
| parent | c080b94227d8bb7d994b1ff41d7548019e6a9dc1 (diff) | |
| download | gdb-2228315b47c1647bd28e7d7d0074fd23310080af.zip gdb-2228315b47c1647bd28e7d7d0074fd23310080af.tar.gz gdb-2228315b47c1647bd28e7d7d0074fd23310080af.tar.bz2 | |
[gas/testsuite/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* gas/mips/mips.exp (sb1-ext-ps): New test to test
SB-1 core's paired-single extensions to the MIPS64 ISA.
* gas/mips/sb1-ext-ps.d: New file.
* gas/mips/sb1-ext-ps.s: New file.
[include/opcode/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips.h (INSN_SB1): New cpu-specific instruction bit.
(OPCODE_IS_MEMBER): Allow instructions matching INSN_SB1
if cpu is CPU_SB1.
[opcodes/ChangeLog]
2001-10-17 Chris Demetriou <cgd@broadcom.com>
* mips-dis.c (mips_isa_type): Make the ISA used to disassemble
SB-1 binaries include instructions specific to the SB-1.
* mips-opc.c (SB1): New definition.
(mips_builtin_opcodes): Add SB-1 extension opcodes "div.ps",
"recip.ps", "rsqrt.ps", and "sqrt.ps".
Diffstat (limited to 'opcodes/mips-dis.c')
| -rw-r--r-- | opcodes/mips-dis.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c index 9112898..a11e1c0 100644 --- a/opcodes/mips-dis.c +++ b/opcodes/mips-dis.c @@ -375,7 +375,7 @@ mips_isa_type (mach, isa, cputype) break; case bfd_mach_mips_sb1: *cputype = CPU_SB1; - *isa = ISA_MIPS64; + *isa = ISA_MIPS64 | INSN_SB1; break; case bfd_mach_mipsisa32: * cputype = CPU_MIPS32; |