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authorCatherine Moore <clm@redhat.com>2013-06-17 22:59:10 +0000
committerCatherine Moore <clm@redhat.com>2013-06-17 22:59:10 +0000
commit7f3c40729de8d40d4d6c4478525385436ac332ec (patch)
tree8f4220af36662db88a21890150f9b1a475f21e36 /opcodes/mips-dis.c
parentde40ceb6d5f3b7a5a9d145bfb326c28b425e073d (diff)
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2013-06-17 Catherine Moore <clm@codesourcery.com>
Maciej W. Rozycki <macro@codesourcery.com> Chao-Ying Fu <fu@mips.com> gas/testsuite/ * gas/mips/mips.exp: Run new tests. * gas/mips/eva.d: New. * gas/mips/eva.s: New. * gas/mips/micromips@eva.d: New. gas/ * config/tc-mips.c (mips_set_options): Add ase_eva. (mips_set_options mips_opts): Add ase_eva. (file_ase_eva): Declare. (ISA_SUPPORTS_EVA_ASE): Define. (IS_SEXT_9BIT_NUM): Define. (MIPS_CPU_ASE_EVA): Define. (is_opcode_valid): Add support for ase_eva. (macro_build): Likewise. (macro): Likewise. (validate_mips_insn): Likewise. (validate_micromips_insn): Likewise. (mips_ip): Likewise. (options): Add OPTION_EVA and OPTION_NO_EVA. (md_longopts): Add -meva and -mno-eva. (md_parse_option): Process new options. (mips_after_parse_args): Check for valid EVA combinations. (s_mipsset): Likewise. include/ * opcode/mips.h (OP_SH_EVAOFFSET): Define. (OP_MASK_EVAOFFSET): Define. (INSN_ASE_MASK): Delete. (ASE_EVA): Define. (M_CACHEE_AB, M_CACHEE_OB): New. (M_LBE_OB, M_LBE_AB): New. (M_LBUE_OB, M_LBUE_AB): New. (M_LHE_OB, M_LHE_AB): New. (M_LHUE_OB, M_LHUE_AB): New. (M_LLE_AB, M_LLE_OB): New. (M_LWE_OB, M_LWE_AB): New. (M_LWLE_AB, M_LWLE_OB): New. (M_LWRE_AB, M_LWRE_OB): New. (M_PREFE_AB, M_PREFE_OB): New. (M_SCE_AB, M_SCE_OB): New. (M_SBE_OB, M_SBE_AB): New. (M_SHE_OB, M_SHE_AB): New. (M_SWE_OB, M_SWE_AB): New. (M_SWLE_AB, M_SWLE_OB): New. (M_SWRE_AB, M_SWRE_OB): New. (MICROMIPSOP_SH_EVAOFFSET): Define. (MICROMIPSOP_MASK_EVAOFFSET): Define. opcodes/ * micromips-opc.c (EVA): Define. (TLBINV): Define. (micromips_opcodes): Add EVA opcodes. * mips-dis.c (mips_arch_choices): Update for ASE_EVA. (print_insn_args): Handle EVA offsets. (print_insn_micromips): Likewise. * mips-opc.c (EVA): Define. (TLBINV): Define. (mips_builtin_opcodes): Add EVA opcodes.
Diffstat (limited to 'opcodes/mips-dis.c')
-rw-r--r--opcodes/mips-dis.c17
1 files changed, 13 insertions, 4 deletions
diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index bf1ef40..db8dac4 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -591,8 +591,8 @@ const struct mips_arch_choice mips_arch_choices[] =
{ "mips32r2", 1, bfd_mach_mipsisa32r2, CPU_MIPS32R2,
ISA_MIPS32R2,
- (ASE_SMARTMIPS | ASE_DSP | ASE_DSPR2 | ASE_MIPS3D | ASE_MT
- | ASE_MCU | ASE_VIRT),
+ (ASE_SMARTMIPS | ASE_DSP | ASE_DSPR2 | ASE_EVA | ASE_MIPS3D
+ | ASE_MT | ASE_MCU | ASE_VIRT),
mips_cp0_names_mips3264r2,
mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
mips_hwr_names_mips3264r2 },
@@ -606,8 +606,8 @@ const struct mips_arch_choice mips_arch_choices[] =
{ "mips64r2", 1, bfd_mach_mipsisa64r2, CPU_MIPS64R2,
ISA_MIPS64R2,
- (ASE_MIPS3D | ASE_DSP | ASE_DSPR2 | ASE_DSP64 | ASE_MT | ASE_MDMX
- | ASE_MCU | ASE_VIRT | ASE_VIRT64),
+ (ASE_MIPS3D | ASE_DSP | ASE_DSPR2 | ASE_DSP64 | ASE_EVA | ASE_MT
+ | ASE_MDMX | ASE_MCU | ASE_VIRT | ASE_VIRT64),
mips_cp0_names_mips3264r2,
mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
mips_hwr_names_mips3264r2 },
@@ -1152,6 +1152,10 @@ print_insn_args (const char *d,
infprintf (is, "%s", mips_fpr_names[GET_OP (l, FZ)]);
break;
+ case 'j': /* 9-bit signed offset in bit 7. */
+ infprintf (is, "%d", GET_OP_S (l, EVAOFFSET));
+ break;
+
default:
/* xgettext:c-format */
infprintf (is,
@@ -2659,6 +2663,11 @@ print_insn_micromips (bfd_vma memaddr, struct disassemble_info *info)
infprintf (is, "0x%x", msbd + 1);
break;
+ case 'j': /* 9-bit signed offset in bit 0. */
+ delta = GET_OP_S (insn, EVAOFFSET);
+ infprintf (is, "%d", delta);
+ break;
+
default:
/* xgettext:c-format */
infprintf (is,