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authorMaciej W. Rozycki <macro@codesourcery.com>2014-08-21 12:57:00 +0100
committerMaciej W. Rozycki <macro@codesourcery.com>2014-08-21 12:57:00 +0100
commita6c7053929dd26d04293429e8610209f5b1bf900 (patch)
tree5e89bbe1f955afa045259c9dfc5f037acaa05c10 /opcodes/micromips-opc.c
parent1d7c96351acfa817fa749a5aefdfed8d9c471e03 (diff)
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MIPS/opcodes: Remove microMIPS 48-bit LI instruction
The 48-bit LI instruction encoding has been removed from the microMIPS ISA and no implementation ever made that included it. * micromips-opc.c (micromips_opcodes): Remove #ifdef-ed out 48-bit "li" encoding.
Diffstat (limited to 'opcodes/micromips-opc.c')
-rw-r--r--opcodes/micromips-opc.c4
1 files changed, 0 insertions, 4 deletions
diff --git a/opcodes/micromips-opc.c b/opcodes/micromips-opc.c
index 7571c6b..4bf8241 100644
--- a/opcodes/micromips-opc.c
+++ b/opcodes/micromips-opc.c
@@ -296,10 +296,6 @@ const struct mips_opcode micromips_opcodes[] =
{"li", "md,mI", 0xec00, 0xfc00, WR_1, 0, I1, 0, 0 },
{"li", "t,j", 0x30000000, 0xfc1f0000, WR_1, INSN2_ALIAS, I1, 0, 0 }, /* addiu */
{"li", "t,i", 0x50000000, 0xfc1f0000, WR_1, INSN2_ALIAS, I1, 0, 0 }, /* ori */
-#if 0
-/* Disabled until we can handle 48-bit opcodes. */
-{"li", "s,I", 0x7c0000010000, 0xfc00001f0000, WR_t, 0, I3, 0, 0 }, /* li48 */
-#endif
{"li", "t,I", 0, (int) M_LI, INSN_MACRO, 0, I1, 0, 0 },
{"move", "d,s", 0, (int) M_MOVE, INSN_MACRO, 0, I1, 0, 0 },
{"move", "mp,mj", 0x0c00, 0xfc00, WR_1|RD_2, 0, I1, 0, 0 },