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authorNick Clifton <nickc@redhat.com>2017-09-26 10:33:32 +0100
committerNick Clifton <nickc@redhat.com>2017-09-26 10:36:23 +0100
commit58a0b827444d0d6baad47f5fd010f33e541ed16e (patch)
treeb5873aa5a65f17196afe877e110506a2fc5da7a5 /opcodes/m68k-opc.c
parent78b2179a8e085b34ad7872450e5fadff4f7e5eb0 (diff)
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Allow the macw and macl instructions to be used on CPUs that have emacs support.
From PR 22123: The common opcodes of emac and mac seem to be only implemented for mac. To reproduce: echo "macw %d3l,%a0l" > /tmp/dummy.S m68k-unknown-elf-as -m5208 /tmp/dummy.S Outputs something like: /tmp/dummy.S: Assembler messages: /tmp/dummy.S:1: Error: operands mismatch -- statement `macw %d3l,%a0l' ignored This behavior occurs only if the CPU supports only emac but not explicitly mac (but emac is a superset of mac).
Diffstat (limited to 'opcodes/m68k-opc.c')
-rw-r--r--opcodes/m68k-opc.c14
1 files changed, 14 insertions, 0 deletions
diff --git a/opcodes/m68k-opc.c b/opcodes/m68k-opc.c
index ecad2f4..a6c1a8a 100644
--- a/opcodes/m68k-opc.c
+++ b/opcodes/m68k-opc.c
@@ -1501,6 +1501,13 @@ const struct m68k_opcode m68k_opcodes[] =
{"macw", 4, two(0xa000, 0x0200), two(0xf130, 0x0900), "uMumMheH", mcfemac },/* Ry,Rx,+1/-1,accX. */
{"macw", 4, two(0xa000, 0x0000), two(0xf130, 0x0f00), "uMumeH", mcfemac }, /* Ry,Rx,accX. */
+{"macw", 4, two(0xa080, 0x0000), two(0xf180, 0x0910), "uNuoiI4/Rn", mcfemac },
+{"macw", 4, two(0xa080, 0x0200), two(0xf180, 0x0910), "uNuoMh4/Rn", mcfemac },
+{"macw", 4, two(0xa080, 0x0000), two(0xf180, 0x0f10), "uNuo4/Rn", mcfemac },
+{"macw", 4, two(0xa000, 0x0000), two(0xf1b0, 0x0910), "uMumiI", mcfemac },
+{"macw", 4, two(0xa000, 0x0200), two(0xf1b0, 0x0910), "uMumMh", mcfemac },
+{"macw", 4, two(0xa000, 0x0000), two(0xf1b0, 0x0f10), "uMum", mcfemac },
+
{"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfmac },
{"macl", 4, two(0xa080, 0x0a00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfmac },
{"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0f10), "RNRo4/Rn", mcfmac },
@@ -1515,6 +1522,13 @@ const struct m68k_opcode m68k_opcodes[] =
{"macl", 4, two(0xa000, 0x0a00), two(0xf130, 0x0900), "RMRmMheH", mcfemac },
{"macl", 4, two(0xa000, 0x0800), two(0xf130, 0x0f00), "RMRmeH", mcfemac },
+{"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0910), "RNRoiI4/Rn", mcfemac },
+{"macl", 4, two(0xa080, 0x0a00), two(0xf180, 0x0910), "RNRoMh4/Rn", mcfemac },
+{"macl", 4, two(0xa080, 0x0800), two(0xf180, 0x0f10), "RNRo4/Rn", mcfemac },
+{"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0b10), "RMRmiI", mcfemac },
+{"macl", 4, two(0xa000, 0x0a00), two(0xf1b0, 0x0b10), "RMRmMh", mcfemac },
+{"macl", 4, two(0xa000, 0x0800), two(0xf1b0, 0x0910), "RMRm", mcfemac },
+
/* NOTE: The mcf5200 family programmer's reference manual does not
indicate the byte form of the movea instruction is invalid (as it
is on 68000 family cpus). However, experiments on the 5202 yeild