provide a new interface (using read_memory_func) to call the disassemblers

which copes with errors in a plausible way

1 files changed, 970 insertions, 0 deletions

diff --git a/opcodes/m68k-dis.c b/opcodes/m68k-dis.c
new file mode 100644
index 0000000..743ddac
--- /dev/null
+++ b/opcodes/m68k-dis.c
@@ -0,0 +1,970 @@
+/* Print Motorola 68k instructions.
+   Copyright 1986, 1987, 1989, 1991, 1992, 1993 Free Software Foundation, Inc.
+
+This file is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2 of the License, or
+(at your option) any later version.
+
+This program is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; if not, write to the Free Software
+Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.  */
+
+#include "dis-asm.h"
+#include "ieee-float.h"
+
+extern CONST struct ext_format ext_format_68881;
+
+/* Opcode/m68k.h is a massive table.  As a kludge, break it up into
+   two pieces.  This makes nonportable C -- FIXME -- it assumes that
+   two data items declared near each other will be contiguous in
+   memory.  This kludge can be removed, FIXME, when GCC is fixed to not
+   be a hog about initializers.  */
+
+#ifdef __GNUC__
+#define	BREAK_UP_BIG_DECL	}; \
+				struct m68k_opcode m68k_opcodes_2[] = {
+#define	AND_OTHER_PART		sizeof (m68k_opcodes_2)
+#endif
+
+#include "opcode/m68k.h"
+
+
+/* Local function prototypes */
+
+static int
+fetch_arg PARAMS ((unsigned char *, int, int));
+
+static void
+print_base PARAMS ((int, int, disassemble_info*));
+
+static unsigned char *
+print_indexed PARAMS ((int, unsigned char *, bfd_vma, disassemble_info *));
+
+static unsigned char *
+print_insn_arg PARAMS ((char *, unsigned char *, unsigned char *, bfd_vma,
+			disassemble_info *));
+
+/* Sign-extend an (unsigned char). */
+#if __STDC__ == 1
+#define COERCE_SIGNED_CHAR(ch) ((signed char)(ch))
+#else
+#define COERCE_SIGNED_CHAR(ch) ((int)(((ch) ^ 0x80) & 0xFF) - 128)
+#endif
+
+CONST char * CONST fpcr_names[] = {
+  "", "fpiar", "fpsr", "fpiar/fpsr", "fpcr",
+  "fpiar/fpcr", "fpsr/fpcr", "fpiar/fpsr/fpcr"};
+
+static char *reg_names[] = {
+  "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", "a0",
+  "a1", "a2", "a3", "a4", "a5", "fp", "sp", "ps", "pc"};
+
+/* Define accessors for 68K's 1, 2, and 4-byte signed quantities.
+   The _SHIFT values move the quantity to the high order end of an
+   `int' value, so it will sign-extend.  Probably a few more casts
+   are needed to make it compile without warnings on finicky systems.  */
+#define	BITS_PER_BYTE	8
+#define	WORD_SHIFT (BITS_PER_BYTE * ((sizeof (int)) - 2))
+#define	LONG_SHIFT (BITS_PER_BYTE * ((sizeof (int)) - 4))
+
+#define NEXTBYTE(p)  (p += 2, FETCH_DATA (info, p), COERCE_SIGNED_CHAR(p[-1]))
+
+#define NEXTWORD(p)  \
+  (p += 2, FETCH_DATA (info, p), \
+   (((int)((p[-2] << 8) + p[-1])) << WORD_SHIFT) >> WORD_SHIFT)
+
+#define NEXTLONG(p)  \
+  (p += 4, FETCH_DATA (info, p), \
+   (((int)((((((p[-4] << 8) + p[-3]) << 8) + p[-2]) << 8) + p[-1])) \
+				   << LONG_SHIFT) >> LONG_SHIFT)
+
+/* NEXTSINGLE and NEXTDOUBLE handle alignment problems, but not
+ * byte-swapping or other float format differences.  FIXME! */
+
+union number {
+    double d;
+    float f;
+    char c[10];
+};
+
+#define NEXTSINGLE(val, p) \
+  { int i; union number u;\
+    FETCH_DATA (info, p + sizeof (float));\
+    for (i = 0; i < sizeof(float); i++) u.c[i] = *p++; \
+    val = u.f; }
+
+#define NEXTDOUBLE(val, p) \
+  { int i; union number u;\
+    FETCH_DATA (info, p + sizeof (double));\
+    for (i = 0; i < sizeof(double); i++) u.c[i] = *p++; \
+    val = u.d; }
+
+/* Need a function to convert from extended to double precision... */
+#define NEXTEXTEND(p) \
+  (p += 12, FETCH_DATA (info, p), 0.0)
+
+/* Need a function to convert from packed to double
+   precision.   Actually, it's easier to print a
+   packed number than a double anyway, so maybe
+   there should be a special case to handle this... */
+#define NEXTPACKED(p) \
+  (p += 12, FETCH_DATA (info, p), 0.0)
+
+
+/* Maximum length of an instruction.  */
+#define MAXLEN 22
+
+#include <setjmp.h>
+
+struct private
+{
+  /* Points to first byte not fetched.  */
+  bfd_byte *max_fetched;
+  bfd_byte the_buffer[MAXLEN];
+  bfd_vma insn_start;
+  jmp_buf bailout;
+};
+
+/* Make sure that bytes from INFO->PRIVATE_DATA->BUFFER (inclusive)
+   to ADDR (exclusive) are valid.  Returns 1 for success, longjmps
+   on error.  */
+#define FETCH_DATA(info, addr) \
+  ((addr) <= ((struct private *)(info->private_data))->max_fetched \
+   ? 1 : fetch_data ((info), (addr)))
+
+static int
+fetch_data (info, addr)
+     struct disassemble_info *info;
+     bfd_byte *addr;
+{
+  int status;
+  struct private *priv = (struct private *)info->private_data;
+  bfd_vma start = priv->insn_start + (priv->max_fetched - priv->the_buffer);
+
+  status = (*info->read_memory_func) (start,
+				      priv->max_fetched,
+				      addr - priv->max_fetched,
+				      info);
+  if (status != 0)
+    {
+      (*info->memory_error_func) (status, start, info);
+      longjmp (priv->bailout);
+    }
+  else
+    priv->max_fetched = addr;
+  return 1;
+}
+
+static void
+m68k_opcode_error(info, code, place)
+     struct disassemble_info *info;
+     int code, place;
+{
+  (*info->fprintf_func)(info->stream,
+			"<internal error in opcode table: \"%c%c\">",
+			code, place);
+}
+
+/* Print the m68k instruction at address MEMADDR in debugged memory,
+   on STREAM.  Returns length of the instruction, in bytes.  */
+
+int
+print_insn_m68k (memaddr, info)
+     bfd_vma memaddr;
+     disassemble_info *info;
+{
+  register int i;
+  register unsigned char *p;
+  register char *d;
+  register unsigned long bestmask;
+  int best;
+  struct private priv;
+  bfd_byte *buffer = priv.the_buffer;
+
+  info->private_data = (PTR) &priv;
+  priv.max_fetched = priv.the_buffer;
+  priv.insn_start = memaddr;
+  if (setjmp (priv.bailout) != 0)
+    /* Error return.  */
+    return -1;
+
+  bestmask = 0;
+  best = -1;
+  FETCH_DATA (info, buffer + 2);
+  for (i = 0; i < numopcodes; i++)
+    {
+      register unsigned long opcode = m68k_opcodes[i].opcode;
+      register unsigned long match = m68k_opcodes[i].match;
+      if (((0xff & buffer[0] & (match >> 24)) == (0xff & (opcode >> 24)))
+	  && ((0xff & buffer[1] & (match >> 16)) == (0xff & (opcode >> 16)))
+	  /* Only fetch the next two bytes if we need to.  */
+	  && (((0xffff & match) == 0)
+	      ||
+	      (FETCH_DATA (info, buffer + 4)
+	       && ((0xff & buffer[2] & (match >> 8)) == (0xff & (opcode >> 8)))
+	       && ((0xff & buffer[3] & match) == (0xff & opcode)))
+	      ))
+	{
+	  /* Don't use for printout the variants of divul and divsl
+	     that have the same register number in two places.
+	     The more general variants will match instead.  */
+	  for (d = m68k_opcodes[i].args; *d; d += 2)
+	    if (d[1] == 'D')
+	      break;
+
+	  /* Don't use for printout the variants of most floating
+	     point coprocessor instructions which use the same
+	     register number in two places, as above. */
+	  if (*d == 0)
+	    for (d = m68k_opcodes[i].args; *d; d += 2)
+	      if (d[1] == 't')
+		break;
+
+	  if (*d == 0 && match > bestmask)
+	    {
+	      best = i;
+	      bestmask = match;
+	    }
+	}
+    }
+
+  /* Handle undefined instructions.  */
+  if (best < 0)
+    {
+      (*info->fprintf_func) (info->stream, "0%o",
+			     (buffer[0] << 8) + buffer[1]);
+      return 2;
+    }
+
+  (*info->fprintf_func) (info->stream, "%s", m68k_opcodes[best].name);
+
+  /* Point at first word of argument data,
+     and at descriptor for first argument.  */
+  p = buffer + 2;
+  
+  /* Why do this this way? -MelloN */
+  for (d = m68k_opcodes[best].args; *d; d += 2)
+    {
+      if (d[0] == '#')
+	{
+	  if (d[1] == 'l' && p - buffer < 6)
+	    p = buffer + 6;
+	  else if (p - buffer < 4 && d[1] != 'C' && d[1] != '8' )
+	    p = buffer + 4;
+	}
+      if (d[1] >= '1' && d[1] <= '3' && p - buffer < 4)
+	p = buffer + 4;
+      if (d[1] >= '4' && d[1] <= '6' && p - buffer < 6)
+	p = buffer + 6;
+      if ((d[0] == 'L' || d[0] == 'l') && d[1] == 'w' && p - buffer < 4)
+	p = buffer + 4;
+    }
+  
+  FETCH_DATA (info, p);
+  
+  d = m68k_opcodes[best].args;
+
+  if (*d)
+    (*info->fprintf_func) (info->stream, " ");
+
+  while (*d)
+    {
+      p = print_insn_arg (d, buffer, p, memaddr + p - buffer, info);
+      d += 2;
+      if (*d && *(d - 2) != 'I' && *d != 'k')
+	(*info->fprintf_func) (info->stream, ",");
+    }
+  return p - buffer;
+}
+
+static unsigned char *
+print_insn_arg (d, buffer, p, addr, info)
+     char *d;
+     unsigned char *buffer;
+     register unsigned char *p;
+     bfd_vma addr;		/* PC for this arg to be relative to */
+     disassemble_info *info;
+{
+  register int val = 0;
+  register int place = d[1];
+  int regno;
+  register CONST char *regname;
+  register unsigned char *p1;
+  double flval;
+  int flt_p;
+
+  switch (*d)
+    {
+    case 'c':		/* cache identifier */
+      {
+        static char *cacheFieldName[] = { "NOP", "dc", "ic", "bc" };
+        val = fetch_arg (buffer, place, 2, info);
+        (*info->fprintf_func) (info->stream, cacheFieldName[val]);
+        break;
+      }
+
+    case 'a':		/* address register indirect only. Cf. case '+'. */
+      {
+        (*info->fprintf_func)
+	  (info->stream,
+	   "%s@",
+	   reg_names [fetch_arg (buffer, place, 3, info) + 8]);
+        break;
+      }
+
+    case '_':		/* 32-bit absolute address for move16. */
+      {
+        val = NEXTLONG (p);
+        (*info->fprintf_func) (info->stream, "@#");
+	print_address (val, info->stream);
+        break;
+      }
+
+    case 'C':
+      (*info->fprintf_func) (info->stream, "ccr");
+      break;
+
+    case 'S':
+      (*info->fprintf_func) (info->stream, "sr");
+      break;
+
+    case 'U':
+      (*info->fprintf_func) (info->stream, "usp");
+      break;
+
+    case 'J':
+      {
+	static struct { char *name; int value; } names[]
+	  = {{"sfc", 0x000}, {"dfc", 0x001}, {"cacr", 0x002},
+	     {"tc",  0x003}, {"itt0",0x004}, {"itt1", 0x005},
+             {"dtt0",0x006}, {"dtt1",0x007},
+	     {"usp", 0x800}, {"vbr", 0x801}, {"caar", 0x802},
+	     {"msp", 0x803}, {"isp", 0x804}, {"mmusr",0x805},
+             {"urp", 0x806}, {"srp", 0x807}};
+
+	val = fetch_arg (buffer, place, 12, info);
+	for (regno = sizeof names / sizeof names[0] - 1; regno >= 0; regno--)
+	  if (names[regno].value == val)
+	    {
+	      (*info->fprintf_func) (info->stream, names[regno].name);
+	      break;
+	    }
+	if (regno < 0)
+	  (*info->fprintf_func) (info->stream, "%d", val);
+      }
+      break;
+
+    case 'Q':
+      val = fetch_arg (buffer, place, 3, info);
+      /* 0 means 8, except for the bkpt instruction... */
+      if (val == 0 && d[1] != 's')
+	val = 8;
+      (*info->fprintf_func) (info->stream, "#%d", val);
+      break;
+
+    case 'M':
+      val = fetch_arg (buffer, place, 8, info);
+      if (val & 0x80)
+	val = val - 0x100;
+      (*info->fprintf_func) (info->stream, "#%d", val);
+      break;
+
+    case 'T':
+      val = fetch_arg (buffer, place, 4, info);
+      (*info->fprintf_func) (info->stream, "#%d", val);
+      break;
+
+    case 'D':
+      (*info->fprintf_func) (info->stream, "%s",
+			     reg_names[fetch_arg (buffer, place, 3, info)]);
+      break;
+
+    case 'A':
+      (*info->fprintf_func)
+	(info->stream, "%s",
+	 reg_names[fetch_arg (buffer, place, 3, info) + 010]);
+      break;
+
+    case 'R':
+      (*info->fprintf_func)
+	(info->stream, "%s",
+	 reg_names[fetch_arg (buffer, place, 4, info)]);
+      break;
+
+    case 'r':
+      (*info->fprintf_func)
+	(info->stream, "%s@",
+	 reg_names[fetch_arg (buffer, place, 4, info)]);
+      break;
+
+    case 'F':
+      (*info->fprintf_func)
+	(info->stream, "fp%d",
+	 fetch_arg (buffer, place, 3, info));
+      break;
+
+    case 'O':
+      val = fetch_arg (buffer, place, 6, info);
+      if (val & 0x20)
+	(*info->fprintf_func) (info->stream, "%s", reg_names [val & 7]);
+      else
+	(*info->fprintf_func) (info->stream, "%d", val);
+      break;
+
+    case '+':
+      (*info->fprintf_func)
+	(info->stream, "%s@+",
+	 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
+      break;
+
+    case '-':
+      (*info->fprintf_func)
+	(info->stream, "%s@-",
+	 reg_names[fetch_arg (buffer, place, 3, info) + 8]);
+      break;
+
+    case 'k':
+      if (place == 'k')
+	(*info->fprintf_func)
+	  (info->stream, "{%s}",
+	   reg_names[fetch_arg (buffer, place, 3, info)]);
+      else if (place == 'C')
+	{
+	  val = fetch_arg (buffer, place, 7, info);
+	  if ( val > 63 )		/* This is a signed constant. */
+	    val -= 128;
+	  (*info->fprintf_func) (info->stream, "{#%d}", val);
+	}
+      else
+	m68k_opcode_error (info, *d, place);
+      break;
+
+    case '#':
+    case '^':
+      p1 = buffer + (*d == '#' ? 2 : 4);
+      if (place == 's')
+	val = fetch_arg (buffer, place, 4, info);
+      else if (place == 'C')
+	val = fetch_arg (buffer, place, 7, info);
+      else if (place == '8')
+	val = fetch_arg (buffer, place, 3, info);
+      else if (place == '3')
+	val = fetch_arg (buffer, place, 8, info);
+      else if (place == 'b')
+	val = NEXTBYTE (p1);
+      else if (place == 'w')
+	val = NEXTWORD (p1);
+      else if (place == 'l')
+	val = NEXTLONG (p1);
+      else
+	m68k_opcode_error (info, *d, place);
+      (*info->fprintf_func) (info->stream, "#%d", val);
+      break;
+
+    case 'B':
+      if (place == 'b')
+	val = NEXTBYTE (p);
+      else if (place == 'B')
+	val = COERCE_SIGNED_CHAR(buffer[1]);
+      else if (place == 'w' || place == 'W')
+	val = NEXTWORD (p);
+      else if (place == 'l' || place == 'L')
+	val = NEXTLONG (p);
+      else if (place == 'g')
+	{
+	  val = NEXTBYTE (buffer);
+	  if (val == 0)
+	    val = NEXTWORD (p);
+	  else if (val == -1)
+	    val = NEXTLONG (p);
+	}
+      else if (place == 'c')
+	{
+	  if (buffer[1] & 0x40)		/* If bit six is one, long offset */
+	    val = NEXTLONG (p);
+	  else
+	    val = NEXTWORD (p);
+	}
+      else
+	m68k_opcode_error (info, *d, place);
+
+      print_address (addr + val, info->stream);
+      break;
+
+    case 'd':
+      val = NEXTWORD (p);
+      (*info->fprintf_func)
+	(info->stream, "%s@(%d)",
+	 reg_names[fetch_arg (buffer, place, 3, info)], val);
+      break;
+
+    case 's':
+      (*info->fprintf_func) (info->stream, "%s",
+			     fpcr_names[fetch_arg (buffer, place, 3, info)]);
+      break;
+
+    case 'I':
+      /* Get coprocessor ID... */
+      val = fetch_arg (buffer, 'd', 3, info);
+      
+      if (val != 1)				/* Unusual coprocessor ID? */
+	(*info->fprintf_func) (info->stream, "(cpid=%d) ", val);
+      if (place == 'i')
+	p += 2;			     /* Skip coprocessor extended operands */
+      break;
+
+    case '*':
+    case '~':
+    case '%':
+    case ';':
+    case '@':
+    case '!':
+    case '$':
+    case '?':
+    case '/':
+    case '&':
+    case '`':
+
+      if (place == 'd')
+	{
+	  val = fetch_arg (buffer, 'x', 6, info);
+	  val = ((val & 7) << 3) + ((val >> 3) & 7);
+	}
+      else
+	val = fetch_arg (buffer, 's', 6, info);
+
+      /* Get register number assuming address register.  */
+      regno = (val & 7) + 8;
+      regname = reg_names[regno];
+      switch (val >> 3)
+	{
+	case 0:
+	  (*info->fprintf_func) (info->stream, "%s", reg_names[val]);
+	  break;
+
+	case 1:
+	  (*info->fprintf_func) (info->stream, "%s", regname);
+	  break;
+
+	case 2:
+	  (*info->fprintf_func) (info->stream, "%s@", regname);
+	  break;
+
+	case 3:
+	  (*info->fprintf_func) (info->stream, "%s@+", regname);
+	  break;
+
+	case 4:
+	  (*info->fprintf_func) (info->stream, "%s@-", regname);
+	  break;
+
+	case 5:
+	  val = NEXTWORD (p);
+	  (*info->fprintf_func) (info->stream, "%s@(%d)", regname, val);
+	  break;
+
+	case 6:
+	  p = print_indexed (regno, p, addr, info);
+	  break;
+
+	case 7:
+	  switch (val & 7)
+	    {
+	    case 0:
+	      val = NEXTWORD (p);
+	      (*info->fprintf_func) (info->stream, "@#");
+	      print_address (val, info->stream);
+	      break;
+
+	    case 1:
+	      val = NEXTLONG (p);
+	      (*info->fprintf_func) (info->stream, "@#");
+	      print_address (val, info->stream);
+	      break;
+
+	    case 2:
+	      val = NEXTWORD (p);
+	      print_address (addr + val, info->stream);
+	      break;
+
+	    case 3:
+	      p = print_indexed (-1, p, addr, info);
+	      break;
+
+	    case 4:
+	      flt_p = 1;	/* Assume it's a float... */
+	      switch( place )
+	      {
+		case 'b':
+		  val = NEXTBYTE (p);
+		  flt_p = 0;
+		  break;
+
+		case 'w':
+		  val = NEXTWORD (p);
+		  flt_p = 0;
+		  break;
+
+		case 'l':
+		  val = NEXTLONG (p);
+		  flt_p = 0;
+		  break;
+
+		case 'f':
+		  NEXTSINGLE(flval, p);
+		  break;
+
+		case 'F':
+		  NEXTDOUBLE(flval, p);
+		  break;
+
+		case 'x':
+		  ieee_extended_to_double (&ext_format_68881,
+					   (char *)p, &flval);
+		  p += 12;
+		  break;
+
+		case 'p':
+		  flval = NEXTPACKED(p);
+		  break;
+
+		default:
+		  m68k_opcode_error (info, *d, place);
+	      }
+	      if ( flt_p )	/* Print a float? */
+		(*info->fprintf_func) (info->stream, "#%g", flval);
+	      else
+		(*info->fprintf_func) (info->stream, "#%d", val);
+	      break;
+
+	    default:
+	      (*info->fprintf_func) (info->stream,
+				     "<invalid address mode 0%o>",
+				     (unsigned) val);
+	    }
+	}
+      break;
+
+    case 'L':
+    case 'l':
+	if (place == 'w')
+	  {
+	    char doneany;
+	    p1 = buffer + 2;
+	    val = NEXTWORD (p1);
+	    /* Move the pointer ahead if this point is farther ahead
+	       than the last.  */
+	    p = p1 > p ? p1 : p;
+	    if (val == 0)
+	      {
+		(*info->fprintf_func) (info->stream, "#0");
+		break;
+	      }
+	    if (*d == 'l')
+	      {
+		register int newval = 0;
+		for (regno = 0; regno < 16; ++regno)
+		  if (val & (0x8000 >> regno))
+		    newval |= 1 << regno;
+		val = newval;
+	      }
+	    val &= 0xffff;
+	    doneany = 0;
+	    for (regno = 0; regno < 16; ++regno)
+	      if (val & (1 << regno))
+		{
+		  int first_regno;
+		  if (doneany)
+		    (*info->fprintf_func) (info->stream, "/");
+		  doneany = 1;
+		  (*info->fprintf_func) (info->stream, "%s", reg_names[regno]);
+		  first_regno = regno;
+		  while (val & (1 << (regno + 1)))
+		    ++regno;
+		  if (regno > first_regno)
+		    (*info->fprintf_func) (info->stream, "-%s",
+					   reg_names[regno]);
+		}
+	  }
+	else if (place == '3')
+	  {
+	    /* `fmovem' insn.  */
+	    char doneany;
+	    val = fetch_arg (buffer, place, 8, info);
+	    if (val == 0)
+	      {
+		(*info->fprintf_func) (info->stream, "#0");
+		break;
+	      }
+	    if (*d == 'l')
+	      {
+		register int newval = 0;
+		for (regno = 0; regno < 8; ++regno)
+		  if (val & (0x80 >> regno))
+		    newval |= 1 << regno;
+		val = newval;
+	      }
+	    val &= 0xff;
+	    doneany = 0;
+	    for (regno = 0; regno < 8; ++regno)
+	      if (val & (1 << regno))
+		{
+		  int first_regno;
+		  if (doneany)
+		    (*info->fprintf_func) (info->stream, "/");
+		  doneany = 1;
+		  (*info->fprintf_func) (info->stream, "fp%d", regno);
+		  first_regno = regno;
+		  while (val & (1 << (regno + 1)))
+		    ++regno;
+		  if (regno > first_regno)
+		    (*info->fprintf_func) (info->stream, "-fp%d", regno);
+		}
+	  }
+	else
+	  goto de_fault;
+      break;
+
+    default:  de_fault:
+      m68k_opcode_error (info, *d, ' ');
+    }
+
+  return (unsigned char *) p;
+}
+
+/* Fetch BITS bits from a position in the instruction specified by CODE.
+   CODE is a "place to put an argument", or 'x' for a destination
+   that is a general address (mode and register).
+   BUFFER contains the instruction.  */
+
+static int
+fetch_arg (buffer, code, bits, info)
+     unsigned char *buffer;
+     int code;
+     int bits;
+     disassemble_info *info;
+{
+  register int val = 0;
+  switch (code)
+    {
+    case 's':
+      val = buffer[1];
+      break;
+
+    case 'd':			/* Destination, for register or quick.  */
+      val = (buffer[0] << 8) + buffer[1];
+      val >>= 9;
+      break;
+
+    case 'x':			/* Destination, for general arg */
+      val = (buffer[0] << 8) + buffer[1];
+      val >>= 6;
+      break;
+
+    case 'k':
+      FETCH_DATA (info, buffer + 3);
+      val = (buffer[3] >> 4);
+      break;
+
+    case 'C':
+      FETCH_DATA (info, buffer + 3);
+      val = buffer[3];
+      break;
+
+    case '1':
+      FETCH_DATA (info, buffer + 3);
+      val = (buffer[2] << 8) + buffer[3];
+      val >>= 12;
+      break;
+
+    case '2':
+      FETCH_DATA (info, buffer + 3);
+      val = (buffer[2] << 8) + buffer[3];
+      val >>= 6;
+      break;
+
+    case '3':
+    case 'j':
+      FETCH_DATA (info, buffer + 3);
+      val = (buffer[2] << 8) + buffer[3];
+      break;
+
+    case '4':
+      FETCH_DATA (info, buffer + 5);
+      val = (buffer[4] << 8) + buffer[5];
+      val >>= 12;
+      break;
+
+    case '5':
+      FETCH_DATA (info, buffer + 5);
+      val = (buffer[4] << 8) + buffer[5];
+      val >>= 6;
+      break;
+
+    case '6':
+      FETCH_DATA (info, buffer + 5);
+      val = (buffer[4] << 8) + buffer[5];
+      break;
+
+    case '7':
+      FETCH_DATA (info, buffer + 3);
+      val = (buffer[2] << 8) + buffer[3];
+      val >>= 7;
+      break;
+      
+    case '8':
+      FETCH_DATA (info, buffer + 3);
+      val = (buffer[2] << 8) + buffer[3];
+      val >>= 10;
+      break;
+
+    case '9':
+      FETCH_DATA (info, buffer + 3);
+      val = (buffer[2] << 8) + buffer[3];
+      val >>= 5;
+      break;
+
+    case 'e':
+      val = (buffer[1] >> 6);
+      break;
+
+    default:
+      abort ();
+    }
+
+  switch (bits)
+    {
+    case 2:
+      return val & 3;
+    case 3:
+      return val & 7;
+    case 4:
+      return val & 017;
+    case 5:
+      return val & 037;
+    case 6:
+      return val & 077;
+    case 7:
+      return val & 0177;
+    case 8:
+      return val & 0377;
+    case 12:
+      return val & 07777;
+    default:
+      abort ();
+    }
+}
+
+/* Print an indexed argument.  The base register is BASEREG (-1 for pc).
+   P points to extension word, in buffer.
+   ADDR is the nominal core address of that extension word.  */
+
+static unsigned char *
+print_indexed (basereg, p, addr, info)
+     int basereg;
+     unsigned char *p;
+     bfd_vma addr;
+     disassemble_info *info;
+{
+  register int word;
+  static char *scales[] = {"", "*2", "*4", "*8"};
+  register int base_disp;
+  register int outer_disp;
+  char buf[40];
+
+  word = NEXTWORD (p);
+
+  /* Generate the text for the index register.
+     Where this will be output is not yet determined.  */
+  sprintf (buf, "[%s.%c%s]",
+	   reg_names[(word >> 12) & 0xf],
+	   (word & 0x800) ? 'l' : 'w',
+	   scales[(word >> 9) & 3]);
+
+  /* Handle the 68000 style of indexing.  */
+
+  if ((word & 0x100) == 0)
+    {
+      print_base (basereg,
+		  ((word & 0x80) ? word | 0xff00 : word & 0xff)
+		  + ((basereg == -1) ? addr : 0),
+		  info);
+      (*info->fprintf_func) (info->stream, "%s", buf);
+      return p;
+    }
+
+  /* Handle the generalized kind.  */
+  /* First, compute the displacement to add to the base register.  */
+
+  if (word & 0200)
+    basereg = -2;
+  if (word & 0100)
+    buf[0] = 0;
+  base_disp = 0;
+  switch ((word >> 4) & 3)
+    {
+    case 2:
+      base_disp = NEXTWORD (p);
+      break;
+    case 3:
+      base_disp = NEXTLONG (p);
+    }
+  if (basereg == -1)
+    base_disp += addr;
+
+  /* Handle single-level case (not indirect) */
+
+  if ((word & 7) == 0)
+    {
+      print_base (basereg, base_disp, info);
+      (*info->fprintf_func) (info->stream, "%s", buf);
+      return p;
+    }
+
+  /* Two level.  Compute displacement to add after indirection.  */
+
+  outer_disp = 0;
+  switch (word & 3)
+    {
+    case 2:
+      outer_disp = NEXTWORD (p);
+      break;
+    case 3:
+      outer_disp = NEXTLONG (p);
+    }
+
+  (*info->fprintf_func) (info->stream, "%d(", outer_disp);
+  print_base (basereg, base_disp, info);
+
+  /* If postindexed, print the closeparen before the index.  */
+  if (word & 4)
+    (*info->fprintf_func) (info->stream, ")%s", buf);
+  /* If preindexed, print the closeparen after the index.  */
+  else
+    (*info->fprintf_func) (info->stream, "%s)", buf);
+
+  return p;
+}
+
+/* Print a base register REGNO and displacement DISP, on INFO->STREAM.
+   REGNO = -1 for pc, -2 for none (suppressed).  */
+
+static void
+print_base (regno, disp, info)
+     int regno;
+     int disp;
+     disassemble_info *info;
+{
+  if (regno == -2)
+    (*info->fprintf_func) (info->stream, "%d", disp);
+  else if (regno == -1)
+    (*info->fprintf_func) (info->stream, "0x%x", (unsigned) disp);
+  else
+    (*info->fprintf_func) (info->stream, "%d(%s)", disp, reg_names[regno]);
+}